cpu.h revision 1.74
1 /* $NetBSD: cpu.h,v 1.74 2017/07/16 14:02:48 cherry Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #ifdef i386 51 #include "opt_user_ldt.h" 52 #include "opt_vm86.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/xen-public/xen.h> 73 #include <xen/xen-public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 /* 88 * a bunch of this belongs in cpuvar.h; move it later.. 89 */ 90 91 struct cpu_info { 92 struct cpu_data ci_data; /* MI per-cpu data */ 93 device_t ci_dev; /* pointer to our device */ 94 struct cpu_info *ci_self; /* self-pointer */ 95 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 96 void *ci_tlog_base; /* Trap log base */ 97 int32_t ci_tlog_offset; /* Trap log current offset */ 98 99 /* 100 * Will be accessed by other CPUs. 101 */ 102 struct cpu_info *ci_next; /* next cpu */ 103 struct lwp *ci_curlwp; /* current owner of the processor */ 104 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 105 int _unused1[2]; 106 cpuid_t ci_cpuid; /* our CPU ID */ 107 int _unused; 108 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 109 uint32_t ci_initapicid; /* our intitial APIC ID */ 110 111 /* 112 * Private members. 113 */ 114 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 115 struct pmap *ci_pmap; /* current pmap */ 116 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 117 int ci_want_pmapload; /* pmap_load() is needed */ 118 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 119 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 120 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 121 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 122 int ci_curldt; /* current LDT descriptor */ 123 int ci_nintrhand; /* number of H/W interrupt handlers */ 124 uint64_t ci_scratch; 125 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 126 127 #ifdef XEN 128 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 129 #endif 130 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 131 132 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 133 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 134 135 #ifndef __HAVE_DIRECT_MAP 136 #define VPAGE_SRC 0 137 #define VPAGE_DST 1 138 #define VPAGE_ZER 2 139 #define VPAGE_PTP 3 140 #define VPAGE_MAX 4 141 vaddr_t vpage[VPAGE_MAX]; 142 pt_entry_t *vpage_pte[VPAGE_MAX]; 143 #endif 144 145 /* The following must be aligned for cmpxchg8b. */ 146 struct { 147 uint32_t ipending; 148 int ilevel; 149 } ci_istate __aligned(8); 150 #define ci_ipending ci_istate.ipending 151 #define ci_ilevel ci_istate.ilevel 152 153 int ci_idepth; 154 void * ci_intrstack; 155 uint32_t ci_imask[NIPL]; 156 uint32_t ci_iunmask[NIPL]; 157 158 uint32_t ci_flags; /* flags; see below */ 159 uint32_t ci_ipis; /* interprocessor interrupts pending */ 160 uint32_t sc_apic_version; /* local APIC version */ 161 162 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 163 uint32_t ci_vendor[4]; /* vendor string */ 164 uint32_t _unused2; 165 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 166 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 167 volatile uint32_t ci_lapic_counter; 168 169 uint32_t ci_feat_val[7]; /* X86 CPUID feature bits */ 170 /* [0] basic features cpuid.1:%edx 171 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 172 * [2] extended features cpuid:80000001:%edx 173 * [3] extended features cpuid:80000001:%ecx 174 * [4] VIA padlock features 175 * [5] structured extended features cpuid.7:%ebx 176 * [6] structured extended features cpuid.7:%ecx 177 */ 178 179 const struct cpu_functions *ci_func; /* start/stop functions */ 180 struct trapframe *ci_ddb_regs; 181 182 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 183 struct x86_cache_info ci_cinfo[CAI_COUNT]; 184 185 union descriptor *ci_gdt; 186 187 #ifdef i386 188 struct i386tss ci_doubleflt_tss; 189 struct i386tss ci_ddbipi_tss; 190 #endif 191 192 #ifdef PAE 193 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 194 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 195 #endif 196 197 #if defined(XEN) && (defined(PAE) || defined(__x86_64__)) 198 /* Currently active user PGD (can't use rcr3() with Xen) */ 199 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 200 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 201 kmutex_t ci_kpm_mtx; 202 #if defined(__x86_64__) 203 /* per-cpu version of normal_pdes */ 204 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ 205 paddr_t ci_xen_current_user_pgd; 206 #endif /* __x86_64__ */ 207 #endif /* XEN et.al */ 208 209 char *ci_doubleflt_stack; 210 char *ci_ddbipi_stack; 211 212 #ifndef XEN 213 struct evcnt ci_ipi_events[X86_NIPI]; 214 #else /* XEN */ 215 struct evcnt ci_ipi_events[XEN_NIPIS]; 216 evtchn_port_t ci_ipi_evtchn; 217 #endif /* XEN */ 218 219 device_t ci_frequency; /* Frequency scaling technology */ 220 device_t ci_padlock; /* VIA PadLock private storage */ 221 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 222 device_t ci_vm; /* Virtual machine guest driver */ 223 224 struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 225 char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ 226 int ci_tss_sel; /* TSS selector of this cpu */ 227 228 /* 229 * The following two are actually region_descriptors, 230 * but that would pollute the namespace. 231 */ 232 uintptr_t ci_suspend_gdt; 233 uint16_t ci_suspend_gdt_padding; 234 uintptr_t ci_suspend_idt; 235 uint16_t ci_suspend_idt_padding; 236 237 uint16_t ci_suspend_tr; 238 uint16_t ci_suspend_ldt; 239 uintptr_t ci_suspend_fs; 240 uintptr_t ci_suspend_gs; 241 uintptr_t ci_suspend_kgs; 242 uintptr_t ci_suspend_efer; 243 uintptr_t ci_suspend_reg[12]; 244 uintptr_t ci_suspend_cr0; 245 uintptr_t ci_suspend_cr2; 246 uintptr_t ci_suspend_cr3; 247 uintptr_t ci_suspend_cr4; 248 uintptr_t ci_suspend_cr8; 249 250 /* The following must be in a single cache line. */ 251 int ci_want_resched __aligned(64); 252 int ci_padout __aligned(64); 253 }; 254 255 /* 256 * Macros to handle (some) trapframe registers for common x86 code. 257 */ 258 #ifdef __x86_64__ 259 #define X86_TF_RAX(tf) tf->tf_rax 260 #define X86_TF_RDX(tf) tf->tf_rdx 261 #define X86_TF_RSP(tf) tf->tf_rsp 262 #define X86_TF_RIP(tf) tf->tf_rip 263 #define X86_TF_RFLAGS(tf) tf->tf_rflags 264 #else 265 #define X86_TF_RAX(tf) tf->tf_eax 266 #define X86_TF_RDX(tf) tf->tf_edx 267 #define X86_TF_RSP(tf) tf->tf_esp 268 #define X86_TF_RIP(tf) tf->tf_eip 269 #define X86_TF_RFLAGS(tf) tf->tf_eflags 270 #endif 271 272 /* 273 * Processor flag notes: The "primary" CPU has certain MI-defined 274 * roles (mostly relating to hardclock handling); we distinguish 275 * betwen the processor which booted us, and the processor currently 276 * holding the "primary" role just to give us the flexibility later to 277 * change primaries should we be sufficiently twisted. 278 */ 279 280 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 281 #define CPUF_AP 0x0002 /* CPU is an AP */ 282 #define CPUF_SP 0x0004 /* CPU is only processor */ 283 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 284 285 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 286 #define CPUF_PRESENT 0x1000 /* CPU is present */ 287 #define CPUF_RUNNING 0x2000 /* CPU is running */ 288 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 289 #define CPUF_GO 0x8000 /* CPU should start running */ 290 291 #endif /* _KERNEL || __KMEMUSER */ 292 293 #ifdef _KERNEL 294 /* 295 * We statically allocate the CPU info for the primary CPU (or, 296 * the only CPU on uniprocessors), and the primary CPU is the 297 * first CPU on the CPU info list. 298 */ 299 extern struct cpu_info cpu_info_primary; 300 extern struct cpu_info *cpu_info_list; 301 302 #define CPU_INFO_ITERATOR int __unused 303 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 304 ci != NULL; ci = ci->ci_next 305 306 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 307 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 308 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 309 310 #if !defined(__GNUC__) || defined(_MODULE) 311 /* For non-GCC and modules */ 312 struct cpu_info *x86_curcpu(void); 313 void cpu_set_curpri(int); 314 # ifdef __GNUC__ 315 lwp_t *x86_curlwp(void) __attribute__ ((const)); 316 # else 317 lwp_t *x86_curlwp(void); 318 # endif 319 #endif 320 321 #define cpu_number() (cpu_index(curcpu())) 322 323 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 324 325 #define X86_AST_GENERIC 0x01 326 #define X86_AST_PREEMPT 0x02 327 328 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 329 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 330 331 void cpu_boot_secondary_processors(void); 332 void cpu_init_idle_lwps(void); 333 void cpu_init_msrs(struct cpu_info *, bool); 334 void cpu_load_pmap(struct pmap *, struct pmap *); 335 void cpu_broadcast_halt(void); 336 void cpu_kick(struct cpu_info *); 337 338 #define curcpu() x86_curcpu() 339 #define curlwp x86_curlwp() 340 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 341 342 /* 343 * Arguments to hardclock, softclock and statclock 344 * encapsulate the previous machine state in an opaque 345 * clockframe; for now, use generic intrframe. 346 */ 347 struct clockframe { 348 struct intrframe cf_if; 349 }; 350 351 /* 352 * Give a profiling tick to the current process when the user profiling 353 * buffer pages are invalid. On the i386, request an ast to send us 354 * through trap(), marking the proc as needing a profiling tick. 355 */ 356 extern void cpu_need_proftick(struct lwp *l); 357 358 /* 359 * Notify the LWP l that it has a signal pending, process as soon as 360 * possible. 361 */ 362 extern void cpu_signotify(struct lwp *); 363 364 /* 365 * We need a machine-independent name for this. 366 */ 367 extern void (*delay_func)(unsigned int); 368 struct timeval; 369 370 #ifndef __HIDE_DELAY 371 #define DELAY(x) (*delay_func)(x) 372 #define delay(x) (*delay_func)(x) 373 #endif 374 375 extern int biosbasemem; 376 extern int biosextmem; 377 extern int cputype; 378 extern int cpuid_level; 379 extern int cpu_class; 380 extern char cpu_brand_string[]; 381 extern int use_pae; 382 383 #ifdef __i386__ 384 extern int i386_fpu_present; 385 int npx586bug1(int, int); 386 extern int i386_fpu_fdivbug; 387 extern int i386_use_fxsave; 388 extern int i386_has_sse; 389 extern int i386_has_sse2; 390 #else 391 #define i386_fpu_present 1 392 #define i386_fpu_fdivbug 0 393 #define i386_use_fxsave 1 394 #define i386_has_sse 1 395 #define i386_has_sse2 1 396 #endif 397 398 extern int x86_fpu_save; 399 #define FPU_SAVE_FSAVE 0 400 #define FPU_SAVE_FXSAVE 1 401 #define FPU_SAVE_XSAVE 2 402 #define FPU_SAVE_XSAVEOPT 3 403 extern unsigned int x86_fpu_save_size; 404 extern uint64_t x86_xsave_features; 405 406 extern void (*x86_cpu_idle)(void); 407 #define cpu_idle() (*x86_cpu_idle)() 408 409 /* machdep.c */ 410 void cpu_reset(void); 411 void i386_proc0_tss_ldt_init(void); 412 void cpu_reset(void); 413 void x86_64_proc0_tss_ldt_init(void); 414 void x86_64_init_pcb_tss_ldt(struct cpu_info *); 415 416 /* longrun.c */ 417 u_int tmx86_get_longrun_mode(void); 418 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 419 void tmx86_init_longrun(void); 420 421 /* identcpu.c */ 422 void cpu_probe(struct cpu_info *); 423 void cpu_identify(struct cpu_info *); 424 void identify_hypervisor(void); 425 426 typedef enum vm_guest { 427 VM_GUEST_NO = 0, 428 VM_GUEST_VM, 429 VM_GUEST_XEN, 430 VM_GUEST_HV, 431 VM_GUEST_VMWARE, 432 VM_GUEST_KVM, 433 VM_LAST 434 } vm_guest_t; 435 extern vm_guest_t vm_guest; 436 437 /* cpu_topology.c */ 438 void x86_cpu_topology(struct cpu_info *); 439 440 /* vm_machdep.c */ 441 void cpu_proc_fork(struct proc *, struct proc *); 442 443 /* locore.s */ 444 struct region_descriptor; 445 void lgdt(struct region_descriptor *); 446 #ifdef XEN 447 void lgdt_finish(void); 448 #endif 449 450 struct pcb; 451 void savectx(struct pcb *); 452 void lwp_trampoline(void); 453 #ifdef XEN 454 void startrtclock(void); 455 void xen_delay(unsigned int); 456 void xen_initclocks(void); 457 void xen_suspendclocks(struct cpu_info *); 458 void xen_resumeclocks(struct cpu_info *); 459 #else 460 /* clock.c */ 461 void initrtclock(u_long); 462 void startrtclock(void); 463 void i8254_delay(unsigned int); 464 void i8254_microtime(struct timeval *); 465 void i8254_initclocks(void); 466 #endif 467 468 /* cpu.c */ 469 470 void cpu_probe_features(struct cpu_info *); 471 472 /* vm_machdep.c */ 473 paddr_t kvtop(void *); 474 475 #ifdef USER_LDT 476 /* sys_machdep.h */ 477 int x86_get_ldt(struct lwp *, void *, register_t *); 478 int x86_set_ldt(struct lwp *, void *, register_t *); 479 #endif 480 481 /* isa_machdep.c */ 482 void isa_defaultirq(void); 483 int isa_nmi(void); 484 485 #ifdef VM86 486 /* vm86.c */ 487 void vm86_gpfault(struct lwp *, int); 488 #endif /* VM86 */ 489 490 /* consinit.c */ 491 void kgdb_port_init(void); 492 493 /* bus_machdep.c */ 494 void x86_bus_space_init(void); 495 void x86_bus_space_mallocok(void); 496 497 #endif /* _KERNEL */ 498 499 #if defined(_KERNEL) || defined(_KMEMUSER) 500 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 501 #endif /* _KERNEL || __KMEMUSER */ 502 503 /* 504 * CTL_MACHDEP definitions. 505 */ 506 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 507 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 508 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 509 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 510 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 511 #define CPU_DISKINFO 6 /* struct disklist *: 512 * disk geometry information */ 513 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 514 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 515 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 516 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 517 #define CPU_TMLR_MODE 11 /* int: longrun mode 518 * 0: minimum frequency 519 * 1: economy 520 * 2: performance 521 * 3: maximum frequency 522 */ 523 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 524 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 525 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 526 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 527 * to use this, CPU_OSFXSR must be true 528 * 0: FSAVE 529 * 1: FXSAVE 530 * 2: XSAVE 531 * 3: XSAVEOPT 532 */ 533 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 534 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 535 536 #define CPU_MAXID 18 /* number of valid machdep ids */ 537 538 /* 539 * Structure for CPU_DISKINFO sysctl call. 540 * XXX this should be somewhere else. 541 */ 542 #define MAX_BIOSDISKS 16 543 544 struct disklist { 545 int dl_nbiosdisks; /* number of bios disks */ 546 struct biosdisk_info { 547 int bi_dev; /* BIOS device # (0x80 ..) */ 548 int bi_cyl; /* cylinders on disk */ 549 int bi_head; /* heads per track */ 550 int bi_sec; /* sectors per track */ 551 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 552 #define BIFLAG_INVALID 0x01 553 #define BIFLAG_EXTINT13 0x02 554 int bi_flags; 555 } dl_biosdisks[MAX_BIOSDISKS]; 556 557 int dl_nnativedisks; /* number of native disks */ 558 struct nativedisk_info { 559 char ni_devname[16]; /* native device name */ 560 int ni_nmatches; /* # of matches w/ BIOS */ 561 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 562 } dl_nativedisks[1]; /* actually longer */ 563 }; 564 #endif /* !_X86_CPU_H_ */ 565
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