cpu.h revision 1.95
1 /* $NetBSD: cpu.h,v 1.95 2018/07/15 08:47:43 maxv Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #ifdef i386 52 #include "opt_user_ldt.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/xen-public/xen.h> 73 #include <xen/xen-public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 struct cpu_tss { 88 #ifdef i386 89 struct i386tss dblflt_tss; 90 struct i386tss ddbipi_tss; 91 #endif 92 struct i386tss tss; 93 uint8_t iomap[IOMAPSIZE]; 94 } __packed; 95 96 /* 97 * a bunch of this belongs in cpuvar.h; move it later.. 98 */ 99 100 struct cpu_info { 101 struct cpu_data ci_data; /* MI per-cpu data */ 102 device_t ci_dev; /* pointer to our device */ 103 struct cpu_info *ci_self; /* self-pointer */ 104 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 105 106 /* 107 * Will be accessed by other CPUs. 108 */ 109 struct cpu_info *ci_next; /* next cpu */ 110 struct lwp *ci_curlwp; /* current owner of the processor */ 111 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 112 cpuid_t ci_cpuid; /* our CPU ID */ 113 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 114 uint32_t ci_initapicid; /* our initial APIC ID */ 115 116 /* 117 * Private members. 118 */ 119 struct pmap *ci_pmap; /* current pmap */ 120 int ci_want_pmapload; /* pmap_load() is needed */ 121 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 122 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 123 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 124 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 125 int ci_curldt; /* current LDT descriptor */ 126 int ci_nintrhand; /* number of H/W interrupt handlers */ 127 uint64_t ci_scratch; 128 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 129 130 #ifdef XEN 131 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 132 #endif 133 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 134 135 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 136 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 137 138 /* The following must be aligned for cmpxchg8b. */ 139 struct { 140 uint32_t ipending; 141 int ilevel; 142 } ci_istate __aligned(8); 143 #define ci_ipending ci_istate.ipending 144 #define ci_ilevel ci_istate.ilevel 145 146 int ci_idepth; 147 void * ci_intrstack; 148 uint32_t ci_imask[NIPL]; 149 uint32_t ci_iunmask[NIPL]; 150 151 uint32_t ci_flags; /* flags; see below */ 152 uint32_t ci_ipis; /* interprocessor interrupts pending */ 153 154 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 155 uint32_t ci_vendor[4]; /* vendor string */ 156 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 157 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 158 volatile uint32_t ci_lapic_counter; 159 160 uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */ 161 /* [0] basic features cpuid.1:%edx 162 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 163 * [2] extended features cpuid:80000001:%edx 164 * [3] extended features cpuid:80000001:%ecx 165 * [4] VIA padlock features 166 * [5] structured extended features cpuid.7:%ebx 167 * [6] structured extended features cpuid.7:%ecx 168 * [7] structured extended features cpuid.7:%edx 169 */ 170 171 const struct cpu_functions *ci_func; /* start/stop functions */ 172 struct trapframe *ci_ddb_regs; 173 174 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 175 struct x86_cache_info ci_cinfo[CAI_COUNT]; 176 177 #ifndef __HAVE_DIRECT_MAP 178 #define VPAGE_SRC 0 179 #define VPAGE_DST 1 180 #define VPAGE_ZER 2 181 #define VPAGE_PTP 3 182 #define VPAGE_MAX 4 183 vaddr_t vpage[VPAGE_MAX]; 184 pt_entry_t *vpage_pte[VPAGE_MAX]; 185 #endif 186 187 #ifdef PAE 188 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 189 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 190 #endif 191 192 #ifdef SVS 193 pd_entry_t * ci_svs_updir; 194 paddr_t ci_svs_updirpa; 195 paddr_t ci_svs_kpdirpa; 196 kmutex_t ci_svs_mtx; 197 pd_entry_t * ci_svs_rsp0_pte; 198 vaddr_t ci_svs_rsp0; 199 vaddr_t ci_svs_ursp0; 200 vaddr_t ci_svs_krsp0; 201 vaddr_t ci_svs_utls; 202 #endif 203 204 #if defined(XEN) && (defined(PAE) || defined(__x86_64__)) 205 /* Currently active user PGD (can't use rcr3() with Xen) */ 206 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 207 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 208 kmutex_t ci_kpm_mtx; 209 #if defined(__x86_64__) 210 /* per-cpu version of normal_pdes */ 211 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ 212 paddr_t ci_xen_current_user_pgd; 213 #endif /* __x86_64__ */ 214 #endif /* XEN et.al */ 215 216 #ifdef XEN 217 size_t ci_xpq_idx; 218 #endif 219 220 #ifndef XEN 221 struct evcnt ci_ipi_events[X86_NIPI]; 222 #else /* XEN */ 223 struct evcnt ci_ipi_events[XEN_NIPIS]; 224 evtchn_port_t ci_ipi_evtchn; 225 #endif /* XEN */ 226 227 device_t ci_frequency; /* Frequency scaling technology */ 228 device_t ci_padlock; /* VIA PadLock private storage */ 229 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 230 device_t ci_vm; /* Virtual machine guest driver */ 231 232 /* 233 * Segmentation-related data. 234 */ 235 union descriptor *ci_gdt; 236 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 237 int ci_tss_sel; /* TSS selector of this cpu */ 238 239 #ifdef XEN 240 /* Xen raw system time at which we last ran hardclock. */ 241 uint64_t ci_xen_hardclock_systime_ns; 242 243 /* 244 * Last TSC-adjusted local Xen system time we observed. Used 245 * to detect whether the Xen clock has gone backwards. 246 */ 247 uint64_t ci_xen_last_systime_ns; 248 249 /* 250 * Distance in nanoseconds from the local view of system time 251 * to the global view of system time, if the local time is 252 * behind the global time. 253 */ 254 uint64_t ci_xen_systime_ns_skew; 255 256 /* Xen periodic timer interrupt handle. */ 257 struct intrhand *ci_xen_timer_intrhand; 258 259 /* Event counters for various pathologies that might happen. */ 260 struct evcnt ci_xen_cpu_tsc_backwards_evcnt; 261 struct evcnt ci_xen_tsc_delta_negative_evcnt; 262 struct evcnt ci_xen_raw_systime_wraparound_evcnt; 263 struct evcnt ci_xen_raw_systime_backwards_evcnt; 264 struct evcnt ci_xen_systime_backwards_hardclock_evcnt; 265 struct evcnt ci_xen_missed_hardclock_evcnt; 266 #endif 267 268 /* 269 * The following two are actually region_descriptors, 270 * but that would pollute the namespace. 271 */ 272 uintptr_t ci_suspend_gdt; 273 uint16_t ci_suspend_gdt_padding; 274 uintptr_t ci_suspend_idt; 275 uint16_t ci_suspend_idt_padding; 276 277 uint16_t ci_suspend_tr; 278 uint16_t ci_suspend_ldt; 279 uintptr_t ci_suspend_fs; 280 uintptr_t ci_suspend_gs; 281 uintptr_t ci_suspend_kgs; 282 uintptr_t ci_suspend_efer; 283 uintptr_t ci_suspend_reg[12]; 284 uintptr_t ci_suspend_cr0; 285 uintptr_t ci_suspend_cr2; 286 uintptr_t ci_suspend_cr3; 287 uintptr_t ci_suspend_cr4; 288 uintptr_t ci_suspend_cr8; 289 290 /* The following must be in a single cache line. */ 291 int ci_want_resched __aligned(64); 292 int ci_padout __aligned(64); 293 }; 294 295 /* 296 * Macros to handle (some) trapframe registers for common x86 code. 297 */ 298 #ifdef __x86_64__ 299 #define X86_TF_RAX(tf) tf->tf_rax 300 #define X86_TF_RDX(tf) tf->tf_rdx 301 #define X86_TF_RSP(tf) tf->tf_rsp 302 #define X86_TF_RIP(tf) tf->tf_rip 303 #define X86_TF_RFLAGS(tf) tf->tf_rflags 304 #else 305 #define X86_TF_RAX(tf) tf->tf_eax 306 #define X86_TF_RDX(tf) tf->tf_edx 307 #define X86_TF_RSP(tf) tf->tf_esp 308 #define X86_TF_RIP(tf) tf->tf_eip 309 #define X86_TF_RFLAGS(tf) tf->tf_eflags 310 #endif 311 312 /* 313 * Processor flag notes: The "primary" CPU has certain MI-defined 314 * roles (mostly relating to hardclock handling); we distinguish 315 * between the processor which booted us, and the processor currently 316 * holding the "primary" role just to give us the flexibility later to 317 * change primaries should we be sufficiently twisted. 318 */ 319 320 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 321 #define CPUF_AP 0x0002 /* CPU is an AP */ 322 #define CPUF_SP 0x0004 /* CPU is only processor */ 323 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 324 325 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 326 #define CPUF_PRESENT 0x1000 /* CPU is present */ 327 #define CPUF_RUNNING 0x2000 /* CPU is running */ 328 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 329 #define CPUF_GO 0x8000 /* CPU should start running */ 330 331 #endif /* _KERNEL || __KMEMUSER */ 332 333 #ifdef _KERNEL 334 /* 335 * We statically allocate the CPU info for the primary CPU (or, 336 * the only CPU on uniprocessors), and the primary CPU is the 337 * first CPU on the CPU info list. 338 */ 339 extern struct cpu_info cpu_info_primary; 340 extern struct cpu_info *cpu_info_list; 341 342 #define CPU_INFO_ITERATOR int __unused 343 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 344 ci != NULL; ci = ci->ci_next 345 346 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 347 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 348 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 349 350 #if !defined(__GNUC__) || defined(_MODULE) 351 /* For non-GCC and modules */ 352 struct cpu_info *x86_curcpu(void); 353 void cpu_set_curpri(int); 354 # ifdef __GNUC__ 355 lwp_t *x86_curlwp(void) __attribute__ ((const)); 356 # else 357 lwp_t *x86_curlwp(void); 358 # endif 359 #endif 360 361 #define cpu_number() (cpu_index(curcpu())) 362 363 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 364 365 #define X86_AST_GENERIC 0x01 366 #define X86_AST_PREEMPT 0x02 367 368 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 369 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 370 371 void cpu_boot_secondary_processors(void); 372 void cpu_init_idle_lwps(void); 373 void cpu_init_msrs(struct cpu_info *, bool); 374 void cpu_load_pmap(struct pmap *, struct pmap *); 375 void cpu_broadcast_halt(void); 376 void cpu_kick(struct cpu_info *); 377 378 void cpu_pcpuarea_init(struct cpu_info *); 379 void cpu_svs_init(struct cpu_info *); 380 void cpu_speculation_init(struct cpu_info *); 381 382 #define curcpu() x86_curcpu() 383 #define curlwp x86_curlwp() 384 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 385 386 /* 387 * Arguments to hardclock, softclock and statclock 388 * encapsulate the previous machine state in an opaque 389 * clockframe; for now, use generic intrframe. 390 */ 391 struct clockframe { 392 struct intrframe cf_if; 393 }; 394 395 /* 396 * Give a profiling tick to the current process when the user profiling 397 * buffer pages are invalid. On the i386, request an ast to send us 398 * through trap(), marking the proc as needing a profiling tick. 399 */ 400 extern void cpu_need_proftick(struct lwp *l); 401 402 /* 403 * Notify the LWP l that it has a signal pending, process as soon as 404 * possible. 405 */ 406 extern void cpu_signotify(struct lwp *); 407 408 /* 409 * We need a machine-independent name for this. 410 */ 411 extern void (*delay_func)(unsigned int); 412 struct timeval; 413 414 #ifndef __HIDE_DELAY 415 #define DELAY(x) (*delay_func)(x) 416 #define delay(x) (*delay_func)(x) 417 #endif 418 419 extern int biosbasemem; 420 extern int biosextmem; 421 extern int cputype; 422 extern int cpuid_level; 423 extern int cpu_class; 424 extern char cpu_brand_string[]; 425 extern int use_pae; 426 427 #ifdef __i386__ 428 #define i386_fpu_present 1 429 int npx586bug1(int, int); 430 extern int i386_fpu_fdivbug; 431 extern int i386_use_fxsave; 432 extern int i386_has_sse; 433 extern int i386_has_sse2; 434 #else 435 #define i386_fpu_present 1 436 #define i386_fpu_fdivbug 0 437 #define i386_use_fxsave 1 438 #define i386_has_sse 1 439 #define i386_has_sse2 1 440 #endif 441 442 extern int x86_fpu_save; 443 #define FPU_SAVE_FSAVE 0 444 #define FPU_SAVE_FXSAVE 1 445 #define FPU_SAVE_XSAVE 2 446 #define FPU_SAVE_XSAVEOPT 3 447 extern unsigned int x86_fpu_save_size; 448 extern uint64_t x86_xsave_features; 449 extern bool x86_fpu_eager; 450 451 extern void (*x86_cpu_idle)(void); 452 #define cpu_idle() (*x86_cpu_idle)() 453 454 /* machdep.c */ 455 #ifdef i386 456 void cpu_set_tss_gates(struct cpu_info *); 457 #endif 458 void cpu_reset(void); 459 460 /* longrun.c */ 461 u_int tmx86_get_longrun_mode(void); 462 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 463 void tmx86_init_longrun(void); 464 465 /* identcpu.c */ 466 void cpu_probe(struct cpu_info *); 467 void cpu_identify(struct cpu_info *); 468 void identify_hypervisor(void); 469 470 typedef enum vm_guest { 471 VM_GUEST_NO = 0, 472 VM_GUEST_VM, 473 VM_GUEST_XEN, 474 VM_GUEST_HV, 475 VM_GUEST_VMWARE, 476 VM_GUEST_KVM, 477 VM_LAST 478 } vm_guest_t; 479 extern vm_guest_t vm_guest; 480 481 /* cpu_topology.c */ 482 void x86_cpu_topology(struct cpu_info *); 483 484 /* locore.s */ 485 struct region_descriptor; 486 void lgdt(struct region_descriptor *); 487 #ifdef XEN 488 void lgdt_finish(void); 489 #endif 490 491 struct pcb; 492 void savectx(struct pcb *); 493 void lwp_trampoline(void); 494 #ifdef XEN 495 void startrtclock(void); 496 void xen_delay(unsigned int); 497 void xen_initclocks(void); 498 void xen_suspendclocks(struct cpu_info *); 499 void xen_resumeclocks(struct cpu_info *); 500 #else 501 /* clock.c */ 502 void initrtclock(u_long); 503 void startrtclock(void); 504 void i8254_delay(unsigned int); 505 void i8254_microtime(struct timeval *); 506 void i8254_initclocks(void); 507 #endif 508 509 /* cpu.c */ 510 void cpu_probe_features(struct cpu_info *); 511 512 /* vm_machdep.c */ 513 void cpu_proc_fork(struct proc *, struct proc *); 514 paddr_t kvtop(void *); 515 516 #ifdef USER_LDT 517 /* sys_machdep.h */ 518 int x86_get_ldt(struct lwp *, void *, register_t *); 519 int x86_set_ldt(struct lwp *, void *, register_t *); 520 #endif 521 522 /* isa_machdep.c */ 523 void isa_defaultirq(void); 524 int isa_nmi(void); 525 526 /* consinit.c */ 527 void kgdb_port_init(void); 528 529 /* bus_machdep.c */ 530 void x86_bus_space_init(void); 531 void x86_bus_space_mallocok(void); 532 533 #endif /* _KERNEL */ 534 535 #if defined(_KERNEL) || defined(_KMEMUSER) 536 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 537 #endif /* _KERNEL || __KMEMUSER */ 538 539 /* 540 * CTL_MACHDEP definitions. 541 */ 542 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 543 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 544 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 545 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 546 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 547 #define CPU_DISKINFO 6 /* struct disklist *: 548 * disk geometry information */ 549 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 550 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 551 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 552 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 553 #define CPU_TMLR_MODE 11 /* int: longrun mode 554 * 0: minimum frequency 555 * 1: economy 556 * 2: performance 557 * 3: maximum frequency 558 */ 559 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 560 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 561 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 562 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 563 * to use this, CPU_OSFXSR must be true 564 * 0: FSAVE 565 * 1: FXSAVE 566 * 2: XSAVE 567 * 3: XSAVEOPT 568 */ 569 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 570 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 571 572 #define CPU_MAXID 18 /* number of valid machdep ids */ 573 574 /* 575 * Structure for CPU_DISKINFO sysctl call. 576 * XXX this should be somewhere else. 577 */ 578 #define MAX_BIOSDISKS 16 579 580 struct disklist { 581 int dl_nbiosdisks; /* number of bios disks */ 582 int dl_unused; 583 struct biosdisk_info { 584 int bi_dev; /* BIOS device # (0x80 ..) */ 585 int bi_cyl; /* cylinders on disk */ 586 int bi_head; /* heads per track */ 587 int bi_sec; /* sectors per track */ 588 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 589 #define BIFLAG_INVALID 0x01 590 #define BIFLAG_EXTINT13 0x02 591 int bi_flags; 592 int bi_unused; 593 } dl_biosdisks[MAX_BIOSDISKS]; 594 595 int dl_nnativedisks; /* number of native disks */ 596 struct nativedisk_info { 597 char ni_devname[16]; /* native device name */ 598 int ni_nmatches; /* # of matches w/ BIOS */ 599 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 600 } dl_nativedisks[1]; /* actually longer */ 601 }; 602 #endif /* !_X86_CPU_H_ */ 603
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