cpu.h revision 1.96
1 /* $NetBSD: cpu.h,v 1.96 2018/07/16 07:07:30 pgoyette Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #ifdef i386 52 #include "opt_user_ldt.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/xen-public/xen.h> 73 #include <xen/xen-public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 struct cpu_tss { 88 #ifdef i386 89 struct i386tss dblflt_tss; 90 struct i386tss ddbipi_tss; 91 #endif 92 struct i386tss tss; 93 uint8_t iomap[IOMAPSIZE]; 94 } __packed; 95 96 /* 97 * a bunch of this belongs in cpuvar.h; move it later.. 98 */ 99 100 struct cpu_info { 101 struct cpu_data ci_data; /* MI per-cpu data */ 102 device_t ci_dev; /* pointer to our device */ 103 struct cpu_info *ci_self; /* self-pointer */ 104 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 105 106 /* 107 * Will be accessed by other CPUs. 108 */ 109 struct cpu_info *ci_next; /* next cpu */ 110 struct lwp *ci_curlwp; /* current owner of the processor */ 111 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 112 cpuid_t ci_cpuid; /* our CPU ID */ 113 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 114 uint32_t ci_initapicid; /* our initial APIC ID */ 115 116 /* 117 * Private members. 118 */ 119 struct pmap *ci_pmap; /* current pmap */ 120 int ci_want_pmapload; /* pmap_load() is needed */ 121 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 122 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 123 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 124 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 125 int ci_curldt; /* current LDT descriptor */ 126 int ci_nintrhand; /* number of H/W interrupt handlers */ 127 uint64_t ci_scratch; 128 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 129 130 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 131 132 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 133 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 134 135 /* The following must be aligned for cmpxchg8b. */ 136 struct { 137 uint32_t ipending; 138 int ilevel; 139 } ci_istate __aligned(8); 140 #define ci_ipending ci_istate.ipending 141 #define ci_ilevel ci_istate.ilevel 142 143 int ci_idepth; 144 void * ci_intrstack; 145 uint32_t ci_imask[NIPL]; 146 uint32_t ci_iunmask[NIPL]; 147 148 uint32_t ci_flags; /* flags; see below */ 149 uint32_t ci_ipis; /* interprocessor interrupts pending */ 150 151 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 152 uint32_t ci_vendor[4]; /* vendor string */ 153 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 154 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 155 volatile uint32_t ci_lapic_counter; 156 157 uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */ 158 /* [0] basic features cpuid.1:%edx 159 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 160 * [2] extended features cpuid:80000001:%edx 161 * [3] extended features cpuid:80000001:%ecx 162 * [4] VIA padlock features 163 * [5] structured extended features cpuid.7:%ebx 164 * [6] structured extended features cpuid.7:%ecx 165 * [7] structured extended features cpuid.7:%edx 166 */ 167 168 const struct cpu_functions *ci_func; /* start/stop functions */ 169 struct trapframe *ci_ddb_regs; 170 171 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 172 struct x86_cache_info ci_cinfo[CAI_COUNT]; 173 174 device_t ci_frequency; /* Frequency scaling technology */ 175 device_t ci_padlock; /* VIA PadLock private storage */ 176 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 177 device_t ci_vm; /* Virtual machine guest driver */ 178 179 /* 180 * Segmentation-related data. 181 */ 182 union descriptor *ci_gdt; 183 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 184 int ci_tss_sel; /* TSS selector of this cpu */ 185 186 /* 187 * The following two are actually region_descriptors, 188 * but that would pollute the namespace. 189 */ 190 uintptr_t ci_suspend_gdt; 191 uint16_t ci_suspend_gdt_padding; 192 uintptr_t ci_suspend_idt; 193 uint16_t ci_suspend_idt_padding; 194 195 uint16_t ci_suspend_tr; 196 uint16_t ci_suspend_ldt; 197 uintptr_t ci_suspend_fs; 198 uintptr_t ci_suspend_gs; 199 uintptr_t ci_suspend_kgs; 200 uintptr_t ci_suspend_efer; 201 uintptr_t ci_suspend_reg[12]; 202 uintptr_t ci_suspend_cr0; 203 uintptr_t ci_suspend_cr2; 204 uintptr_t ci_suspend_cr3; 205 uintptr_t ci_suspend_cr4; 206 uintptr_t ci_suspend_cr8; 207 208 /* The following must be in a single cache line. */ 209 int ci_want_resched __aligned(64); 210 int ci_padout __aligned(64); 211 212 #ifndef __HAVE_DIRECT_MAP 213 #define VPAGE_SRC 0 214 #define VPAGE_DST 1 215 #define VPAGE_ZER 2 216 #define VPAGE_PTP 3 217 #define VPAGE_MAX 4 218 vaddr_t vpage[VPAGE_MAX]; 219 pt_entry_t *vpage_pte[VPAGE_MAX]; 220 #endif 221 222 #ifdef PAE 223 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 224 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 225 #endif 226 227 #ifdef SVS 228 pd_entry_t * ci_svs_updir; 229 paddr_t ci_svs_updirpa; 230 paddr_t ci_svs_kpdirpa; 231 kmutex_t ci_svs_mtx; 232 pd_entry_t * ci_svs_rsp0_pte; 233 vaddr_t ci_svs_rsp0; 234 vaddr_t ci_svs_ursp0; 235 vaddr_t ci_svs_krsp0; 236 vaddr_t ci_svs_utls; 237 #endif 238 239 #if defined(XEN) 240 #if defined(PAE) || defined(__x86_64__) 241 /* Currently active user PGD (can't use rcr3() with Xen) */ 242 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 243 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 244 kmutex_t ci_kpm_mtx; 245 #endif /* defined(PAE) || defined(__x86_64__) */ 246 247 #if defined(__x86_64__) 248 /* per-cpu version of normal_pdes */ 249 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ 250 paddr_t ci_xen_current_user_pgd; 251 #endif /* defined(__x86_64__) */ 252 253 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 254 struct evcnt ci_ipi_events[XEN_NIPIS]; 255 evtchn_port_t ci_ipi_evtchn; 256 size_t ci_xpq_idx; 257 /* Xen raw system time at which we last ran hardclock. */ 258 uint64_t ci_xen_hardclock_systime_ns; 259 260 /* 261 * Last TSC-adjusted local Xen system time we observed. Used 262 * to detect whether the Xen clock has gone backwards. 263 */ 264 uint64_t ci_xen_last_systime_ns; 265 266 /* 267 * Distance in nanoseconds from the local view of system time 268 * to the global view of system time, if the local time is 269 * behind the global time. 270 */ 271 uint64_t ci_xen_systime_ns_skew; 272 273 /* Xen periodic timer interrupt handle. */ 274 struct intrhand *ci_xen_timer_intrhand; 275 276 /* Event counters for various pathologies that might happen. */ 277 struct evcnt ci_xen_cpu_tsc_backwards_evcnt; 278 struct evcnt ci_xen_tsc_delta_negative_evcnt; 279 struct evcnt ci_xen_raw_systime_wraparound_evcnt; 280 struct evcnt ci_xen_raw_systime_backwards_evcnt; 281 struct evcnt ci_xen_systime_backwards_hardclock_evcnt; 282 struct evcnt ci_xen_missed_hardclock_evcnt; 283 #else /* defined(XEN) */ 284 struct evcnt ci_ipi_events[X86_NIPI]; 285 #endif /* defined(XEN) */ 286 287 }; 288 289 /* 290 * Macros to handle (some) trapframe registers for common x86 code. 291 */ 292 #ifdef __x86_64__ 293 #define X86_TF_RAX(tf) tf->tf_rax 294 #define X86_TF_RDX(tf) tf->tf_rdx 295 #define X86_TF_RSP(tf) tf->tf_rsp 296 #define X86_TF_RIP(tf) tf->tf_rip 297 #define X86_TF_RFLAGS(tf) tf->tf_rflags 298 #else 299 #define X86_TF_RAX(tf) tf->tf_eax 300 #define X86_TF_RDX(tf) tf->tf_edx 301 #define X86_TF_RSP(tf) tf->tf_esp 302 #define X86_TF_RIP(tf) tf->tf_eip 303 #define X86_TF_RFLAGS(tf) tf->tf_eflags 304 #endif 305 306 /* 307 * Processor flag notes: The "primary" CPU has certain MI-defined 308 * roles (mostly relating to hardclock handling); we distinguish 309 * between the processor which booted us, and the processor currently 310 * holding the "primary" role just to give us the flexibility later to 311 * change primaries should we be sufficiently twisted. 312 */ 313 314 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 315 #define CPUF_AP 0x0002 /* CPU is an AP */ 316 #define CPUF_SP 0x0004 /* CPU is only processor */ 317 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 318 319 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 320 #define CPUF_PRESENT 0x1000 /* CPU is present */ 321 #define CPUF_RUNNING 0x2000 /* CPU is running */ 322 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 323 #define CPUF_GO 0x8000 /* CPU should start running */ 324 325 #endif /* _KERNEL || __KMEMUSER */ 326 327 #ifdef _KERNEL 328 /* 329 * We statically allocate the CPU info for the primary CPU (or, 330 * the only CPU on uniprocessors), and the primary CPU is the 331 * first CPU on the CPU info list. 332 */ 333 extern struct cpu_info cpu_info_primary; 334 extern struct cpu_info *cpu_info_list; 335 336 #define CPU_INFO_ITERATOR int __unused 337 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 338 ci != NULL; ci = ci->ci_next 339 340 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 341 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 342 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 343 344 #if !defined(__GNUC__) || defined(_MODULE) 345 /* For non-GCC and modules */ 346 struct cpu_info *x86_curcpu(void); 347 void cpu_set_curpri(int); 348 # ifdef __GNUC__ 349 lwp_t *x86_curlwp(void) __attribute__ ((const)); 350 # else 351 lwp_t *x86_curlwp(void); 352 # endif 353 #endif 354 355 #define cpu_number() (cpu_index(curcpu())) 356 357 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 358 359 #define X86_AST_GENERIC 0x01 360 #define X86_AST_PREEMPT 0x02 361 362 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 363 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 364 365 void cpu_boot_secondary_processors(void); 366 void cpu_init_idle_lwps(void); 367 void cpu_init_msrs(struct cpu_info *, bool); 368 void cpu_load_pmap(struct pmap *, struct pmap *); 369 void cpu_broadcast_halt(void); 370 void cpu_kick(struct cpu_info *); 371 372 void cpu_pcpuarea_init(struct cpu_info *); 373 void cpu_svs_init(struct cpu_info *); 374 void cpu_speculation_init(struct cpu_info *); 375 376 #define curcpu() x86_curcpu() 377 #define curlwp x86_curlwp() 378 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 379 380 /* 381 * Arguments to hardclock, softclock and statclock 382 * encapsulate the previous machine state in an opaque 383 * clockframe; for now, use generic intrframe. 384 */ 385 struct clockframe { 386 struct intrframe cf_if; 387 }; 388 389 /* 390 * Give a profiling tick to the current process when the user profiling 391 * buffer pages are invalid. On the i386, request an ast to send us 392 * through trap(), marking the proc as needing a profiling tick. 393 */ 394 extern void cpu_need_proftick(struct lwp *l); 395 396 /* 397 * Notify the LWP l that it has a signal pending, process as soon as 398 * possible. 399 */ 400 extern void cpu_signotify(struct lwp *); 401 402 /* 403 * We need a machine-independent name for this. 404 */ 405 extern void (*delay_func)(unsigned int); 406 struct timeval; 407 408 #ifndef __HIDE_DELAY 409 #define DELAY(x) (*delay_func)(x) 410 #define delay(x) (*delay_func)(x) 411 #endif 412 413 extern int biosbasemem; 414 extern int biosextmem; 415 extern int cputype; 416 extern int cpuid_level; 417 extern int cpu_class; 418 extern char cpu_brand_string[]; 419 extern int use_pae; 420 421 #ifdef __i386__ 422 #define i386_fpu_present 1 423 int npx586bug1(int, int); 424 extern int i386_fpu_fdivbug; 425 extern int i386_use_fxsave; 426 extern int i386_has_sse; 427 extern int i386_has_sse2; 428 #else 429 #define i386_fpu_present 1 430 #define i386_fpu_fdivbug 0 431 #define i386_use_fxsave 1 432 #define i386_has_sse 1 433 #define i386_has_sse2 1 434 #endif 435 436 extern int x86_fpu_save; 437 #define FPU_SAVE_FSAVE 0 438 #define FPU_SAVE_FXSAVE 1 439 #define FPU_SAVE_XSAVE 2 440 #define FPU_SAVE_XSAVEOPT 3 441 extern unsigned int x86_fpu_save_size; 442 extern uint64_t x86_xsave_features; 443 extern bool x86_fpu_eager; 444 445 extern void (*x86_cpu_idle)(void); 446 #define cpu_idle() (*x86_cpu_idle)() 447 448 /* machdep.c */ 449 #ifdef i386 450 void cpu_set_tss_gates(struct cpu_info *); 451 #endif 452 void cpu_reset(void); 453 454 /* longrun.c */ 455 u_int tmx86_get_longrun_mode(void); 456 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 457 void tmx86_init_longrun(void); 458 459 /* identcpu.c */ 460 void cpu_probe(struct cpu_info *); 461 void cpu_identify(struct cpu_info *); 462 void identify_hypervisor(void); 463 464 typedef enum vm_guest { 465 VM_GUEST_NO = 0, 466 VM_GUEST_VM, 467 VM_GUEST_XEN, 468 VM_GUEST_HV, 469 VM_GUEST_VMWARE, 470 VM_GUEST_KVM, 471 VM_LAST 472 } vm_guest_t; 473 extern vm_guest_t vm_guest; 474 475 /* cpu_topology.c */ 476 void x86_cpu_topology(struct cpu_info *); 477 478 /* locore.s */ 479 struct region_descriptor; 480 void lgdt(struct region_descriptor *); 481 #ifdef XEN 482 void lgdt_finish(void); 483 #endif 484 485 struct pcb; 486 void savectx(struct pcb *); 487 void lwp_trampoline(void); 488 #ifdef XEN 489 void startrtclock(void); 490 void xen_delay(unsigned int); 491 void xen_initclocks(void); 492 void xen_suspendclocks(struct cpu_info *); 493 void xen_resumeclocks(struct cpu_info *); 494 #else 495 /* clock.c */ 496 void initrtclock(u_long); 497 void startrtclock(void); 498 void i8254_delay(unsigned int); 499 void i8254_microtime(struct timeval *); 500 void i8254_initclocks(void); 501 #endif 502 503 /* cpu.c */ 504 void cpu_probe_features(struct cpu_info *); 505 506 /* vm_machdep.c */ 507 void cpu_proc_fork(struct proc *, struct proc *); 508 paddr_t kvtop(void *); 509 510 #ifdef USER_LDT 511 /* sys_machdep.h */ 512 int x86_get_ldt(struct lwp *, void *, register_t *); 513 int x86_set_ldt(struct lwp *, void *, register_t *); 514 #endif 515 516 /* isa_machdep.c */ 517 void isa_defaultirq(void); 518 int isa_nmi(void); 519 520 /* consinit.c */ 521 void kgdb_port_init(void); 522 523 /* bus_machdep.c */ 524 void x86_bus_space_init(void); 525 void x86_bus_space_mallocok(void); 526 527 #endif /* _KERNEL */ 528 529 #if defined(_KERNEL) || defined(_KMEMUSER) 530 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 531 #endif /* _KERNEL || __KMEMUSER */ 532 533 /* 534 * CTL_MACHDEP definitions. 535 */ 536 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 537 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 538 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 539 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 540 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 541 #define CPU_DISKINFO 6 /* struct disklist *: 542 * disk geometry information */ 543 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 544 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 545 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 546 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 547 #define CPU_TMLR_MODE 11 /* int: longrun mode 548 * 0: minimum frequency 549 * 1: economy 550 * 2: performance 551 * 3: maximum frequency 552 */ 553 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 554 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 555 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 556 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 557 * to use this, CPU_OSFXSR must be true 558 * 0: FSAVE 559 * 1: FXSAVE 560 * 2: XSAVE 561 * 3: XSAVEOPT 562 */ 563 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 564 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 565 566 #define CPU_MAXID 18 /* number of valid machdep ids */ 567 568 /* 569 * Structure for CPU_DISKINFO sysctl call. 570 * XXX this should be somewhere else. 571 */ 572 #define MAX_BIOSDISKS 16 573 574 struct disklist { 575 int dl_nbiosdisks; /* number of bios disks */ 576 int dl_unused; 577 struct biosdisk_info { 578 int bi_dev; /* BIOS device # (0x80 ..) */ 579 int bi_cyl; /* cylinders on disk */ 580 int bi_head; /* heads per track */ 581 int bi_sec; /* sectors per track */ 582 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 583 #define BIFLAG_INVALID 0x01 584 #define BIFLAG_EXTINT13 0x02 585 int bi_flags; 586 int bi_unused; 587 } dl_biosdisks[MAX_BIOSDISKS]; 588 589 int dl_nnativedisks; /* number of native disks */ 590 struct nativedisk_info { 591 char ni_devname[16]; /* native device name */ 592 int ni_nmatches; /* # of matches w/ BIOS */ 593 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 594 } dl_nativedisks[1]; /* actually longer */ 595 }; 596 #endif /* !_X86_CPU_H_ */ 597
Indexes created Wed Sep 24 05:09:52 GMT 2025