dbregs.h revision 1.2.2.2
1 1.2.2.2 pgoyette /* $NetBSD: dbregs.h,v 1.2.2.2 2017/01/07 08:56:28 pgoyette Exp $ */ 2 1.2.2.2 pgoyette 3 1.2.2.2 pgoyette /*- 4 1.2.2.2 pgoyette * Copyright (c) 2016 The NetBSD Foundation, Inc. 5 1.2.2.2 pgoyette * All rights reserved. 6 1.2.2.2 pgoyette * 7 1.2.2.2 pgoyette * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 pgoyette * modification, are permitted provided that the following conditions 9 1.2.2.2 pgoyette * are met: 10 1.2.2.2 pgoyette * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 pgoyette * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 pgoyette * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 pgoyette * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 pgoyette * documentation and/or other materials provided with the distribution. 15 1.2.2.2 pgoyette * 16 1.2.2.2 pgoyette * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 1.2.2.2 pgoyette * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 1.2.2.2 pgoyette * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 1.2.2.2 pgoyette * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 1.2.2.2 pgoyette * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.2.2.2 pgoyette * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.2.2.2 pgoyette * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.2.2.2 pgoyette * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.2.2.2 pgoyette * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.2.2.2 pgoyette * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.2.2.2 pgoyette * POSSIBILITY OF SUCH DAMAGE. 27 1.2.2.2 pgoyette */ 28 1.2.2.2 pgoyette 29 1.2.2.2 pgoyette 30 1.2.2.2 pgoyette #ifndef _X86_DBREGS_H_ 31 1.2.2.2 pgoyette #define _X86_DBREGS_H_ 32 1.2.2.2 pgoyette 33 1.2.2.2 pgoyette #if defined(_KMEMUSER) || defined(_KERNEL) 34 1.2.2.2 pgoyette 35 1.2.2.2 pgoyette #include <sys/param.h> 36 1.2.2.2 pgoyette #include <sys/types.h> 37 1.2.2.2 pgoyette 38 1.2.2.2 pgoyette /* 39 1.2.2.2 pgoyette * CPU Debug Status Register (DR6) 40 1.2.2.2 pgoyette * 41 1.2.2.2 pgoyette * Reserved bits: 4-12 and on x86_64 32-64 42 1.2.2.2 pgoyette */ 43 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR6_DR0_BREAKPOINT_CONDITION_DETECTED __BIT(0) 44 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR6_DR1_BREAKPOINT_CONDITION_DETECTED __BIT(1) 45 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR6_DR2_BREAKPOINT_CONDITION_DETECTED __BIT(2) 46 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR6_DR3_BREAKPOINT_CONDITION_DETECTED __BIT(3) 47 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR6_DEBUG_REGISTER_ACCESS_DETECTED __BIT(13) 48 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR6_SINGLE_STEP __BIT(14) 49 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR6_TASK_SWITCH __BIT(15) 50 1.2.2.2 pgoyette 51 1.2.2.2 pgoyette /* 52 1.2.2.2 pgoyette * CPU Debug Control Register (DR7) 53 1.2.2.2 pgoyette * 54 1.2.2.2 pgoyette * LOCAL_EXACT_BREAKPOINT and GLOBAL_EXACT_BREAKPOINT are no longer used since 55 1.2.2.2 pgoyette * the P6 processor family - portable code should set these bits 56 1.2.2.2 pgoyette * unconditionally in oder to get exact breakpoints 57 1.2.2.2 pgoyette * 58 1.2.2.2 pgoyette * Reserved bits: 10, 12, 14-15 and on x86_64 32-64 59 1.2.2.2 pgoyette */ 60 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_LOCAL_DR0_BREAKPOINT __BIT(0) 61 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_GLOBAL_DR0_BREAKPOINT __BIT(1) 62 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_LOCAL_DR1_BREAKPOINT __BIT(2) 63 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_GLOBAL_DR1_BREAKPOINT __BIT(3) 64 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_LOCAL_DR2_BREAKPOINT __BIT(4) 65 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_GLOBAL_DR2_BREAKPOINT __BIT(5) 66 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_LOCAL_DR3_BREAKPOINT __BIT(6) 67 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_GLOBAL_DR3_BREAKPOINT __BIT(7) 68 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_LOCAL_EXACT_BREAKPOINT __BIT(8) 69 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_GLOBAL_EXACT_BREAKPOINT __BIT(9) 70 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_RESTRICTED_TRANSACTIONAL_MEMORY __BIT(11) 71 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_GENERAL_DETECT_ENABLE __BIT(13) 72 1.2.2.2 pgoyette 73 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_DR0_CONDITION_MASK __BITS(16, 17) 74 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_DR0_LENGTH_MASK __BITS(18, 19) 75 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_DR1_CONDITION_MASK __BITS(20, 21) 76 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_DR1_LENGTH_MASK __BITS(22, 23) 77 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_DR2_CONDITION_MASK __BITS(24, 25) 78 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_DR2_LENGTH_MASK __BITS(26, 27) 79 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_DR3_CONDITION_MASK __BITS(28, 29) 80 1.2.2.2 pgoyette #define X86_HW_WATCHPOINT_DR7_DR3_LENGTH_MASK __BITS(30, 31) 81 1.2.2.2 pgoyette 82 1.2.2.2 pgoyette #endif /* !defined(_KMEMUSER) && !defined(_KERNEL) */ 83 1.2.2.2 pgoyette 84 1.2.2.2 pgoyette /* 85 1.2.2.2 pgoyette * X86_HW_WATCHPOINT_DR7_CONDITION_IO_READWRITE is unused 86 1.2.2.2 pgoyette * it requires DE (debug extension) flag in control register CR4 set 87 1.2.2.2 pgoyette * not all CPUs support it 88 1.2.2.2 pgoyette */ 89 1.2.2.2 pgoyette enum x86_hw_watchpoint_condition { 90 1.2.2.2 pgoyette X86_HW_WATCHPOINT_DR7_CONDITION_EXECUTION = 0x0, 91 1.2.2.2 pgoyette X86_HW_WATCHPOINT_DR7_CONDITION_DATA_WRITE = 0x1, 92 1.2.2.2 pgoyette X86_HW_WATCHPOINT_DR7_CONDITION_IO_READWRITE = 0x2, 93 1.2.2.2 pgoyette X86_HW_WATCHPOINT_DR7_CONDITION_DATA_READWRITE = 0x3 94 1.2.2.2 pgoyette }; 95 1.2.2.2 pgoyette 96 1.2.2.2 pgoyette /* 97 1.2.2.2 pgoyette * 0x2 is currently unimplemented - it reflects 8 bytes on modern CPUs 98 1.2.2.2 pgoyette */ 99 1.2.2.2 pgoyette enum x86_hw_watchpoint_length { 100 1.2.2.2 pgoyette X86_HW_WATCHPOINT_DR7_LENGTH_BYTE = 0x0, 101 1.2.2.2 pgoyette X86_HW_WATCHPOINT_DR7_LENGTH_TWOBYTES = 0x1, 102 1.2.2.2 pgoyette /* 0x2 undefined */ 103 1.2.2.2 pgoyette X86_HW_WATCHPOINT_DR7_LENGTH_FOURBYTES = 0x3 104 1.2.2.2 pgoyette }; 105 1.2.2.2 pgoyette 106 1.2.2.2 pgoyette #if defined(_KMEMUSER) || defined(_KERNEL) 107 1.2.2.2 pgoyette 108 1.2.2.2 pgoyette /* 109 1.2.2.2 pgoyette * The number of available watchpoint registers available since Intel 80386 110 1.2.2.2 pgoyette * New CPUs ship with up to 16 Debug Registers but they still offer four 111 1.2.2.2 pgoyette * watchpoints, while there other registers are reserved 112 1.2.2.2 pgoyette */ 113 1.2.2.2 pgoyette #define X86_HW_WATCHPOINTS 4 114 1.2.2.2 pgoyette 115 1.2.2.2 pgoyette /* 116 1.2.2.2 pgoyette * lwpid - 0 means all LWPs in the process 117 1.2.2.2 pgoyette * address - 0 means that watchpoint is disabled 118 1.2.2.2 pgoyette */ 119 1.2.2.2 pgoyette struct x86_hw_watchpoint { 120 1.2.2.2 pgoyette vaddr_t address; 121 1.2.2.2 pgoyette enum x86_hw_watchpoint_condition condition; 122 1.2.2.2 pgoyette enum x86_hw_watchpoint_length length; 123 1.2.2.2 pgoyette }; 124 1.2.2.2 pgoyette 125 1.2.2.2 pgoyette /* 126 1.2.2.2 pgoyette * Set CPU Debug Registers - to be used before entering user-land context 127 1.2.2.2 pgoyette */ 128 1.2.2.2 pgoyette void set_x86_hw_watchpoints(struct lwp *l); 129 1.2.2.2 pgoyette 130 1.2.2.2 pgoyette /* 131 1.2.2.2 pgoyette * Reset CPU Debug Registers - to be used after entering kernel context 132 1.2.2.2 pgoyette */ 133 1.2.2.2 pgoyette void clear_x86_hw_watchpoints(void); 134 1.2.2.2 pgoyette 135 1.2.2.2 pgoyette /* 136 1.2.2.2 pgoyette * Check if trap is triggered from user-land if so return nonzero value 137 1.2.2.2 pgoyette * 138 1.2.2.2 pgoyette * This resets Debug Status Register (DR6) break point detection 139 1.2.2.2 pgoyette */ 140 1.2.2.2 pgoyette int user_trap_x86_hw_watchpoint(void); 141 1.2.2.2 pgoyette 142 1.2.2.2 pgoyette #endif /* !defined(_KMEMUSER) && !defined(_KERNEL) */ 143 1.2.2.2 pgoyette 144 1.2.2.2 pgoyette #endif /* !_X86_DBREGS_H_ */ 145
Indexes created Tue Oct 28 07:09:57 GMT 2025