ieee.h revision 1.4
11.4Skleink/* $NetBSD: ieee.h,v 1.4 2003/10/25 21:31:25 kleink Exp $ */ 21.1Sfvdl 31.1Sfvdl/* 41.1Sfvdl * Copyright (c) 1992, 1993 51.1Sfvdl * The Regents of the University of California. All rights reserved. 61.1Sfvdl * 71.1Sfvdl * This software was developed by the Computer Systems Engineering group 81.1Sfvdl * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 91.1Sfvdl * contributed to Berkeley. 101.1Sfvdl * 111.1Sfvdl * All advertising materials mentioning features or use of this software 121.1Sfvdl * must display the following acknowledgement: 131.1Sfvdl * This product includes software developed by the University of 141.1Sfvdl * California, Lawrence Berkeley Laboratory. 151.1Sfvdl * 161.1Sfvdl * Redistribution and use in source and binary forms, with or without 171.1Sfvdl * modification, are permitted provided that the following conditions 181.1Sfvdl * are met: 191.1Sfvdl * 1. Redistributions of source code must retain the above copyright 201.1Sfvdl * notice, this list of conditions and the following disclaimer. 211.1Sfvdl * 2. Redistributions in binary form must reproduce the above copyright 221.1Sfvdl * notice, this list of conditions and the following disclaimer in the 231.1Sfvdl * documentation and/or other materials provided with the distribution. 241.2Sagc * 3. Neither the name of the University nor the names of its contributors 251.1Sfvdl * may be used to endorse or promote products derived from this software 261.1Sfvdl * without specific prior written permission. 271.1Sfvdl * 281.1Sfvdl * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 291.1Sfvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 301.1Sfvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 311.1Sfvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 321.1Sfvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 331.1Sfvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 341.1Sfvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 351.1Sfvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 361.1Sfvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 371.1Sfvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 381.1Sfvdl * SUCH DAMAGE. 391.1Sfvdl * 401.1Sfvdl * @(#)ieee.h 8.1 (Berkeley) 6/11/93 411.1Sfvdl */ 421.1Sfvdl 431.1Sfvdl/* 441.1Sfvdl * ieee.h defines the machine-dependent layout of the machine's IEEE 451.1Sfvdl * floating point. It does *not* define (yet?) any of the rounding 461.1Sfvdl * mode bits, exceptions, and so forth. 471.1Sfvdl */ 481.1Sfvdl 491.1Sfvdl/* 501.1Sfvdl * Define the number of bits in each fraction and exponent. 511.1Sfvdl * 521.1Sfvdl * k k+1 531.1Sfvdl * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented 541.1Sfvdl * 551.1Sfvdl * (-exp_bias+1) 561.1Sfvdl * as fractions that look like 0.fffff x 2 . This means that 571.1Sfvdl * 581.1Sfvdl * -126 591.1Sfvdl * the number 0.10000 x 2 , for instance, is the same as the normalized 601.1Sfvdl * 611.1Sfvdl * -127 -128 621.1Sfvdl * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero 631.1Sfvdl * 641.1Sfvdl * -129 651.1Sfvdl * in the fraction; to represent 2 , we need two, and so on. This 661.1Sfvdl * 671.1Sfvdl * (-exp_bias-fracbits+1) 681.1Sfvdl * implies that the smallest denormalized number is 2 691.1Sfvdl * 701.1Sfvdl * for whichever format we are talking about: for single precision, for 711.1Sfvdl * 721.1Sfvdl * -126 -149 731.1Sfvdl * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and 741.1Sfvdl * 751.1Sfvdl * -149 == -127 - 23 + 1. 761.1Sfvdl */ 771.1Sfvdl#define SNG_EXPBITS 8 781.1Sfvdl#define SNG_FRACBITS 23 791.1Sfvdl 801.1Sfvdl#define DBL_EXPBITS 11 811.1Sfvdl#define DBL_FRACBITS 52 821.1Sfvdl 831.1Sfvdl#define EXT_EXPBITS 15 841.3Skleink#define EXT_FRACBITS 64 851.1Sfvdl 861.1Sfvdlstruct ieee_single { 871.1Sfvdl u_int sng_frac:23; 881.1Sfvdl u_int sng_exp:8; 891.1Sfvdl u_int sng_sign:1; 901.1Sfvdl}; 911.1Sfvdl 921.1Sfvdlstruct ieee_double { 931.1Sfvdl u_int dbl_fracl; 941.1Sfvdl u_int dbl_frach:20; 951.1Sfvdl u_int dbl_exp:11; 961.1Sfvdl u_int dbl_sign:1; 971.1Sfvdl}; 981.1Sfvdl 991.3Skleink/* 1001.3Skleink * Note that ieee_ext is the raw storage layout of the 80-bit 1011.3Skleink * extended-precision type as implemented by the FPU. Per the 1021.3Skleink * respective ABI specifications, it is followed by a tail padding of 1031.3Skleink * 1041.3Skleink * amd64: 48 bits, 1051.3Skleink * i386: 16 bits. 1061.3Skleink */ 1071.1Sfvdlstruct ieee_ext { 1081.1Sfvdl u_int ext_fracl; 1091.4Skleink u_int ext_frach:31; 1101.4Skleink u_int ext_int:1; 1111.1Sfvdl u_int ext_exp:15; 1121.1Sfvdl u_int ext_sign:1; 1131.1Sfvdl}; 1141.1Sfvdl 1151.1Sfvdl/* 1161.1Sfvdl * Floats whose exponent is in [1..INFNAN) (of whatever type) are 1171.1Sfvdl * `normal'. Floats whose exponent is INFNAN are either Inf or NaN. 1181.1Sfvdl * Floats whose exponent is zero are either zero (iff all fraction 1191.1Sfvdl * bits are zero) or subnormal values. 1201.1Sfvdl * 1211.1Sfvdl * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its 1221.1Sfvdl * high fraction; if the bit is set, it is a `quiet NaN'. 1231.1Sfvdl */ 1241.1Sfvdl#define SNG_EXP_INFNAN 255 1251.1Sfvdl#define DBL_EXP_INFNAN 2047 1261.1Sfvdl#define EXT_EXP_INFNAN 32767 1271.1Sfvdl 1281.1Sfvdl#if 0 1291.1Sfvdl#define SNG_QUIETNAN (1 << 22) 1301.1Sfvdl#define DBL_QUIETNAN (1 << 19) 1311.1Sfvdl#define EXT_QUIETNAN (1 << 15) 1321.1Sfvdl#endif 1331.1Sfvdl 1341.1Sfvdl/* 1351.1Sfvdl * Exponent biases. 1361.1Sfvdl */ 1371.1Sfvdl#define SNG_EXP_BIAS 127 1381.1Sfvdl#define DBL_EXP_BIAS 1023 1391.1Sfvdl#define EXT_EXP_BIAS 16383 140