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pmap.h revision 1.1.2.1
      1 /*	$NetBSD: pmap.h,v 1.1.2.1 2007/10/08 06:35:51 yamt Exp $	*/
      2 
      3 /*
      4  *
      5  * Copyright (c) 1997 Charles D. Cranor and Washington University.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgment:
     18  *      This product includes software developed by Charles D. Cranor and
     19  *      Washington University.
     20  * 4. The name of the author may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 /*
     36  * Copyright (c) 2001 Wasabi Systems, Inc.
     37  * All rights reserved.
     38  *
     39  * Written by Frank van der Linden for Wasabi Systems, Inc.
     40  *
     41  * Redistribution and use in source and binary forms, with or without
     42  * modification, are permitted provided that the following conditions
     43  * are met:
     44  * 1. Redistributions of source code must retain the above copyright
     45  *    notice, this list of conditions and the following disclaimer.
     46  * 2. Redistributions in binary form must reproduce the above copyright
     47  *    notice, this list of conditions and the following disclaimer in the
     48  *    documentation and/or other materials provided with the distribution.
     49  * 3. All advertising materials mentioning features or use of this software
     50  *    must display the following acknowledgement:
     51  *      This product includes software developed for the NetBSD Project by
     52  *      Wasabi Systems, Inc.
     53  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     54  *    or promote products derived from this software without specific prior
     55  *    written permission.
     56  *
     57  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     58  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     59  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     60  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     61  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     62  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     63  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     64  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     65  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     66  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     67  * POSSIBILITY OF SUCH DAMAGE.
     68  */
     69 
     70 /*
     71  * pmap.h: see pmap.c for the history of this pmap module.
     72  */
     73 
     74 #ifndef _X86_PMAP_H_
     75 #define	_X86_PMAP_H_
     76 
     77 #define ptei(VA)	(((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
     78 
     79 /*
     80  * pl*_pi: index in the ptp page for a pde mapping a VA.
     81  * (pl*_i below is the index in the virtual array of all pdes per level)
     82  */
     83 #define pl1_pi(VA)	(((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
     84 #define pl2_pi(VA)	(((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
     85 #define pl3_pi(VA)	(((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
     86 #define pl4_pi(VA)	(((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
     87 
     88 /*
     89  * pl*_i: generate index into pde/pte arrays in virtual space
     90  */
     91 #define pl1_i(VA)	(((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
     92 #define pl2_i(VA)	(((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
     93 #define pl3_i(VA)	(((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
     94 #define pl4_i(VA)	(((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
     95 #define pl_i(va, lvl) \
     96         (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
     97 
     98 /*
     99  * PTP macros:
    100  *   a PTP's index is the PD index of the PDE that points to it
    101  *   a PTP's offset is the byte-offset in the PTE space that this PTP is at
    102  *   a PTP's VA is the first VA mapped by that PTP
    103  */
    104 
    105 #define ptp_va2o(va, lvl)	(pl_i(va, (lvl)+1) * PAGE_SIZE)
    106 
    107 #if defined(_KERNEL)
    108 /*
    109  * pmap data structures: see pmap.c for details of locking.
    110  */
    111 
    112 struct pmap;
    113 typedef struct pmap *pmap_t;
    114 
    115 /*
    116  * we maintain a list of all non-kernel pmaps
    117  */
    118 
    119 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
    120 
    121 /*
    122  * the pmap structure
    123  *
    124  * note that the pm_obj contains the simple_lock, the reference count,
    125  * page list, and number of PTPs within the pmap.
    126  *
    127  * pm_lock is the same as the spinlock for vm object 0. Changes to
    128  * the other objects may only be made if that lock has been taken
    129  * (the other object locks are only used when uvm_pagealloc is called)
    130  *
    131  * XXX If we ever support processor numbers higher than 31, we'll have
    132  * XXX to rethink the CPU mask.
    133  */
    134 
    135 struct pmap {
    136 	struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
    137 #define	pm_lock	pm_obj[0].vmobjlock
    138 	LIST_ENTRY(pmap) pm_list;	/* list (lck by pm_list lock) */
    139 	pd_entry_t *pm_pdir;		/* VA of PD (lck by object lock) */
    140 	paddr_t pm_pdirpa;		/* PA of PD (read-only after create) */
    141 	struct vm_page *pm_ptphint[PTP_LEVELS-1];
    142 					/* pointer to a PTP in our pmap */
    143 	struct pmap_statistics pm_stats;  /* pmap stats (lck by object lock) */
    144 
    145 	vaddr_t pm_hiexec;		/* highest executable mapping */
    146 	int pm_flags;			/* see below */
    147 
    148 	union descriptor *pm_ldt;	/* user-set LDT */
    149 	int pm_ldt_len;			/* number of LDT entries */
    150 	int pm_ldt_sel;			/* LDT selector */
    151 	uint32_t pm_cpus;		/* mask of CPUs using pmap */
    152 	uint32_t pm_kernel_cpus;	/* mask of CPUs using kernel part
    153 					 of pmap */
    154 };
    155 
    156 /* pm_flags */
    157 #define	PMF_USER_LDT	0x01	/* pmap has user-set LDT */
    158 
    159 /*
    160  * for each managed physical page we maintain a list of <PMAP,VA>'s
    161  * which it is mapped at.  the list is headed by a pv_head structure.
    162  * there is one pv_head per managed phys page (allocated at boot time).
    163  * the pv_head structure points to a list of pv_entry structures (each
    164  * describes one mapping).
    165  */
    166 
    167 struct pv_entry {			/* locked by its list's pvh_lock */
    168 	SPLAY_ENTRY(pv_entry) pv_node;	/* splay-tree node */
    169 	struct pmap *pv_pmap;		/* the pmap */
    170 	vaddr_t pv_va;			/* the virtual address */
    171 	struct vm_page *pv_ptp;		/* the vm_page of the PTP */
    172 	struct pmap_cpu *pv_alloc_cpu;	/* CPU allocated from */
    173 };
    174 
    175 /*
    176  * pv_entrys are dynamically allocated in chunks from a single page.
    177  * we keep track of how many pv_entrys are in use for each page and
    178  * we can free pv_entry pages if needed.  there is one lock for the
    179  * entire allocation system.
    180  */
    181 
    182 struct pv_page_info {
    183 	TAILQ_ENTRY(pv_page) pvpi_list;
    184 	struct pv_entry *pvpi_pvfree;
    185 	int pvpi_nfree;
    186 };
    187 
    188 /*
    189  * number of pv_entry's in a pv_page
    190  * (note: won't work on systems where NPBG isn't a constant)
    191  */
    192 
    193 #define PVE_PER_PVPAGE ((PAGE_SIZE - sizeof(struct pv_page_info)) / \
    194 			sizeof(struct pv_entry))
    195 
    196 /*
    197  * a pv_page: where pv_entrys are allocated from
    198  */
    199 
    200 struct pv_page {
    201 	struct pv_page_info pvinfo;
    202 	struct pv_entry pvents[PVE_PER_PVPAGE];
    203 };
    204 
    205 /*
    206  * global kernel variables
    207  */
    208 
    209 /* PDPpaddr: is the physical address of the kernel's PDP */
    210 extern u_long PDPpaddr;
    211 
    212 extern struct pmap kernel_pmap_store;	/* kernel pmap */
    213 extern int pmap_pg_g;			/* do we support PG_G? */
    214 extern long nkptp[PTP_LEVELS];
    215 
    216 /*
    217  * macros
    218  */
    219 
    220 #define	pmap_kernel()			(&kernel_pmap_store)
    221 #define	pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
    222 #define	pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
    223 
    224 #define pmap_clear_modify(pg)		pmap_clear_attrs(pg, PG_M)
    225 #define pmap_clear_reference(pg)	pmap_clear_attrs(pg, PG_U)
    226 #define pmap_copy(DP,SP,D,L,S)
    227 #define pmap_is_modified(pg)		pmap_test_attrs(pg, PG_M)
    228 #define pmap_is_referenced(pg)		pmap_test_attrs(pg, PG_U)
    229 #define pmap_move(DP,SP,D,L,S)
    230 #define pmap_phys_address(ppn)		x86_ptob(ppn)
    231 #define pmap_valid_entry(E) 		((E) & PG_V) /* is PDE or PTE valid? */
    232 
    233 
    234 /*
    235  * prototypes
    236  */
    237 
    238 void		pmap_activate(struct lwp *);
    239 void		pmap_bootstrap(vaddr_t);
    240 bool		pmap_clear_attrs(struct vm_page *, unsigned);
    241 void		pmap_deactivate(struct lwp *);
    242 void		pmap_page_remove (struct vm_page *);
    243 void		pmap_remove(struct pmap *, vaddr_t, vaddr_t);
    244 bool		pmap_test_attrs(struct vm_page *, unsigned);
    245 void		pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
    246 void		pmap_load(void);
    247 
    248 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
    249 
    250 void	pmap_tlb_shootdown(pmap_t, vaddr_t, vaddr_t, pt_entry_t);
    251 void	pmap_tlb_shootwait(void);
    252 
    253 #define PMAP_GROWKERNEL		/* turn on pmap_growkernel interface */
    254 
    255 /*
    256  * Do idle page zero'ing uncached to avoid polluting the cache.
    257  */
    258 bool	pmap_pageidlezero(paddr_t);
    259 #define	PMAP_PAGEIDLEZERO(pa)	pmap_pageidlezero((pa))
    260 
    261 /*
    262  * inline functions
    263  */
    264 
    265 /*ARGSUSED*/
    266 static __inline void
    267 pmap_remove_all(struct pmap *pmap)
    268 {
    269 	/* Nothing. */
    270 }
    271 
    272 /*
    273  * pmap_update_pg: flush one page from the TLB (or flush the whole thing
    274  *	if hardware doesn't support one-page flushing)
    275  */
    276 
    277 __inline static void __attribute__((__unused__))
    278 pmap_update_pg(vaddr_t va)
    279 {
    280 #if defined(I386_CPU)
    281 	if (cpu_class == CPUCLASS_386)
    282 		tlbflush();
    283 	else
    284 #endif
    285 		invlpg(va);
    286 }
    287 
    288 /*
    289  * pmap_update_2pg: flush two pages from the TLB
    290  */
    291 
    292 __inline static void __attribute__((__unused__))
    293 pmap_update_2pg(vaddr_t va, vaddr_t vb)
    294 {
    295 #if defined(I386_CPU)
    296 	if (cpu_class == CPUCLASS_386)
    297 		tlbflush();
    298 	else
    299 #endif
    300 	{
    301 		invlpg(va);
    302 		invlpg(vb);
    303 	}
    304 }
    305 
    306 /*
    307  * pmap_page_protect: change the protection of all recorded mappings
    308  *	of a managed page
    309  *
    310  * => this function is a frontend for pmap_page_remove/pmap_clear_attrs
    311  * => we only have to worry about making the page more protected.
    312  *	unprotecting a page is done on-demand at fault time.
    313  */
    314 
    315 __inline static void __attribute__((__unused__))
    316 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
    317 {
    318 	if ((prot & VM_PROT_WRITE) == 0) {
    319 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
    320 			(void) pmap_clear_attrs(pg, PG_RW);
    321 		} else {
    322 			pmap_page_remove(pg);
    323 		}
    324 	}
    325 }
    326 
    327 /*
    328  * pmap_protect: change the protection of pages in a pmap
    329  *
    330  * => this function is a frontend for pmap_remove/pmap_write_protect
    331  * => we only have to worry about making the page more protected.
    332  *	unprotecting a page is done on-demand at fault time.
    333  */
    334 
    335 __inline static void __attribute__((__unused__))
    336 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
    337 {
    338 	if ((prot & VM_PROT_WRITE) == 0) {
    339 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
    340 			pmap_write_protect(pmap, sva, eva, prot);
    341 		} else {
    342 			pmap_remove(pmap, sva, eva);
    343 		}
    344 	}
    345 }
    346 
    347 /*
    348  * various address inlines
    349  *
    350  *  vtopte: return a pointer to the PTE mapping a VA, works only for
    351  *  user and PT addresses
    352  *
    353  *  kvtopte: return a pointer to the PTE mapping a kernel VA
    354  */
    355 
    356 #include <lib/libkern/libkern.h>
    357 
    358 static __inline pt_entry_t * __attribute__((__unused__))
    359 vtopte(vaddr_t va)
    360 {
    361 
    362 	KASSERT(va < VM_MIN_KERNEL_ADDRESS);
    363 
    364 	return (PTE_BASE + pl1_i(va));
    365 }
    366 
    367 static __inline pt_entry_t * __attribute__((__unused__))
    368 kvtopte(vaddr_t va)
    369 {
    370 	pd_entry_t *pde;
    371 
    372 	KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
    373 
    374 	pde = L2_BASE + pl2_i(va);
    375 	if (*pde & PG_PS)
    376 		return ((pt_entry_t *)pde);
    377 
    378 	return (PTE_BASE + pl1_i(va));
    379 }
    380 
    381 paddr_t vtophys(vaddr_t);
    382 vaddr_t	pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
    383 void	pmap_cpu_init_early(struct cpu_info *);
    384 void	pmap_cpu_init_late(struct cpu_info *);
    385 void	sse2_zero_page(void *);
    386 void	sse2_copy_page(void *, void *);
    387 
    388 /*
    389  * Hooks for the pool allocator.
    390  */
    391 #define	POOL_VTOPHYS(va)	vtophys((vaddr_t) (va))
    392 
    393 /*
    394  * TLB shootdown mailbox.
    395  */
    396 
    397 struct pmap_mbox {
    398 	volatile void		*mb_pointer;
    399 	volatile uintptr_t	mb_addr1;
    400 	volatile uintptr_t	mb_addr2;
    401 	volatile uintptr_t	mb_head;
    402 	volatile uintptr_t	mb_tail;
    403 	volatile uintptr_t	mb_global;
    404 };
    405 
    406 #endif /* _KERNEL */
    407 
    408 #endif /* _X86_PMAP_H_ */
    409