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pmap.h revision 1.1.2.2
      1 /*	$NetBSD: pmap.h,v 1.1.2.2 2007/10/14 12:05:06 yamt Exp $	*/
      2 
      3 /*
      4  *
      5  * Copyright (c) 1997 Charles D. Cranor and Washington University.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgment:
     18  *      This product includes software developed by Charles D. Cranor and
     19  *      Washington University.
     20  * 4. The name of the author may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 /*
     36  * Copyright (c) 2001 Wasabi Systems, Inc.
     37  * All rights reserved.
     38  *
     39  * Written by Frank van der Linden for Wasabi Systems, Inc.
     40  *
     41  * Redistribution and use in source and binary forms, with or without
     42  * modification, are permitted provided that the following conditions
     43  * are met:
     44  * 1. Redistributions of source code must retain the above copyright
     45  *    notice, this list of conditions and the following disclaimer.
     46  * 2. Redistributions in binary form must reproduce the above copyright
     47  *    notice, this list of conditions and the following disclaimer in the
     48  *    documentation and/or other materials provided with the distribution.
     49  * 3. All advertising materials mentioning features or use of this software
     50  *    must display the following acknowledgement:
     51  *      This product includes software developed for the NetBSD Project by
     52  *      Wasabi Systems, Inc.
     53  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     54  *    or promote products derived from this software without specific prior
     55  *    written permission.
     56  *
     57  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     58  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     59  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     60  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     61  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     62  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     63  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     64  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     65  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     66  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     67  * POSSIBILITY OF SUCH DAMAGE.
     68  */
     69 
     70 /*
     71  * pmap.h: see pmap.c for the history of this pmap module.
     72  */
     73 
     74 #ifndef _X86_PMAP_H_
     75 #define	_X86_PMAP_H_
     76 
     77 #define ptei(VA)	(((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
     78 
     79 /*
     80  * pl*_pi: index in the ptp page for a pde mapping a VA.
     81  * (pl*_i below is the index in the virtual array of all pdes per level)
     82  */
     83 #define pl1_pi(VA)	(((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
     84 #define pl2_pi(VA)	(((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
     85 #define pl3_pi(VA)	(((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
     86 #define pl4_pi(VA)	(((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
     87 
     88 /*
     89  * pl*_i: generate index into pde/pte arrays in virtual space
     90  */
     91 #define pl1_i(VA)	(((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
     92 #define pl2_i(VA)	(((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
     93 #define pl3_i(VA)	(((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
     94 #define pl4_i(VA)	(((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
     95 #define pl_i(va, lvl) \
     96         (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
     97 
     98 #define	pl_i_roundup(va, lvl)	pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl))
     99 
    100 /*
    101  * PTP macros:
    102  *   a PTP's index is the PD index of the PDE that points to it
    103  *   a PTP's offset is the byte-offset in the PTE space that this PTP is at
    104  *   a PTP's VA is the first VA mapped by that PTP
    105  */
    106 
    107 #define ptp_va2o(va, lvl)	(pl_i(va, (lvl)+1) * PAGE_SIZE)
    108 
    109 #if defined(_KERNEL)
    110 /*
    111  * pmap data structures: see pmap.c for details of locking.
    112  */
    113 
    114 struct pmap;
    115 typedef struct pmap *pmap_t;
    116 
    117 /*
    118  * we maintain a list of all non-kernel pmaps
    119  */
    120 
    121 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
    122 
    123 /*
    124  * the pmap structure
    125  *
    126  * note that the pm_obj contains the simple_lock, the reference count,
    127  * page list, and number of PTPs within the pmap.
    128  *
    129  * pm_lock is the same as the spinlock for vm object 0. Changes to
    130  * the other objects may only be made if that lock has been taken
    131  * (the other object locks are only used when uvm_pagealloc is called)
    132  *
    133  * XXX If we ever support processor numbers higher than 31, we'll have
    134  * XXX to rethink the CPU mask.
    135  */
    136 
    137 struct pmap {
    138 	struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
    139 #define	pm_lock	pm_obj[0].vmobjlock
    140 	LIST_ENTRY(pmap) pm_list;	/* list (lck by pm_list lock) */
    141 	pd_entry_t *pm_pdir;		/* VA of PD (lck by object lock) */
    142 	paddr_t pm_pdirpa;		/* PA of PD (read-only after create) */
    143 	struct vm_page *pm_ptphint[PTP_LEVELS-1];
    144 					/* pointer to a PTP in our pmap */
    145 	struct pmap_statistics pm_stats;  /* pmap stats (lck by object lock) */
    146 
    147 	vaddr_t pm_hiexec;		/* highest executable mapping */
    148 	int pm_flags;			/* see below */
    149 
    150 	union descriptor *pm_ldt;	/* user-set LDT */
    151 	int pm_ldt_len;			/* number of LDT entries */
    152 	int pm_ldt_sel;			/* LDT selector */
    153 	uint32_t pm_cpus;		/* mask of CPUs using pmap */
    154 	uint32_t pm_kernel_cpus;	/* mask of CPUs using kernel part
    155 					 of pmap */
    156 };
    157 
    158 /* pm_flags */
    159 #define	PMF_USER_LDT	0x01	/* pmap has user-set LDT */
    160 
    161 /*
    162  * for each managed physical page we maintain a list of <PMAP,VA>'s
    163  * which it is mapped at.  the list is headed by a pv_head structure.
    164  * there is one pv_head per managed phys page (allocated at boot time).
    165  * the pv_head structure points to a list of pv_entry structures (each
    166  * describes one mapping).
    167  */
    168 
    169 struct pv_entry {			/* locked by its list's pvh_lock */
    170 	SPLAY_ENTRY(pv_entry) pv_node;	/* splay-tree node */
    171 	struct pmap *pv_pmap;		/* the pmap */
    172 	vaddr_t pv_va;			/* the virtual address */
    173 	struct vm_page *pv_ptp;		/* the vm_page of the PTP */
    174 	struct pmap_cpu *pv_alloc_cpu;	/* CPU allocated from */
    175 };
    176 
    177 /*
    178  * pv_entrys are dynamically allocated in chunks from a single page.
    179  * we keep track of how many pv_entrys are in use for each page and
    180  * we can free pv_entry pages if needed.  there is one lock for the
    181  * entire allocation system.
    182  */
    183 
    184 struct pv_page_info {
    185 	TAILQ_ENTRY(pv_page) pvpi_list;
    186 	struct pv_entry *pvpi_pvfree;
    187 	int pvpi_nfree;
    188 };
    189 
    190 /*
    191  * number of pv_entry's in a pv_page
    192  * (note: won't work on systems where NPBG isn't a constant)
    193  */
    194 
    195 #define PVE_PER_PVPAGE ((PAGE_SIZE - sizeof(struct pv_page_info)) / \
    196 			sizeof(struct pv_entry))
    197 
    198 /*
    199  * a pv_page: where pv_entrys are allocated from
    200  */
    201 
    202 struct pv_page {
    203 	struct pv_page_info pvinfo;
    204 	struct pv_entry pvents[PVE_PER_PVPAGE];
    205 };
    206 
    207 /*
    208  * global kernel variables
    209  */
    210 
    211 /* PDPpaddr: is the physical address of the kernel's PDP */
    212 extern u_long PDPpaddr;
    213 
    214 extern struct pmap kernel_pmap_store;	/* kernel pmap */
    215 extern int pmap_pg_g;			/* do we support PG_G? */
    216 extern long nkptp[PTP_LEVELS];
    217 
    218 /*
    219  * macros
    220  */
    221 
    222 #define	pmap_kernel()			(&kernel_pmap_store)
    223 #define	pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
    224 #define	pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
    225 
    226 #define pmap_clear_modify(pg)		pmap_clear_attrs(pg, PG_M)
    227 #define pmap_clear_reference(pg)	pmap_clear_attrs(pg, PG_U)
    228 #define pmap_copy(DP,SP,D,L,S)
    229 #define pmap_is_modified(pg)		pmap_test_attrs(pg, PG_M)
    230 #define pmap_is_referenced(pg)		pmap_test_attrs(pg, PG_U)
    231 #define pmap_move(DP,SP,D,L,S)
    232 #define pmap_phys_address(ppn)		x86_ptob(ppn)
    233 #define pmap_valid_entry(E) 		((E) & PG_V) /* is PDE or PTE valid? */
    234 
    235 
    236 /*
    237  * prototypes
    238  */
    239 
    240 void		pmap_activate(struct lwp *);
    241 void		pmap_bootstrap(vaddr_t);
    242 bool		pmap_clear_attrs(struct vm_page *, unsigned);
    243 void		pmap_deactivate(struct lwp *);
    244 void		pmap_page_remove (struct vm_page *);
    245 void		pmap_remove(struct pmap *, vaddr_t, vaddr_t);
    246 bool		pmap_test_attrs(struct vm_page *, unsigned);
    247 void		pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
    248 void		pmap_load(void);
    249 
    250 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
    251 
    252 void	pmap_tlb_shootdown(pmap_t, vaddr_t, vaddr_t, pt_entry_t);
    253 void	pmap_tlb_shootwait(void);
    254 
    255 #define PMAP_GROWKERNEL		/* turn on pmap_growkernel interface */
    256 
    257 /*
    258  * Do idle page zero'ing uncached to avoid polluting the cache.
    259  */
    260 bool	pmap_pageidlezero(paddr_t);
    261 #define	PMAP_PAGEIDLEZERO(pa)	pmap_pageidlezero((pa))
    262 
    263 /*
    264  * inline functions
    265  */
    266 
    267 /*ARGSUSED*/
    268 static __inline void
    269 pmap_remove_all(struct pmap *pmap)
    270 {
    271 	/* Nothing. */
    272 }
    273 
    274 /*
    275  * pmap_update_pg: flush one page from the TLB (or flush the whole thing
    276  *	if hardware doesn't support one-page flushing)
    277  */
    278 
    279 __inline static void __attribute__((__unused__))
    280 pmap_update_pg(vaddr_t va)
    281 {
    282 #if defined(I386_CPU)
    283 	if (cpu_class == CPUCLASS_386)
    284 		tlbflush();
    285 	else
    286 #endif
    287 		invlpg(va);
    288 }
    289 
    290 /*
    291  * pmap_update_2pg: flush two pages from the TLB
    292  */
    293 
    294 __inline static void __attribute__((__unused__))
    295 pmap_update_2pg(vaddr_t va, vaddr_t vb)
    296 {
    297 #if defined(I386_CPU)
    298 	if (cpu_class == CPUCLASS_386)
    299 		tlbflush();
    300 	else
    301 #endif
    302 	{
    303 		invlpg(va);
    304 		invlpg(vb);
    305 	}
    306 }
    307 
    308 /*
    309  * pmap_page_protect: change the protection of all recorded mappings
    310  *	of a managed page
    311  *
    312  * => this function is a frontend for pmap_page_remove/pmap_clear_attrs
    313  * => we only have to worry about making the page more protected.
    314  *	unprotecting a page is done on-demand at fault time.
    315  */
    316 
    317 __inline static void __attribute__((__unused__))
    318 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
    319 {
    320 	if ((prot & VM_PROT_WRITE) == 0) {
    321 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
    322 			(void) pmap_clear_attrs(pg, PG_RW);
    323 		} else {
    324 			pmap_page_remove(pg);
    325 		}
    326 	}
    327 }
    328 
    329 /*
    330  * pmap_protect: change the protection of pages in a pmap
    331  *
    332  * => this function is a frontend for pmap_remove/pmap_write_protect
    333  * => we only have to worry about making the page more protected.
    334  *	unprotecting a page is done on-demand at fault time.
    335  */
    336 
    337 __inline static void __attribute__((__unused__))
    338 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
    339 {
    340 	if ((prot & VM_PROT_WRITE) == 0) {
    341 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
    342 			pmap_write_protect(pmap, sva, eva, prot);
    343 		} else {
    344 			pmap_remove(pmap, sva, eva);
    345 		}
    346 	}
    347 }
    348 
    349 /*
    350  * various address inlines
    351  *
    352  *  vtopte: return a pointer to the PTE mapping a VA, works only for
    353  *  user and PT addresses
    354  *
    355  *  kvtopte: return a pointer to the PTE mapping a kernel VA
    356  */
    357 
    358 #include <lib/libkern/libkern.h>
    359 
    360 static __inline pt_entry_t * __attribute__((__unused__))
    361 vtopte(vaddr_t va)
    362 {
    363 
    364 	KASSERT(va < VM_MIN_KERNEL_ADDRESS);
    365 
    366 	return (PTE_BASE + pl1_i(va));
    367 }
    368 
    369 static __inline pt_entry_t * __attribute__((__unused__))
    370 kvtopte(vaddr_t va)
    371 {
    372 	pd_entry_t *pde;
    373 
    374 	KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
    375 
    376 	pde = L2_BASE + pl2_i(va);
    377 	if (*pde & PG_PS)
    378 		return ((pt_entry_t *)pde);
    379 
    380 	return (PTE_BASE + pl1_i(va));
    381 }
    382 
    383 paddr_t vtophys(vaddr_t);
    384 vaddr_t	pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
    385 void	pmap_cpu_init_early(struct cpu_info *);
    386 void	pmap_cpu_init_late(struct cpu_info *);
    387 void	sse2_zero_page(void *);
    388 void	sse2_copy_page(void *, void *);
    389 
    390 /*
    391  * Hooks for the pool allocator.
    392  */
    393 #define	POOL_VTOPHYS(va)	vtophys((vaddr_t) (va))
    394 
    395 /*
    396  * TLB shootdown mailbox.
    397  */
    398 
    399 struct pmap_mbox {
    400 	volatile void		*mb_pointer;
    401 	volatile uintptr_t	mb_addr1;
    402 	volatile uintptr_t	mb_addr2;
    403 	volatile uintptr_t	mb_head;
    404 	volatile uintptr_t	mb_tail;
    405 	volatile uintptr_t	mb_global;
    406 };
    407 
    408 #endif /* _KERNEL */
    409 
    410 #endif /* _X86_PMAP_H_ */
    411