pmap.h revision 1.18 1 /* $NetBSD: pmap.h,v 1.18 2008/06/05 21:09:12 ad Exp $ */
2
3 /*
4 *
5 * Copyright (c) 1997 Charles D. Cranor and Washington University.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgment:
18 * This product includes software developed by Charles D. Cranor and
19 * Washington University.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 /*
36 * Copyright (c) 2001 Wasabi Systems, Inc.
37 * All rights reserved.
38 *
39 * Written by Frank van der Linden for Wasabi Systems, Inc.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 * must display the following acknowledgement:
51 * This product includes software developed for the NetBSD Project by
52 * Wasabi Systems, Inc.
53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
54 * or promote products derived from this software without specific prior
55 * written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70 /*
71 * pmap.h: see pmap.c for the history of this pmap module.
72 */
73
74 #ifndef _X86_PMAP_H_
75 #define _X86_PMAP_H_
76
77 #define ptei(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
78
79 /*
80 * pl*_pi: index in the ptp page for a pde mapping a VA.
81 * (pl*_i below is the index in the virtual array of all pdes per level)
82 */
83 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
84 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
85 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
86 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
87
88 /*
89 * pl*_i: generate index into pde/pte arrays in virtual space
90 */
91 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
92 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
93 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
94 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
95 #define pl_i(va, lvl) \
96 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
97
98 #define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl))
99
100 /*
101 * PTP macros:
102 * a PTP's index is the PD index of the PDE that points to it
103 * a PTP's offset is the byte-offset in the PTE space that this PTP is at
104 * a PTP's VA is the first VA mapped by that PTP
105 */
106
107 #define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE)
108
109 /* size of a PDP: usually one page, exept for PAE */
110 #ifdef PAE
111 #define PDP_SIZE 4
112 #else
113 #define PDP_SIZE 1
114 #endif
115
116
117 #if defined(_KERNEL)
118 /*
119 * pmap data structures: see pmap.c for details of locking.
120 */
121
122 struct pmap;
123 typedef struct pmap *pmap_t;
124
125 /*
126 * we maintain a list of all non-kernel pmaps
127 */
128
129 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
130
131 /*
132 * the pmap structure
133 *
134 * note that the pm_obj contains the simple_lock, the reference count,
135 * page list, and number of PTPs within the pmap.
136 *
137 * pm_lock is the same as the spinlock for vm object 0. Changes to
138 * the other objects may only be made if that lock has been taken
139 * (the other object locks are only used when uvm_pagealloc is called)
140 *
141 * XXX If we ever support processor numbers higher than 31, we'll have
142 * XXX to rethink the CPU mask.
143 */
144
145 struct pmap {
146 struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
147 #define pm_lock pm_obj[0].vmobjlock
148 LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */
149 pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */
150 #ifdef PAE
151 paddr_t pm_pdirpa[PDP_SIZE];
152 #else
153 paddr_t pm_pdirpa; /* PA of PD (read-only after create) */
154 #endif
155 struct vm_page *pm_ptphint[PTP_LEVELS-1];
156 /* pointer to a PTP in our pmap */
157 struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */
158
159 #if !defined(__x86_64__)
160 vaddr_t pm_hiexec; /* highest executable mapping */
161 #endif /* !defined(__x86_64__) */
162 int pm_flags; /* see below */
163
164 union descriptor *pm_ldt; /* user-set LDT */
165 int pm_ldt_len; /* number of LDT entries */
166 int pm_ldt_sel; /* LDT selector */
167 uint32_t pm_cpus; /* mask of CPUs using pmap */
168 uint32_t pm_kernel_cpus; /* mask of CPUs using kernel part
169 of pmap */
170 };
171
172 /* pm_flags */
173 #define PMF_USER_LDT 0x01 /* pmap has user-set LDT */
174
175 /* macro to access pm_pdirpa */
176 #ifdef PAE
177 #define pmap_pdirpa(pmap, index) \
178 ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t))
179 #else
180 #define pmap_pdirpa(pmap, index) \
181 ((pmap)->pm_pdirpa + (index) * sizeof(pd_entry_t))
182 #endif
183
184 /*
185 * global kernel variables
186 */
187
188 /* PDPpaddr: is the physical address of the kernel's PDP */
189 extern u_long PDPpaddr;
190
191 extern struct pmap kernel_pmap_store; /* kernel pmap */
192 extern int pmap_pg_g; /* do we support PG_G? */
193 extern long nkptp[PTP_LEVELS];
194
195 /*
196 * macros
197 */
198
199 #define pmap_kernel() (&kernel_pmap_store)
200 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
201 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
202
203 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M)
204 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U)
205 #define pmap_copy(DP,SP,D,L,S)
206 #define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
207 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
208 #define pmap_move(DP,SP,D,L,S)
209 #define pmap_phys_address(ppn) x86_ptob(ppn)
210 #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
211
212
213 /*
214 * prototypes
215 */
216
217 void pmap_activate(struct lwp *);
218 void pmap_bootstrap(vaddr_t);
219 bool pmap_clear_attrs(struct vm_page *, unsigned);
220 void pmap_deactivate(struct lwp *);
221 void pmap_page_remove (struct vm_page *);
222 void pmap_remove(struct pmap *, vaddr_t, vaddr_t);
223 bool pmap_test_attrs(struct vm_page *, unsigned);
224 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
225 void pmap_load(void);
226 paddr_t pmap_init_tmp_pgtbl(paddr_t);
227 void pmap_remove_all(struct pmap *);
228
229 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
230
231 void pmap_tlb_shootdown(pmap_t, vaddr_t, vaddr_t, pt_entry_t);
232 void pmap_tlb_shootwait(void);
233
234 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
235
236 /*
237 * Do idle page zero'ing uncached to avoid polluting the cache.
238 */
239 bool pmap_pageidlezero(paddr_t);
240 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa))
241
242 /*
243 * inline functions
244 */
245
246 /*
247 * pmap_update_pg: flush one page from the TLB (or flush the whole thing
248 * if hardware doesn't support one-page flushing)
249 */
250
251 __inline static void __unused
252 pmap_update_pg(vaddr_t va)
253 {
254 invlpg(va);
255 }
256
257 /*
258 * pmap_update_2pg: flush two pages from the TLB
259 */
260
261 __inline static void __unused
262 pmap_update_2pg(vaddr_t va, vaddr_t vb)
263 {
264 invlpg(va);
265 invlpg(vb);
266 }
267
268 /*
269 * pmap_page_protect: change the protection of all recorded mappings
270 * of a managed page
271 *
272 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs
273 * => we only have to worry about making the page more protected.
274 * unprotecting a page is done on-demand at fault time.
275 */
276
277 __inline static void __unused
278 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
279 {
280 if ((prot & VM_PROT_WRITE) == 0) {
281 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
282 (void) pmap_clear_attrs(pg, PG_RW);
283 } else {
284 pmap_page_remove(pg);
285 }
286 }
287 }
288
289 /*
290 * pmap_protect: change the protection of pages in a pmap
291 *
292 * => this function is a frontend for pmap_remove/pmap_write_protect
293 * => we only have to worry about making the page more protected.
294 * unprotecting a page is done on-demand at fault time.
295 */
296
297 __inline static void __unused
298 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
299 {
300 if ((prot & VM_PROT_WRITE) == 0) {
301 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
302 pmap_write_protect(pmap, sva, eva, prot);
303 } else {
304 pmap_remove(pmap, sva, eva);
305 }
306 }
307 }
308
309 /*
310 * various address inlines
311 *
312 * vtopte: return a pointer to the PTE mapping a VA, works only for
313 * user and PT addresses
314 *
315 * kvtopte: return a pointer to the PTE mapping a kernel VA
316 */
317
318 #include <lib/libkern/libkern.h>
319
320 static __inline pt_entry_t * __unused
321 vtopte(vaddr_t va)
322 {
323
324 KASSERT(va < VM_MIN_KERNEL_ADDRESS);
325
326 return (PTE_BASE + pl1_i(va));
327 }
328
329 static __inline pt_entry_t * __unused
330 kvtopte(vaddr_t va)
331 {
332 pd_entry_t *pde;
333
334 KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
335
336 pde = L2_BASE + pl2_i(va);
337 if (*pde & PG_PS)
338 return ((pt_entry_t *)pde);
339
340 return (PTE_BASE + pl1_i(va));
341 }
342
343 paddr_t vtophys(vaddr_t);
344 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
345 void pmap_cpu_init_early(struct cpu_info *);
346 void pmap_cpu_init_late(struct cpu_info *);
347 bool sse2_idlezero_page(void *);
348
349
350 #ifdef XEN
351
352 #define XPTE_MASK L1_FRAME
353 /* XPTE_SHIFT = L1_SHIFT - log2(sizeof(pt_entry_t)) */
354 #if defined(__x86_64__) || defined(PAE)
355 #define XPTE_SHIFT 9
356 #else
357 #define XPTE_SHIFT 10
358 #endif
359
360 /* PTE access inline fuctions */
361
362 /*
363 * Get the machine address of the pointed pte
364 * We use hardware MMU to get value so works only for levels 1-3
365 */
366
367 static __inline paddr_t
368 xpmap_ptetomach(pt_entry_t *pte)
369 {
370 pt_entry_t *up_pte;
371 vaddr_t va = (vaddr_t) pte;
372
373 va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
374 up_pte = (pt_entry_t *) va;
375
376 return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK)));
377 }
378
379 /*
380 * xpmap_update()
381 * Update an active pt entry with Xen
382 * Equivalent to *pte = npte
383 */
384
385 static __inline void
386 xpmap_update (pt_entry_t *pte, pt_entry_t npte)
387 {
388 int s = splvm();
389
390 xpq_queue_pte_update(xpmap_ptetomach(pte), npte);
391 xpq_flush_queue();
392 splx(s);
393 }
394
395
396 /* Xen helpers to change bits of a pte */
397 #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */
398
399 /* pmap functions with machine addresses */
400 void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t);
401 int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t,
402 vm_prot_t, int, int);
403 bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *);
404 paddr_t vtomach(vaddr_t);
405
406 #endif /* XEN */
407
408 /*
409 * Hooks for the pool allocator.
410 */
411 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
412
413 /*
414 * TLB shootdown mailbox.
415 */
416
417 struct pmap_mbox {
418 volatile void *mb_pointer;
419 volatile uintptr_t mb_addr1;
420 volatile uintptr_t mb_addr2;
421 volatile uintptr_t mb_head;
422 volatile uintptr_t mb_tail;
423 volatile uintptr_t mb_global;
424 };
425
426 #endif /* _KERNEL */
427
428 #endif /* _X86_PMAP_H_ */
429