pmap.h revision 1.29.2.4 1 /* $NetBSD: pmap.h,v 1.29.2.4 2010/05/26 04:55:23 rmind Exp $ */
2
3 /*
4 *
5 * Copyright (c) 1997 Charles D. Cranor and Washington University.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgment:
18 * This product includes software developed by Charles D. Cranor and
19 * Washington University.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 /*
36 * Copyright (c) 2001 Wasabi Systems, Inc.
37 * All rights reserved.
38 *
39 * Written by Frank van der Linden for Wasabi Systems, Inc.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 * must display the following acknowledgement:
51 * This product includes software developed for the NetBSD Project by
52 * Wasabi Systems, Inc.
53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
54 * or promote products derived from this software without specific prior
55 * written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70 /*
71 * pmap.h: see pmap.c for the history of this pmap module.
72 */
73
74 #ifndef _X86_PMAP_H_
75 #define _X86_PMAP_H_
76
77 #define ptei(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
78
79 /*
80 * pl*_pi: index in the ptp page for a pde mapping a VA.
81 * (pl*_i below is the index in the virtual array of all pdes per level)
82 */
83 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
84 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
85 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
86 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
87
88 /*
89 * pl*_i: generate index into pde/pte arrays in virtual space
90 */
91 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
92 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
93 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
94 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
95 #define pl_i(va, lvl) \
96 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
97
98 #define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl))
99
100 /*
101 * PTP macros:
102 * a PTP's index is the PD index of the PDE that points to it
103 * a PTP's offset is the byte-offset in the PTE space that this PTP is at
104 * a PTP's VA is the first VA mapped by that PTP
105 */
106
107 #define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE)
108
109 /* size of a PDP: usually one page, except for PAE */
110 #ifdef PAE
111 #define PDP_SIZE 4
112 #else
113 #define PDP_SIZE 1
114 #endif
115
116
117 #if defined(_KERNEL)
118 /*
119 * pmap data structures: see pmap.c for details of locking.
120 */
121
122 /*
123 * we maintain a list of all non-kernel pmaps
124 */
125
126 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
127
128 /*
129 * the pmap structure
130 *
131 * note that the pm_obj contains the lock pointer, the reference count,
132 * page list, and number of PTPs within the pmap.
133 *
134 * pm_lock is the same as the lock for vm object 0. Changes to
135 * the other objects may only be made if that lock has been taken
136 * (the other object locks are only used when uvm_pagealloc is called)
137 *
138 * XXX If we ever support processor numbers higher than 31, we'll have
139 * XXX to rethink the CPU mask.
140 */
141
142 struct pmap {
143 struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
144 #define pm_lock pm_obj[0].vmobjlock
145 kmutex_t pm_obj_lock[PTP_LEVELS-1]; /* locks for pm_objs, XXXrmind */
146 LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */
147 pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */
148 #ifdef PAE
149 paddr_t pm_pdirpa[PDP_SIZE];
150 #else
151 paddr_t pm_pdirpa; /* PA of PD (read-only after create) */
152 #endif
153 struct vm_page *pm_ptphint[PTP_LEVELS-1];
154 /* pointer to a PTP in our pmap */
155 struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */
156
157 #if !defined(__x86_64__)
158 vaddr_t pm_hiexec; /* highest executable mapping */
159 #endif /* !defined(__x86_64__) */
160 int pm_flags; /* see below */
161
162 union descriptor *pm_ldt; /* user-set LDT */
163 size_t pm_ldt_len; /* size of LDT in bytes */
164 int pm_ldt_sel; /* LDT selector */
165 uint32_t pm_cpus; /* mask of CPUs using pmap */
166 uint32_t pm_kernel_cpus; /* mask of CPUs using kernel part
167 of pmap */
168 uint64_t pm_ncsw; /* for assertions */
169 struct vm_page *pm_gc_ptp; /* pages from pmap g/c */
170 };
171
172 /* macro to access pm_pdirpa */
173 #ifdef PAE
174 #define pmap_pdirpa(pmap, index) \
175 ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t))
176 #else
177 #define pmap_pdirpa(pmap, index) \
178 ((pmap)->pm_pdirpa + (index) * sizeof(pd_entry_t))
179 #endif
180
181 /*
182 * MD flags that we use for pmap_enter and pmap_kenter_pa:
183 */
184 #define PMAP_NOCACHE 0x01000000 /* set the non-cacheable bit */
185
186 /*
187 * global kernel variables
188 */
189
190 /* PDPpaddr: is the physical address of the kernel's PDP */
191 extern u_long PDPpaddr;
192
193 extern int pmap_pg_g; /* do we support PG_G? */
194 extern long nkptp[PTP_LEVELS];
195
196 /*
197 * macros
198 */
199
200 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
201 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
202
203 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M)
204 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U)
205 #define pmap_copy(DP,SP,D,L,S)
206 #define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
207 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
208 #define pmap_move(DP,SP,D,L,S)
209 #define pmap_phys_address(ppn) x86_ptob(ppn)
210 #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
211
212
213 /*
214 * prototypes
215 */
216
217 void pmap_activate(struct lwp *);
218 void pmap_bootstrap(vaddr_t);
219 bool pmap_clear_attrs(struct vm_page *, unsigned);
220 void pmap_deactivate(struct lwp *);
221 void pmap_page_remove (struct vm_page *);
222 void pmap_remove(struct pmap *, vaddr_t, vaddr_t);
223 bool pmap_test_attrs(struct vm_page *, unsigned);
224 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
225 void pmap_load(void);
226 paddr_t pmap_init_tmp_pgtbl(paddr_t);
227 void pmap_remove_all(struct pmap *);
228 void pmap_ldt_sync(struct pmap *);
229
230 void pmap_emap_enter(vaddr_t, paddr_t, vm_prot_t);
231 void pmap_emap_remove(vaddr_t, vsize_t);
232 void pmap_emap_sync(bool);
233
234 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
235
236 typedef enum tlbwhy {
237 TLBSHOOT_APTE,
238 TLBSHOOT_KENTER,
239 TLBSHOOT_KREMOVE,
240 TLBSHOOT_FREE_PTP1,
241 TLBSHOOT_FREE_PTP2,
242 TLBSHOOT_REMOVE_PTE,
243 TLBSHOOT_REMOVE_PTES,
244 TLBSHOOT_SYNC_PV1,
245 TLBSHOOT_SYNC_PV2,
246 TLBSHOOT_WRITE_PROTECT,
247 TLBSHOOT_ENTER,
248 TLBSHOOT_UPDATE,
249 TLBSHOOT_BUS_DMA,
250 TLBSHOOT_BUS_SPACE,
251 TLBSHOOT__MAX,
252 } tlbwhy_t;
253
254 void pmap_tlb_init(void);
255 void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, tlbwhy_t);
256 void pmap_tlb_shootnow(void);
257
258 #define __HAVE_PMAP_EMAP
259
260 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
261 #define PMAP_FORK /* turn on pmap_fork interface */
262
263 /*
264 * Do idle page zero'ing uncached to avoid polluting the cache.
265 */
266 bool pmap_pageidlezero(paddr_t);
267 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa))
268
269 /*
270 * inline functions
271 */
272
273 /*
274 * pmap_update_pg: flush one page from the TLB (or flush the whole thing
275 * if hardware doesn't support one-page flushing)
276 */
277
278 __inline static void __unused
279 pmap_update_pg(vaddr_t va)
280 {
281 invlpg(va);
282 }
283
284 /*
285 * pmap_update_2pg: flush two pages from the TLB
286 */
287
288 __inline static void __unused
289 pmap_update_2pg(vaddr_t va, vaddr_t vb)
290 {
291 invlpg(va);
292 invlpg(vb);
293 }
294
295 /*
296 * pmap_page_protect: change the protection of all recorded mappings
297 * of a managed page
298 *
299 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs
300 * => we only have to worry about making the page more protected.
301 * unprotecting a page is done on-demand at fault time.
302 */
303
304 __inline static void __unused
305 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
306 {
307 if ((prot & VM_PROT_WRITE) == 0) {
308 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
309 (void) pmap_clear_attrs(pg, PG_RW);
310 } else {
311 pmap_page_remove(pg);
312 }
313 }
314 }
315
316 /*
317 * pmap_protect: change the protection of pages in a pmap
318 *
319 * => this function is a frontend for pmap_remove/pmap_write_protect
320 * => we only have to worry about making the page more protected.
321 * unprotecting a page is done on-demand at fault time.
322 */
323
324 __inline static void __unused
325 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
326 {
327 if ((prot & VM_PROT_WRITE) == 0) {
328 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
329 pmap_write_protect(pmap, sva, eva, prot);
330 } else {
331 pmap_remove(pmap, sva, eva);
332 }
333 }
334 }
335
336 /*
337 * various address inlines
338 *
339 * vtopte: return a pointer to the PTE mapping a VA, works only for
340 * user and PT addresses
341 *
342 * kvtopte: return a pointer to the PTE mapping a kernel VA
343 */
344
345 #include <lib/libkern/libkern.h>
346
347 static __inline pt_entry_t * __unused
348 vtopte(vaddr_t va)
349 {
350
351 KASSERT(va < VM_MIN_KERNEL_ADDRESS);
352
353 return (PTE_BASE + pl1_i(va));
354 }
355
356 static __inline pt_entry_t * __unused
357 kvtopte(vaddr_t va)
358 {
359 pd_entry_t *pde;
360
361 KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
362
363 pde = L2_BASE + pl2_i(va);
364 if (*pde & PG_PS)
365 return ((pt_entry_t *)pde);
366
367 return (PTE_BASE + pl1_i(va));
368 }
369
370 paddr_t vtophys(vaddr_t);
371 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
372 bool sse2_idlezero_page(void *);
373
374
375 #ifdef XEN
376
377 #define XPTE_MASK L1_FRAME
378 /* XPTE_SHIFT = L1_SHIFT - log2(sizeof(pt_entry_t)) */
379 #if defined(__x86_64__) || defined(PAE)
380 #define XPTE_SHIFT 9
381 #else
382 #define XPTE_SHIFT 10
383 #endif
384
385 /* PTE access inline fuctions */
386
387 /*
388 * Get the machine address of the pointed pte
389 * We use hardware MMU to get value so works only for levels 1-3
390 */
391
392 static __inline paddr_t
393 xpmap_ptetomach(pt_entry_t *pte)
394 {
395 pt_entry_t *up_pte;
396 vaddr_t va = (vaddr_t) pte;
397
398 va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
399 up_pte = (pt_entry_t *) va;
400
401 return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK)));
402 }
403
404 /*
405 * xpmap_update()
406 * Update an active pt entry with Xen
407 * Equivalent to *pte = npte
408 */
409
410 static __inline void
411 xpmap_update (pt_entry_t *pte, pt_entry_t npte)
412 {
413 int s = splvm();
414
415 xpq_queue_pte_update(xpmap_ptetomach(pte), npte);
416 xpq_flush_queue();
417 splx(s);
418 }
419
420
421 /* Xen helpers to change bits of a pte */
422 #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */
423
424 /* pmap functions with machine addresses */
425 void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int);
426 int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t,
427 vm_prot_t, u_int, int);
428 bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *);
429
430 paddr_t vtomach(vaddr_t);
431 #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT)
432
433 #endif /* XEN */
434
435 /*
436 * Hooks for the pool allocator.
437 */
438 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
439
440 /*
441 * TLB shootdown structures.
442 */
443
444 struct pmap_tlb_packet {
445 #ifdef _LP64
446 uintptr_t tp_va[14]; /* whole struct: 128 bytes */
447 #else
448 uintptr_t tp_va[13]; /* whole struct: 64 bytes */
449 #endif
450 uint16_t tp_count;
451 uint16_t tp_pte;
452 uint32_t tp_cpumask;
453 uint32_t tp_usermask;
454 };
455 #define TP_MAXVA 6 /* no more than N seperate invlpg */
456
457 struct pmap_tlb_mailbox {
458 uint32_t tm_pending;
459 uint32_t tm_gen;
460 uint32_t tm_usergen;
461 uint32_t tm_globalgen;
462 char tm_pad[64 - sizeof(uintptr_t) * 4];
463 };
464
465 #endif /* _KERNEL */
466
467 #endif /* _X86_PMAP_H_ */
468