pmap.h revision 1.48.2.2 1 /* $NetBSD: pmap.h,v 1.48.2.2 2012/04/05 21:33:21 mrg Exp $ */
2
3 /*
4 * Copyright (c) 1997 Charles D. Cranor and Washington University.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 /*
29 * Copyright (c) 2001 Wasabi Systems, Inc.
30 * All rights reserved.
31 *
32 * Written by Frank van der Linden for Wasabi Systems, Inc.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. All advertising materials mentioning features or use of this software
43 * must display the following acknowledgement:
44 * This product includes software developed for the NetBSD Project by
45 * Wasabi Systems, Inc.
46 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
47 * or promote products derived from this software without specific prior
48 * written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60 * POSSIBILITY OF SUCH DAMAGE.
61 */
62
63 /*
64 * pmap.h: see pmap.c for the history of this pmap module.
65 */
66
67 #ifndef _X86_PMAP_H_
68 #define _X86_PMAP_H_
69
70 /*
71 * pl*_pi: index in the ptp page for a pde mapping a VA.
72 * (pl*_i below is the index in the virtual array of all pdes per level)
73 */
74 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
75 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
76 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
77 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
78
79 /*
80 * pl*_i: generate index into pde/pte arrays in virtual space
81 *
82 * pl_i(va, X) == plX_i(va) <= pl_i_roundup(va, X)
83 */
84 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
85 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
86 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
87 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
88 #define pl_i(va, lvl) \
89 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
90
91 #define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl))
92
93 /*
94 * PTP macros:
95 * a PTP's index is the PD index of the PDE that points to it
96 * a PTP's offset is the byte-offset in the PTE space that this PTP is at
97 * a PTP's VA is the first VA mapped by that PTP
98 */
99
100 #define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE)
101
102 /* size of a PDP: usually one page, except for PAE */
103 #ifdef PAE
104 #define PDP_SIZE 4
105 #else
106 #define PDP_SIZE 1
107 #endif
108
109
110 #if defined(_KERNEL)
111 /*
112 * pmap data structures: see pmap.c for details of locking.
113 */
114
115 /*
116 * we maintain a list of all non-kernel pmaps
117 */
118
119 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
120
121 /*
122 * linked list of all non-kernel pmaps
123 */
124 extern struct pmap_head pmaps;
125 extern kmutex_t pmaps_lock; /* protects pmaps */
126
127 /*
128 * pool_cache(9) that PDPs are allocated from
129 */
130 extern struct pool_cache pmap_pdp_cache;
131
132 /*
133 * the pmap structure
134 *
135 * note that the pm_obj contains the lock pointer, the reference count,
136 * page list, and number of PTPs within the pmap.
137 *
138 * pm_lock is the same as the lock for vm object 0. Changes to
139 * the other objects may only be made if that lock has been taken
140 * (the other object locks are only used when uvm_pagealloc is called)
141 *
142 * XXX If we ever support processor numbers higher than 31, we'll have
143 * XXX to rethink the CPU mask.
144 */
145
146 struct pmap {
147 struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
148 #define pm_lock pm_obj[0].vmobjlock
149 kmutex_t pm_obj_lock[PTP_LEVELS-1]; /* locks for pm_objs */
150 LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */
151 pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */
152 paddr_t pm_pdirpa[PDP_SIZE]; /* PA of PDs (read-only after create) */
153 struct vm_page *pm_ptphint[PTP_LEVELS-1];
154 /* pointer to a PTP in our pmap */
155 struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */
156
157 #if !defined(__x86_64__)
158 vaddr_t pm_hiexec; /* highest executable mapping */
159 #endif /* !defined(__x86_64__) */
160 int pm_flags; /* see below */
161
162 union descriptor *pm_ldt; /* user-set LDT */
163 size_t pm_ldt_len; /* size of LDT in bytes */
164 int pm_ldt_sel; /* LDT selector */
165 uint32_t pm_cpus; /* mask of CPUs using pmap */
166 uint32_t pm_kernel_cpus; /* mask of CPUs using kernel part
167 of pmap */
168 uint32_t pm_xen_ptp_cpus; /* mask of CPUs which have this pmap's
169 ptp mapped */
170 uint64_t pm_ncsw; /* for assertions */
171 struct vm_page *pm_gc_ptp; /* pages from pmap g/c */
172 };
173
174 /* macro to access pm_pdirpa slots */
175 #ifdef PAE
176 #define pmap_pdirpa(pmap, index) \
177 ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t))
178 #else
179 #define pmap_pdirpa(pmap, index) \
180 ((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t))
181 #endif
182
183 /*
184 * flag to be used for kernel mappings: PG_u on Xen/amd64,
185 * 0 otherwise.
186 */
187 #if defined(XEN) && defined(__x86_64__)
188 #define PG_k PG_u
189 #else
190 #define PG_k 0
191 #endif
192
193 /*
194 * MD flags that we use for pmap_enter and pmap_kenter_pa:
195 */
196
197 /*
198 * global kernel variables
199 */
200
201 /*
202 * PDPpaddr is the physical address of the kernel's PDP.
203 * - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3
204 * value associated to the kernel process, proc0.
205 * - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to
206 * the L3 PD, it cannot be considered as the equivalent of a %cr3 any more.
207 * - Xen: it corresponds to the PFN of the kernel's PDP.
208 */
209 extern u_long PDPpaddr;
210
211 extern int pmap_pg_g; /* do we support PG_G? */
212 extern long nkptp[PTP_LEVELS];
213
214 /*
215 * macros
216 */
217
218 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
219 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
220
221 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M)
222 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U)
223 #define pmap_copy(DP,SP,D,L,S)
224 #define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
225 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
226 #define pmap_move(DP,SP,D,L,S)
227 #define pmap_phys_address(ppn) (x86_ptob(ppn) & ~X86_MMAP_FLAG_MASK)
228 #define pmap_mmap_flags(ppn) x86_mmap_flags(ppn)
229 #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
230
231 #if defined(__x86_64__) || defined(PAE)
232 #define X86_MMAP_FLAG_SHIFT (64 - PGSHIFT)
233 #else
234 #define X86_MMAP_FLAG_SHIFT (32 - PGSHIFT)
235 #endif
236
237 #define X86_MMAP_FLAG_MASK 0xf
238 #define X86_MMAP_FLAG_PREFETCH 0x1
239
240 /*
241 * prototypes
242 */
243
244 void pmap_activate(struct lwp *);
245 void pmap_bootstrap(vaddr_t);
246 bool pmap_clear_attrs(struct vm_page *, unsigned);
247 void pmap_deactivate(struct lwp *);
248 void pmap_page_remove (struct vm_page *);
249 void pmap_remove(struct pmap *, vaddr_t, vaddr_t);
250 bool pmap_test_attrs(struct vm_page *, unsigned);
251 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
252 void pmap_load(void);
253 paddr_t pmap_init_tmp_pgtbl(paddr_t);
254 void pmap_remove_all(struct pmap *);
255 void pmap_ldt_sync(struct pmap *);
256
257 void pmap_emap_enter(vaddr_t, paddr_t, vm_prot_t);
258 void pmap_emap_remove(vaddr_t, vsize_t);
259 void pmap_emap_sync(bool);
260
261 void pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **,
262 pd_entry_t * const **);
263 void pmap_unmap_ptes(struct pmap *, struct pmap *);
264
265 int pmap_pdes_invalid(vaddr_t, pd_entry_t * const *, pd_entry_t *);
266
267 u_int x86_mmap_flags(paddr_t);
268
269 bool pmap_is_curpmap(struct pmap *);
270
271 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
272
273 typedef enum tlbwhy {
274 TLBSHOOT_APTE,
275 TLBSHOOT_KENTER,
276 TLBSHOOT_KREMOVE,
277 TLBSHOOT_FREE_PTP1,
278 TLBSHOOT_FREE_PTP2,
279 TLBSHOOT_REMOVE_PTE,
280 TLBSHOOT_REMOVE_PTES,
281 TLBSHOOT_SYNC_PV1,
282 TLBSHOOT_SYNC_PV2,
283 TLBSHOOT_WRITE_PROTECT,
284 TLBSHOOT_ENTER,
285 TLBSHOOT_UPDATE,
286 TLBSHOOT_BUS_DMA,
287 TLBSHOOT_BUS_SPACE,
288 TLBSHOOT__MAX,
289 } tlbwhy_t;
290
291 void pmap_tlb_init(void);
292 void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, tlbwhy_t);
293 void pmap_tlb_shootnow(void);
294 void pmap_tlb_intr(void);
295
296 #define __HAVE_PMAP_EMAP
297
298 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
299 #define PMAP_FORK /* turn on pmap_fork interface */
300
301 /*
302 * Do idle page zero'ing uncached to avoid polluting the cache.
303 */
304 bool pmap_pageidlezero(paddr_t);
305 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa))
306
307 /*
308 * inline functions
309 */
310
311 __inline static bool __unused
312 pmap_pdes_valid(vaddr_t va, pd_entry_t * const *pdes, pd_entry_t *lastpde)
313 {
314 return pmap_pdes_invalid(va, pdes, lastpde) == 0;
315 }
316
317 /*
318 * pmap_update_pg: flush one page from the TLB (or flush the whole thing
319 * if hardware doesn't support one-page flushing)
320 */
321
322 __inline static void __unused
323 pmap_update_pg(vaddr_t va)
324 {
325 invlpg(va);
326 }
327
328 /*
329 * pmap_update_2pg: flush two pages from the TLB
330 */
331
332 __inline static void __unused
333 pmap_update_2pg(vaddr_t va, vaddr_t vb)
334 {
335 invlpg(va);
336 invlpg(vb);
337 }
338
339 /*
340 * pmap_page_protect: change the protection of all recorded mappings
341 * of a managed page
342 *
343 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs
344 * => we only have to worry about making the page more protected.
345 * unprotecting a page is done on-demand at fault time.
346 */
347
348 __inline static void __unused
349 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
350 {
351 if ((prot & VM_PROT_WRITE) == 0) {
352 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
353 (void) pmap_clear_attrs(pg, PG_RW);
354 } else {
355 pmap_page_remove(pg);
356 }
357 }
358 }
359
360 /*
361 * pmap_protect: change the protection of pages in a pmap
362 *
363 * => this function is a frontend for pmap_remove/pmap_write_protect
364 * => we only have to worry about making the page more protected.
365 * unprotecting a page is done on-demand at fault time.
366 */
367
368 __inline static void __unused
369 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
370 {
371 if ((prot & VM_PROT_WRITE) == 0) {
372 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
373 pmap_write_protect(pmap, sva, eva, prot);
374 } else {
375 pmap_remove(pmap, sva, eva);
376 }
377 }
378 }
379
380 /*
381 * various address inlines
382 *
383 * vtopte: return a pointer to the PTE mapping a VA, works only for
384 * user and PT addresses
385 *
386 * kvtopte: return a pointer to the PTE mapping a kernel VA
387 */
388
389 #include <lib/libkern/libkern.h>
390
391 static __inline pt_entry_t * __unused
392 vtopte(vaddr_t va)
393 {
394
395 KASSERT(va < VM_MIN_KERNEL_ADDRESS);
396
397 return (PTE_BASE + pl1_i(va));
398 }
399
400 static __inline pt_entry_t * __unused
401 kvtopte(vaddr_t va)
402 {
403 pd_entry_t *pde;
404
405 KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
406
407 pde = L2_BASE + pl2_i(va);
408 if (*pde & PG_PS)
409 return ((pt_entry_t *)pde);
410
411 return (PTE_BASE + pl1_i(va));
412 }
413
414 paddr_t vtophys(vaddr_t);
415 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
416 void pmap_cpu_init_late(struct cpu_info *);
417 bool sse2_idlezero_page(void *);
418
419 #ifdef XEN
420 #include <sys/bitops.h>
421
422 #define XPTE_MASK L1_FRAME
423 /* Selects the index of a PTE in (A)PTE_BASE */
424 #define XPTE_SHIFT (L1_SHIFT - ilog2(sizeof(pt_entry_t)))
425
426 /* PTE access inline fuctions */
427
428 /*
429 * Get the machine address of the pointed pte
430 * We use hardware MMU to get value so works only for levels 1-3
431 */
432
433 static __inline paddr_t
434 xpmap_ptetomach(pt_entry_t *pte)
435 {
436 pt_entry_t *up_pte;
437 vaddr_t va = (vaddr_t) pte;
438
439 va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
440 up_pte = (pt_entry_t *) va;
441
442 return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK)));
443 }
444
445 /* Xen helpers to change bits of a pte */
446 #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */
447
448 paddr_t vtomach(vaddr_t);
449 #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT)
450 #endif /* XEN */
451
452 /* pmap functions with machine addresses */
453 void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int);
454 int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t,
455 vm_prot_t, u_int, int);
456 bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *);
457
458 /*
459 * Hooks for the pool allocator.
460 */
461 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
462
463 #ifdef __HAVE_DIRECT_MAP
464
465 #define L4_SLOT_DIRECT 509
466 #define PDIR_SLOT_DIRECT L4_SLOT_DIRECT
467
468 #define PMAP_DIRECT_BASE (VA_SIGN_NEG((L4_SLOT_DIRECT * NBPD_L4)))
469 #define PMAP_DIRECT_END (VA_SIGN_NEG(((L4_SLOT_DIRECT + 1) * NBPD_L4)))
470
471 #define PMAP_DIRECT_MAP(pa) ((vaddr_t)PMAP_DIRECT_BASE + (pa))
472 #define PMAP_DIRECT_UNMAP(va) ((paddr_t)(va) - PMAP_DIRECT_BASE)
473
474 /*
475 * Alternate mapping hooks for pool pages.
476 */
477 #define PMAP_MAP_POOLPAGE(pa) PMAP_DIRECT_MAP((pa))
478 #define PMAP_UNMAP_POOLPAGE(va) PMAP_DIRECT_UNMAP((va))
479
480 void pagezero(vaddr_t);
481
482 #endif /* __HAVE_DIRECT_MAP */
483
484 #endif /* _KERNEL */
485
486 #endif /* _X86_PMAP_H_ */
487