pmap.h revision 1.62 1 /* $NetBSD: pmap.h,v 1.62 2017/02/11 14:11:24 maxv Exp $ */
2
3 /*
4 * Copyright (c) 1997 Charles D. Cranor and Washington University.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 /*
29 * Copyright (c) 2001 Wasabi Systems, Inc.
30 * All rights reserved.
31 *
32 * Written by Frank van der Linden for Wasabi Systems, Inc.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. All advertising materials mentioning features or use of this software
43 * must display the following acknowledgement:
44 * This product includes software developed for the NetBSD Project by
45 * Wasabi Systems, Inc.
46 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
47 * or promote products derived from this software without specific prior
48 * written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60 * POSSIBILITY OF SUCH DAMAGE.
61 */
62
63 /*
64 * pmap.h: see pmap.c for the history of this pmap module.
65 */
66
67 #ifndef _X86_PMAP_H_
68 #define _X86_PMAP_H_
69
70 /*
71 * pl*_pi: index in the ptp page for a pde mapping a VA.
72 * (pl*_i below is the index in the virtual array of all pdes per level)
73 */
74 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
75 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
76 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
77 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
78
79 /*
80 * pl*_i: generate index into pde/pte arrays in virtual space
81 *
82 * pl_i(va, X) == plX_i(va) <= pl_i_roundup(va, X)
83 */
84 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
85 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
86 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
87 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
88 #define pl_i(va, lvl) \
89 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
90
91 #define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl))
92
93 /*
94 * PTP macros:
95 * a PTP's index is the PD index of the PDE that points to it
96 * a PTP's offset is the byte-offset in the PTE space that this PTP is at
97 * a PTP's VA is the first VA mapped by that PTP
98 */
99
100 #define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE)
101
102 /* size of a PDP: usually one page, except for PAE */
103 #ifdef PAE
104 #define PDP_SIZE 4
105 #else
106 #define PDP_SIZE 1
107 #endif
108
109
110 #if defined(_KERNEL)
111 #include <sys/kcpuset.h>
112 #include <uvm/pmap/pmap_pvt.h>
113
114 /*
115 * pmap data structures: see pmap.c for details of locking.
116 */
117
118 /*
119 * we maintain a list of all non-kernel pmaps
120 */
121
122 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
123
124 /*
125 * linked list of all non-kernel pmaps
126 */
127 extern struct pmap_head pmaps;
128 extern kmutex_t pmaps_lock; /* protects pmaps */
129
130 /*
131 * pool_cache(9) that PDPs are allocated from
132 */
133 extern struct pool_cache pmap_pdp_cache;
134
135 /*
136 * the pmap structure
137 *
138 * note that the pm_obj contains the lock pointer, the reference count,
139 * page list, and number of PTPs within the pmap.
140 *
141 * pm_lock is the same as the lock for vm object 0. Changes to
142 * the other objects may only be made if that lock has been taken
143 * (the other object locks are only used when uvm_pagealloc is called)
144 */
145
146 struct pmap {
147 struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
148 #define pm_lock pm_obj[0].vmobjlock
149 kmutex_t pm_obj_lock[PTP_LEVELS-1]; /* locks for pm_objs */
150 LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */
151 pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */
152 paddr_t pm_pdirpa[PDP_SIZE]; /* PA of PDs (read-only after create) */
153 struct vm_page *pm_ptphint[PTP_LEVELS-1];
154 /* pointer to a PTP in our pmap */
155 struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */
156
157 #if !defined(__x86_64__)
158 vaddr_t pm_hiexec; /* highest executable mapping */
159 #endif /* !defined(__x86_64__) */
160 int pm_flags; /* see below */
161
162 union descriptor *pm_ldt; /* user-set LDT */
163 size_t pm_ldt_len; /* size of LDT in bytes */
164 int pm_ldt_sel; /* LDT selector */
165 kcpuset_t *pm_cpus; /* mask of CPUs using pmap */
166 kcpuset_t *pm_kernel_cpus; /* mask of CPUs using kernel part
167 of pmap */
168 kcpuset_t *pm_xen_ptp_cpus; /* mask of CPUs which have this pmap's
169 ptp mapped */
170 uint64_t pm_ncsw; /* for assertions */
171 struct vm_page *pm_gc_ptp; /* pages from pmap g/c */
172 };
173
174 /* macro to access pm_pdirpa slots */
175 #ifdef PAE
176 #define pmap_pdirpa(pmap, index) \
177 ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t))
178 #else
179 #define pmap_pdirpa(pmap, index) \
180 ((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t))
181 #endif
182
183 /*
184 * flag to be used for kernel mappings: PG_u on Xen/amd64,
185 * 0 otherwise.
186 */
187 #if defined(XEN) && defined(__x86_64__)
188 #define PG_k PG_u
189 #else
190 #define PG_k 0
191 #endif
192
193 /*
194 * MD flags that we use for pmap_enter and pmap_kenter_pa:
195 */
196
197 /*
198 * global kernel variables
199 */
200
201 /*
202 * PDPpaddr is the physical address of the kernel's PDP.
203 * - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3
204 * value associated to the kernel process, proc0.
205 * - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to
206 * the L3 PD, it cannot be considered as the equivalent of a %cr3 any more.
207 * - Xen: it corresponds to the PFN of the kernel's PDP.
208 */
209 extern u_long PDPpaddr;
210
211 extern pd_entry_t pmap_pg_g; /* do we support PG_G? */
212 extern pd_entry_t pmap_pg_nx; /* do we support PG_NX? */
213 extern long nkptp[PTP_LEVELS];
214
215 /*
216 * macros
217 */
218
219 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
220 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
221
222 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M)
223 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U)
224 #define pmap_copy(DP,SP,D,L,S) __USE(L)
225 #define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
226 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
227 #define pmap_move(DP,SP,D,L,S)
228 #define pmap_phys_address(ppn) (x86_ptob(ppn) & ~X86_MMAP_FLAG_MASK)
229 #define pmap_mmap_flags(ppn) x86_mmap_flags(ppn)
230 #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
231
232 #if defined(__x86_64__) || defined(PAE)
233 #define X86_MMAP_FLAG_SHIFT (64 - PGSHIFT)
234 #else
235 #define X86_MMAP_FLAG_SHIFT (32 - PGSHIFT)
236 #endif
237
238 #define X86_MMAP_FLAG_MASK 0xf
239 #define X86_MMAP_FLAG_PREFETCH 0x1
240
241 /*
242 * prototypes
243 */
244
245 void pmap_activate(struct lwp *);
246 void pmap_bootstrap(vaddr_t);
247 bool pmap_clear_attrs(struct vm_page *, unsigned);
248 bool pmap_pv_clear_attrs(paddr_t, unsigned);
249 void pmap_deactivate(struct lwp *);
250 void pmap_page_remove(struct vm_page *);
251 void pmap_pv_remove(paddr_t);
252 void pmap_remove(struct pmap *, vaddr_t, vaddr_t);
253 bool pmap_test_attrs(struct vm_page *, unsigned);
254 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
255 void pmap_load(void);
256 paddr_t pmap_init_tmp_pgtbl(paddr_t);
257 void pmap_remove_all(struct pmap *);
258 void pmap_ldt_cleanup(struct lwp *);
259 void pmap_ldt_sync(struct pmap *);
260 void pmap_kremove_local(vaddr_t, vsize_t);
261
262 void pmap_emap_enter(vaddr_t, paddr_t, vm_prot_t);
263 void pmap_emap_remove(vaddr_t, vsize_t);
264 void pmap_emap_sync(bool);
265
266 #define __HAVE_PMAP_PV_TRACK 1
267 void pmap_pv_init(void);
268 void pmap_pv_track(paddr_t, psize_t);
269 void pmap_pv_untrack(paddr_t, psize_t);
270
271 void pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **,
272 pd_entry_t * const **);
273 void pmap_unmap_ptes(struct pmap *, struct pmap *);
274
275 int pmap_pdes_invalid(vaddr_t, pd_entry_t * const *, pd_entry_t *);
276
277 u_int x86_mmap_flags(paddr_t);
278
279 bool pmap_is_curpmap(struct pmap *);
280
281 #ifndef __HAVE_DIRECT_MAP
282 void pmap_vpage_cpu_init(struct cpu_info *);
283 #endif
284
285 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
286
287 typedef enum tlbwhy {
288 TLBSHOOT_APTE,
289 TLBSHOOT_KENTER,
290 TLBSHOOT_KREMOVE,
291 TLBSHOOT_FREE_PTP1,
292 TLBSHOOT_FREE_PTP2,
293 TLBSHOOT_REMOVE_PTE,
294 TLBSHOOT_REMOVE_PTES,
295 TLBSHOOT_SYNC_PV1,
296 TLBSHOOT_SYNC_PV2,
297 TLBSHOOT_WRITE_PROTECT,
298 TLBSHOOT_ENTER,
299 TLBSHOOT_UPDATE,
300 TLBSHOOT_BUS_DMA,
301 TLBSHOOT_BUS_SPACE,
302 TLBSHOOT__MAX,
303 } tlbwhy_t;
304
305 void pmap_tlb_init(void);
306 void pmap_tlb_cpu_init(struct cpu_info *);
307 void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, tlbwhy_t);
308 void pmap_tlb_shootnow(void);
309 void pmap_tlb_intr(void);
310
311 #define __HAVE_PMAP_EMAP
312
313 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
314 #define PMAP_FORK /* turn on pmap_fork interface */
315
316 /*
317 * Do idle page zero'ing uncached to avoid polluting the cache.
318 */
319 bool pmap_pageidlezero(paddr_t);
320 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa))
321
322 /*
323 * inline functions
324 */
325
326 __inline static bool __unused
327 pmap_pdes_valid(vaddr_t va, pd_entry_t * const *pdes, pd_entry_t *lastpde)
328 {
329 return pmap_pdes_invalid(va, pdes, lastpde) == 0;
330 }
331
332 /*
333 * pmap_update_pg: flush one page from the TLB (or flush the whole thing
334 * if hardware doesn't support one-page flushing)
335 */
336
337 __inline static void __unused
338 pmap_update_pg(vaddr_t va)
339 {
340 invlpg(va);
341 }
342
343 /*
344 * pmap_update_2pg: flush two pages from the TLB
345 */
346
347 __inline static void __unused
348 pmap_update_2pg(vaddr_t va, vaddr_t vb)
349 {
350 invlpg(va);
351 invlpg(vb);
352 }
353
354 /*
355 * pmap_page_protect: change the protection of all recorded mappings
356 * of a managed page
357 *
358 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs
359 * => we only have to worry about making the page more protected.
360 * unprotecting a page is done on-demand at fault time.
361 */
362
363 __inline static void __unused
364 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
365 {
366 if ((prot & VM_PROT_WRITE) == 0) {
367 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
368 (void) pmap_clear_attrs(pg, PG_RW);
369 } else {
370 pmap_page_remove(pg);
371 }
372 }
373 }
374
375 /*
376 * pmap_pv_protect: change the protection of all recorded mappings
377 * of an unmanaged page
378 */
379
380 __inline static void __unused
381 pmap_pv_protect(paddr_t pa, vm_prot_t prot)
382 {
383 if ((prot & VM_PROT_WRITE) == 0) {
384 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
385 (void) pmap_pv_clear_attrs(pa, PG_RW);
386 } else {
387 pmap_pv_remove(pa);
388 }
389 }
390 }
391
392 /*
393 * pmap_protect: change the protection of pages in a pmap
394 *
395 * => this function is a frontend for pmap_remove/pmap_write_protect
396 * => we only have to worry about making the page more protected.
397 * unprotecting a page is done on-demand at fault time.
398 */
399
400 __inline static void __unused
401 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
402 {
403 if ((prot & VM_PROT_WRITE) == 0) {
404 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
405 pmap_write_protect(pmap, sva, eva, prot);
406 } else {
407 pmap_remove(pmap, sva, eva);
408 }
409 }
410 }
411
412 /*
413 * various address inlines
414 *
415 * vtopte: return a pointer to the PTE mapping a VA, works only for
416 * user and PT addresses
417 *
418 * kvtopte: return a pointer to the PTE mapping a kernel VA
419 */
420
421 #include <lib/libkern/libkern.h>
422
423 static __inline pt_entry_t * __unused
424 vtopte(vaddr_t va)
425 {
426
427 KASSERT(va < VM_MIN_KERNEL_ADDRESS);
428
429 return (PTE_BASE + pl1_i(va));
430 }
431
432 static __inline pt_entry_t * __unused
433 kvtopte(vaddr_t va)
434 {
435 pd_entry_t *pde;
436
437 KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
438
439 pde = L2_BASE + pl2_i(va);
440 if (*pde & PG_PS)
441 return ((pt_entry_t *)pde);
442
443 return (PTE_BASE + pl1_i(va));
444 }
445
446 paddr_t vtophys(vaddr_t);
447 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
448 void pmap_cpu_init_late(struct cpu_info *);
449 bool sse2_idlezero_page(void *);
450
451 #ifdef XEN
452 #include <sys/bitops.h>
453
454 #define XPTE_MASK L1_FRAME
455 /* Selects the index of a PTE in (A)PTE_BASE */
456 #define XPTE_SHIFT (L1_SHIFT - ilog2(sizeof(pt_entry_t)))
457
458 /* PTE access inline fuctions */
459
460 /*
461 * Get the machine address of the pointed pte
462 * We use hardware MMU to get value so works only for levels 1-3
463 */
464
465 static __inline paddr_t
466 xpmap_ptetomach(pt_entry_t *pte)
467 {
468 pt_entry_t *up_pte;
469 vaddr_t va = (vaddr_t) pte;
470
471 va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
472 up_pte = (pt_entry_t *) va;
473
474 return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK)));
475 }
476
477 /* Xen helpers to change bits of a pte */
478 #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */
479
480 paddr_t vtomach(vaddr_t);
481 #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT)
482 #endif /* XEN */
483
484 /* pmap functions with machine addresses */
485 void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int);
486 int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t,
487 vm_prot_t, u_int, int);
488 bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *);
489 void pmap_free_ptps(struct vm_page *);
490
491 /*
492 * Hooks for the pool allocator.
493 */
494 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
495
496 #ifdef __HAVE_DIRECT_MAP
497
498 #define L4_SLOT_DIRECT 509
499 #define PDIR_SLOT_DIRECT L4_SLOT_DIRECT
500
501 #define PMAP_DIRECT_BASE (VA_SIGN_NEG((L4_SLOT_DIRECT * NBPD_L4)))
502 #define PMAP_DIRECT_END (VA_SIGN_NEG(((L4_SLOT_DIRECT + 1) * NBPD_L4)))
503
504 #define PMAP_DIRECT_MAP(pa) ((vaddr_t)PMAP_DIRECT_BASE + (pa))
505 #define PMAP_DIRECT_UNMAP(va) ((paddr_t)(va) - PMAP_DIRECT_BASE)
506
507 /*
508 * Alternate mapping hooks for pool pages.
509 */
510 #define PMAP_MAP_POOLPAGE(pa) PMAP_DIRECT_MAP((pa))
511 #define PMAP_UNMAP_POOLPAGE(va) PMAP_DIRECT_UNMAP((va))
512
513 void pagezero(vaddr_t);
514
515 #endif /* __HAVE_DIRECT_MAP */
516
517 #endif /* _KERNEL */
518
519 #endif /* _X86_PMAP_H_ */
520