pmap.h revision 1.76.2.1 1 /* $NetBSD: pmap.h,v 1.76.2.1 2018/05/21 04:36:02 pgoyette Exp $ */
2
3 /*
4 * Copyright (c) 1997 Charles D. Cranor and Washington University.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 /*
29 * Copyright (c) 2001 Wasabi Systems, Inc.
30 * All rights reserved.
31 *
32 * Written by Frank van der Linden for Wasabi Systems, Inc.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. All advertising materials mentioning features or use of this software
43 * must display the following acknowledgement:
44 * This product includes software developed for the NetBSD Project by
45 * Wasabi Systems, Inc.
46 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
47 * or promote products derived from this software without specific prior
48 * written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60 * POSSIBILITY OF SUCH DAMAGE.
61 */
62
63 /*
64 * pmap.h: see pmap.c for the history of this pmap module.
65 */
66
67 #ifndef _X86_PMAP_H_
68 #define _X86_PMAP_H_
69
70 /*
71 * pl*_pi: index in the ptp page for a pde mapping a VA.
72 * (pl*_i below is the index in the virtual array of all pdes per level)
73 */
74 #define pl1_pi(VA) (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
75 #define pl2_pi(VA) (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
76 #define pl3_pi(VA) (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
77 #define pl4_pi(VA) (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
78
79 /*
80 * pl*_i: generate index into pde/pte arrays in virtual space
81 *
82 * pl_i(va, X) == plX_i(va) <= pl_i_roundup(va, X)
83 */
84 #define pl1_i(VA) (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
85 #define pl2_i(VA) (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
86 #define pl3_i(VA) (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
87 #define pl4_i(VA) (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
88 #define pl_i(va, lvl) \
89 (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
90
91 #define pl_i_roundup(va, lvl) pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl))
92
93 /*
94 * PTP macros:
95 * a PTP's index is the PD index of the PDE that points to it
96 * a PTP's offset is the byte-offset in the PTE space that this PTP is at
97 * a PTP's VA is the first VA mapped by that PTP
98 */
99
100 #define ptp_va2o(va, lvl) (pl_i(va, (lvl)+1) * PAGE_SIZE)
101
102 /* size of a PDP: usually one page, except for PAE */
103 #ifdef PAE
104 #define PDP_SIZE 4
105 #else
106 #define PDP_SIZE 1
107 #endif
108
109
110 #if defined(_KERNEL)
111 #include <sys/kcpuset.h>
112 #include <uvm/pmap/pmap_pvt.h>
113
114 #define BTSEG_NONE 0
115 #define BTSEG_TEXT 1
116 #define BTSEG_RODATA 2
117 #define BTSEG_DATA 3
118 #define BTSPACE_NSEGS 64
119
120 struct bootspace {
121 struct {
122 vaddr_t va;
123 paddr_t pa;
124 size_t sz;
125 } head;
126
127 /* Kernel segments. */
128 struct {
129 int type;
130 vaddr_t va;
131 paddr_t pa;
132 size_t sz;
133 } segs[BTSPACE_NSEGS];
134
135 /*
136 * The area used by the early kernel bootstrap. It contains the kernel
137 * symbols, the preloaded modules, the bootstrap tables, and the ISA I/O
138 * mem.
139 */
140 struct {
141 vaddr_t va;
142 paddr_t pa;
143 size_t sz;
144 } boot;
145
146 /* A magic VA usable by the bootstrap code. */
147 vaddr_t spareva;
148
149 /* Virtual address of the page directory. */
150 vaddr_t pdir;
151
152 /* End of the area dedicated to kernel modules (amd64 only). */
153 vaddr_t emodule;
154 };
155
156 #ifndef MAXGDTSIZ
157 #define MAXGDTSIZ 65536 /* XXX */
158 #endif
159
160 struct pcpu_entry {
161 uint8_t gdt[MAXGDTSIZ];
162 uint8_t tss[PAGE_SIZE];
163 uint8_t ist0[PAGE_SIZE];
164 uint8_t ist1[PAGE_SIZE];
165 uint8_t ist2[PAGE_SIZE];
166 uint8_t ist3[PAGE_SIZE];
167 uint8_t rsp0[2 * PAGE_SIZE];
168 } __packed;
169
170 struct pcpu_area {
171 #ifdef SVS
172 uint8_t utls[PAGE_SIZE];
173 #endif
174 uint8_t idt[PAGE_SIZE];
175 uint8_t ldt[PAGE_SIZE];
176 struct pcpu_entry ent[MAXCPUS];
177 } __packed;
178
179 extern struct pcpu_area *pcpuarea;
180
181 /*
182 * pmap data structures: see pmap.c for details of locking.
183 */
184
185 /*
186 * we maintain a list of all non-kernel pmaps
187 */
188
189 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
190
191 /*
192 * linked list of all non-kernel pmaps
193 */
194 extern struct pmap_head pmaps;
195 extern kmutex_t pmaps_lock; /* protects pmaps */
196
197 /*
198 * pool_cache(9) that PDPs are allocated from
199 */
200 extern struct pool_cache pmap_pdp_cache;
201
202 /*
203 * the pmap structure
204 *
205 * note that the pm_obj contains the lock pointer, the reference count,
206 * page list, and number of PTPs within the pmap.
207 *
208 * pm_lock is the same as the lock for vm object 0. Changes to
209 * the other objects may only be made if that lock has been taken
210 * (the other object locks are only used when uvm_pagealloc is called)
211 */
212
213 struct pmap {
214 struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
215 #define pm_lock pm_obj[0].vmobjlock
216 kmutex_t pm_obj_lock[PTP_LEVELS-1]; /* locks for pm_objs */
217 LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */
218 pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */
219 paddr_t pm_pdirpa[PDP_SIZE]; /* PA of PDs (read-only after create) */
220 struct vm_page *pm_ptphint[PTP_LEVELS-1];
221 /* pointer to a PTP in our pmap */
222 struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */
223
224 #if !defined(__x86_64__)
225 vaddr_t pm_hiexec; /* highest executable mapping */
226 #endif /* !defined(__x86_64__) */
227 int pm_flags; /* see below */
228
229 union descriptor *pm_ldt; /* user-set LDT */
230 size_t pm_ldt_len; /* size of LDT in bytes */
231 int pm_ldt_sel; /* LDT selector */
232 kcpuset_t *pm_cpus; /* mask of CPUs using pmap */
233 kcpuset_t *pm_kernel_cpus; /* mask of CPUs using kernel part
234 of pmap */
235 kcpuset_t *pm_xen_ptp_cpus; /* mask of CPUs which have this pmap's
236 ptp mapped */
237 uint64_t pm_ncsw; /* for assertions */
238 struct vm_page *pm_gc_ptp; /* pages from pmap g/c */
239 };
240
241 /* macro to access pm_pdirpa slots */
242 #ifdef PAE
243 #define pmap_pdirpa(pmap, index) \
244 ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t))
245 #else
246 #define pmap_pdirpa(pmap, index) \
247 ((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t))
248 #endif
249
250 /*
251 * MD flags that we use for pmap_enter and pmap_kenter_pa:
252 */
253
254 /*
255 * global kernel variables
256 */
257
258 /*
259 * PDPpaddr is the physical address of the kernel's PDP.
260 * - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3
261 * value associated to the kernel process, proc0.
262 * - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to
263 * the L3 PD, it cannot be considered as the equivalent of a %cr3 any more.
264 * - Xen: it corresponds to the PFN of the kernel's PDP.
265 */
266 extern u_long PDPpaddr;
267
268 extern pd_entry_t pmap_pg_g; /* do we support PG_G? */
269 extern pd_entry_t pmap_pg_nx; /* do we support PG_NX? */
270 extern int pmap_largepages;
271 extern long nkptp[PTP_LEVELS];
272
273 /*
274 * macros
275 */
276
277 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
278 #define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
279
280 #define pmap_clear_modify(pg) pmap_clear_attrs(pg, PG_M)
281 #define pmap_clear_reference(pg) pmap_clear_attrs(pg, PG_U)
282 #define pmap_copy(DP,SP,D,L,S) __USE(L)
283 #define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
284 #define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
285 #define pmap_move(DP,SP,D,L,S)
286 #define pmap_phys_address(ppn) (x86_ptob(ppn) & ~X86_MMAP_FLAG_MASK)
287 #define pmap_mmap_flags(ppn) x86_mmap_flags(ppn)
288 #define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
289
290 #if defined(__x86_64__) || defined(PAE)
291 #define X86_MMAP_FLAG_SHIFT (64 - PGSHIFT)
292 #else
293 #define X86_MMAP_FLAG_SHIFT (32 - PGSHIFT)
294 #endif
295
296 #define X86_MMAP_FLAG_MASK 0xf
297 #define X86_MMAP_FLAG_PREFETCH 0x1
298
299 /*
300 * prototypes
301 */
302
303 void pmap_activate(struct lwp *);
304 void pmap_bootstrap(vaddr_t);
305 bool pmap_clear_attrs(struct vm_page *, unsigned);
306 bool pmap_pv_clear_attrs(paddr_t, unsigned);
307 void pmap_deactivate(struct lwp *);
308 void pmap_page_remove(struct vm_page *);
309 void pmap_pv_remove(paddr_t);
310 void pmap_remove(struct pmap *, vaddr_t, vaddr_t);
311 bool pmap_test_attrs(struct vm_page *, unsigned);
312 void pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
313 void pmap_load(void);
314 paddr_t pmap_init_tmp_pgtbl(paddr_t);
315 void pmap_remove_all(struct pmap *);
316 void pmap_ldt_cleanup(struct lwp *);
317 void pmap_ldt_sync(struct pmap *);
318 void pmap_kremove_local(vaddr_t, vsize_t);
319
320 #define __HAVE_PMAP_PV_TRACK 1
321 void pmap_pv_init(void);
322 void pmap_pv_track(paddr_t, psize_t);
323 void pmap_pv_untrack(paddr_t, psize_t);
324
325 void pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **,
326 pd_entry_t * const **);
327 void pmap_unmap_ptes(struct pmap *, struct pmap *);
328
329 int pmap_pdes_invalid(vaddr_t, pd_entry_t * const *, pd_entry_t *);
330
331 u_int x86_mmap_flags(paddr_t);
332
333 bool pmap_is_curpmap(struct pmap *);
334
335 #ifndef __HAVE_DIRECT_MAP
336 void pmap_vpage_cpu_init(struct cpu_info *);
337 #endif
338
339 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
340
341 typedef enum tlbwhy {
342 TLBSHOOT_APTE,
343 TLBSHOOT_KENTER,
344 TLBSHOOT_KREMOVE,
345 TLBSHOOT_FREE_PTP1,
346 TLBSHOOT_FREE_PTP2,
347 TLBSHOOT_REMOVE_PTE,
348 TLBSHOOT_REMOVE_PTES,
349 TLBSHOOT_SYNC_PV1,
350 TLBSHOOT_SYNC_PV2,
351 TLBSHOOT_WRITE_PROTECT,
352 TLBSHOOT_ENTER,
353 TLBSHOOT_UPDATE,
354 TLBSHOOT_BUS_DMA,
355 TLBSHOOT_BUS_SPACE,
356 TLBSHOOT__MAX,
357 } tlbwhy_t;
358
359 void pmap_tlb_init(void);
360 void pmap_tlb_cpu_init(struct cpu_info *);
361 void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, tlbwhy_t);
362 void pmap_tlb_shootnow(void);
363 void pmap_tlb_intr(void);
364
365 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
366 #define PMAP_FORK /* turn on pmap_fork interface */
367
368 /*
369 * Do idle page zero'ing uncached to avoid polluting the cache.
370 */
371 bool pmap_pageidlezero(paddr_t);
372 #define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa))
373
374 /*
375 * inline functions
376 */
377
378 __inline static bool __unused
379 pmap_pdes_valid(vaddr_t va, pd_entry_t * const *pdes, pd_entry_t *lastpde)
380 {
381 return pmap_pdes_invalid(va, pdes, lastpde) == 0;
382 }
383
384 /*
385 * pmap_update_pg: flush one page from the TLB (or flush the whole thing
386 * if hardware doesn't support one-page flushing)
387 */
388
389 __inline static void __unused
390 pmap_update_pg(vaddr_t va)
391 {
392 invlpg(va);
393 }
394
395 /*
396 * pmap_page_protect: change the protection of all recorded mappings
397 * of a managed page
398 *
399 * => this function is a frontend for pmap_page_remove/pmap_clear_attrs
400 * => we only have to worry about making the page more protected.
401 * unprotecting a page is done on-demand at fault time.
402 */
403
404 __inline static void __unused
405 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
406 {
407 if ((prot & VM_PROT_WRITE) == 0) {
408 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
409 (void) pmap_clear_attrs(pg, PG_RW);
410 } else {
411 pmap_page_remove(pg);
412 }
413 }
414 }
415
416 /*
417 * pmap_pv_protect: change the protection of all recorded mappings
418 * of an unmanaged page
419 */
420
421 __inline static void __unused
422 pmap_pv_protect(paddr_t pa, vm_prot_t prot)
423 {
424 if ((prot & VM_PROT_WRITE) == 0) {
425 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
426 (void) pmap_pv_clear_attrs(pa, PG_RW);
427 } else {
428 pmap_pv_remove(pa);
429 }
430 }
431 }
432
433 /*
434 * pmap_protect: change the protection of pages in a pmap
435 *
436 * => this function is a frontend for pmap_remove/pmap_write_protect
437 * => we only have to worry about making the page more protected.
438 * unprotecting a page is done on-demand at fault time.
439 */
440
441 __inline static void __unused
442 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
443 {
444 if ((prot & VM_PROT_WRITE) == 0) {
445 if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
446 pmap_write_protect(pmap, sva, eva, prot);
447 } else {
448 pmap_remove(pmap, sva, eva);
449 }
450 }
451 }
452
453 /*
454 * various address inlines
455 *
456 * vtopte: return a pointer to the PTE mapping a VA, works only for
457 * user and PT addresses
458 *
459 * kvtopte: return a pointer to the PTE mapping a kernel VA
460 */
461
462 #include <lib/libkern/libkern.h>
463
464 static __inline pt_entry_t * __unused
465 vtopte(vaddr_t va)
466 {
467
468 KASSERT(va < VM_MIN_KERNEL_ADDRESS);
469
470 return (PTE_BASE + pl1_i(va));
471 }
472
473 static __inline pt_entry_t * __unused
474 kvtopte(vaddr_t va)
475 {
476 pd_entry_t *pde;
477
478 KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
479
480 pde = L2_BASE + pl2_i(va);
481 if (*pde & PG_PS)
482 return ((pt_entry_t *)pde);
483
484 return (PTE_BASE + pl1_i(va));
485 }
486
487 paddr_t vtophys(vaddr_t);
488 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
489 void pmap_cpu_init_late(struct cpu_info *);
490 bool sse2_idlezero_page(void *);
491
492 #ifdef XEN
493 #include <sys/bitops.h>
494
495 #define XPTE_MASK L1_FRAME
496 /* Selects the index of a PTE in (A)PTE_BASE */
497 #define XPTE_SHIFT (L1_SHIFT - ilog2(sizeof(pt_entry_t)))
498
499 /* PTE access inline fuctions */
500
501 /*
502 * Get the machine address of the pointed pte
503 * We use hardware MMU to get value so works only for levels 1-3
504 */
505
506 static __inline paddr_t
507 xpmap_ptetomach(pt_entry_t *pte)
508 {
509 pt_entry_t *up_pte;
510 vaddr_t va = (vaddr_t) pte;
511
512 va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
513 up_pte = (pt_entry_t *) va;
514
515 return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK)));
516 }
517
518 /* Xen helpers to change bits of a pte */
519 #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */
520
521 paddr_t vtomach(vaddr_t);
522 #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT)
523 #endif /* XEN */
524
525 /* pmap functions with machine addresses */
526 void pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int);
527 int pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t,
528 vm_prot_t, u_int, int);
529 bool pmap_extract_ma(pmap_t, vaddr_t, paddr_t *);
530 void pmap_free_ptps(struct vm_page *);
531
532 /*
533 * Hooks for the pool allocator.
534 */
535 #define POOL_VTOPHYS(va) vtophys((vaddr_t) (va))
536
537 #ifdef __HAVE_PCPU_AREA
538 extern struct pcpu_area *pcpuarea;
539 #define PDIR_SLOT_PCPU 384
540 #define PMAP_PCPU_BASE (VA_SIGN_NEG((PDIR_SLOT_PCPU * NBPD_L4)))
541 #endif
542
543 #ifdef __HAVE_DIRECT_MAP
544
545 extern vaddr_t pmap_direct_base;
546 extern vaddr_t pmap_direct_end;
547
548 #define L4_SLOT_DIRECT 456
549 #define PDIR_SLOT_DIRECT L4_SLOT_DIRECT
550
551 #define NL4_SLOT_DIRECT 32
552
553 #define PMAP_DIRECT_DEFAULT_BASE (VA_SIGN_NEG((L4_SLOT_DIRECT * NBPD_L4)))
554
555 #define PMAP_DIRECT_BASE pmap_direct_base
556 #define PMAP_DIRECT_END pmap_direct_end
557
558 #define PMAP_DIRECT_MAP(pa) ((vaddr_t)PMAP_DIRECT_BASE + (pa))
559 #define PMAP_DIRECT_UNMAP(va) ((paddr_t)(va) - PMAP_DIRECT_BASE)
560
561 /*
562 * Alternate mapping hooks for pool pages.
563 */
564 #define PMAP_MAP_POOLPAGE(pa) PMAP_DIRECT_MAP((pa))
565 #define PMAP_UNMAP_POOLPAGE(va) PMAP_DIRECT_UNMAP((va))
566
567 void pagezero(vaddr_t);
568
569 #endif /* __HAVE_DIRECT_MAP */
570
571 #endif /* _KERNEL */
572
573 #endif /* _X86_PMAP_H_ */
574