isa_machdep.c revision 1.16 1 1.16 mrg /* $NetBSD: isa_machdep.c,v 1.16 2007/02/21 20:41:26 mrg Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.1 fvdl * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9 1.1 fvdl * Simulation Facility, NASA Ames Research Center.
10 1.1 fvdl *
11 1.1 fvdl * Redistribution and use in source and binary forms, with or without
12 1.1 fvdl * modification, are permitted provided that the following conditions
13 1.1 fvdl * are met:
14 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
15 1.1 fvdl * notice, this list of conditions and the following disclaimer.
16 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
18 1.1 fvdl * documentation and/or other materials provided with the distribution.
19 1.1 fvdl * 3. All advertising materials mentioning features or use of this software
20 1.1 fvdl * must display the following acknowledgement:
21 1.1 fvdl * This product includes software developed by the NetBSD
22 1.1 fvdl * Foundation, Inc. and its contributors.
23 1.1 fvdl * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 fvdl * contributors may be used to endorse or promote products derived
25 1.1 fvdl * from this software without specific prior written permission.
26 1.1 fvdl *
27 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
38 1.1 fvdl */
39 1.1 fvdl
40 1.1 fvdl /*-
41 1.1 fvdl * Copyright (c) 1991 The Regents of the University of California.
42 1.1 fvdl * All rights reserved.
43 1.1 fvdl *
44 1.1 fvdl * This code is derived from software contributed to Berkeley by
45 1.1 fvdl * William Jolitz.
46 1.1 fvdl *
47 1.1 fvdl * Redistribution and use in source and binary forms, with or without
48 1.1 fvdl * modification, are permitted provided that the following conditions
49 1.1 fvdl * are met:
50 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
51 1.1 fvdl * notice, this list of conditions and the following disclaimer.
52 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
53 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
54 1.1 fvdl * documentation and/or other materials provided with the distribution.
55 1.8 agc * 3. Neither the name of the University nor the names of its contributors
56 1.1 fvdl * may be used to endorse or promote products derived from this software
57 1.1 fvdl * without specific prior written permission.
58 1.1 fvdl *
59 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60 1.1 fvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61 1.1 fvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62 1.1 fvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63 1.1 fvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64 1.1 fvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65 1.1 fvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.1 fvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.1 fvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.1 fvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.1 fvdl * SUCH DAMAGE.
70 1.1 fvdl *
71 1.1 fvdl * @(#)isa.c 7.2 (Berkeley) 5/13/91
72 1.1 fvdl */
73 1.1 fvdl
74 1.1 fvdl #include <sys/cdefs.h>
75 1.16 mrg __KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.16 2007/02/21 20:41:26 mrg Exp $");
76 1.1 fvdl
77 1.1 fvdl #include <sys/param.h>
78 1.1 fvdl #include <sys/systm.h>
79 1.1 fvdl #include <sys/kernel.h>
80 1.1 fvdl #include <sys/syslog.h>
81 1.1 fvdl #include <sys/device.h>
82 1.1 fvdl #include <sys/malloc.h>
83 1.1 fvdl #include <sys/proc.h>
84 1.1 fvdl #include <sys/mbuf.h>
85 1.1 fvdl
86 1.1 fvdl #include <machine/bus.h>
87 1.12 yamt #include <machine/bus_private.h>
88 1.1 fvdl
89 1.1 fvdl #include <machine/pio.h>
90 1.1 fvdl #include <machine/cpufunc.h>
91 1.1 fvdl
92 1.1 fvdl #include <dev/isa/isareg.h>
93 1.1 fvdl #include <dev/isa/isavar.h>
94 1.1 fvdl
95 1.1 fvdl #include <uvm/uvm_extern.h>
96 1.1 fvdl
97 1.1 fvdl #include "ioapic.h"
98 1.1 fvdl
99 1.1 fvdl #if NIOAPIC > 0
100 1.1 fvdl #include <machine/i82093var.h>
101 1.1 fvdl #include <machine/mpbiosvar.h>
102 1.2 fvdl #endif
103 1.1 fvdl
104 1.7 fvdl static int _isa_dma_may_bounce(bus_dma_tag_t, bus_dmamap_t, int, int *);
105 1.1 fvdl
106 1.1 fvdl struct x86_bus_dma_tag isa_bus_dma_tag = {
107 1.16 mrg 0, /* _tag_needs_free */
108 1.7 fvdl ISA_DMA_BOUNCE_THRESHOLD, /* _bounce_thresh */
109 1.7 fvdl 0, /* _bounce_alloc_lo */
110 1.7 fvdl ISA_DMA_BOUNCE_THRESHOLD, /* _bounce_alloc_hi */
111 1.7 fvdl _isa_dma_may_bounce,
112 1.7 fvdl _bus_dmamap_create,
113 1.7 fvdl _bus_dmamap_destroy,
114 1.7 fvdl _bus_dmamap_load,
115 1.7 fvdl _bus_dmamap_load_mbuf,
116 1.7 fvdl _bus_dmamap_load_uio,
117 1.7 fvdl _bus_dmamap_load_raw,
118 1.7 fvdl _bus_dmamap_unload,
119 1.7 fvdl _bus_dmamap_sync,
120 1.7 fvdl _bus_dmamem_alloc,
121 1.1 fvdl _bus_dmamem_free,
122 1.1 fvdl _bus_dmamem_map,
123 1.1 fvdl _bus_dmamem_unmap,
124 1.1 fvdl _bus_dmamem_mmap,
125 1.16 mrg _bus_dmatag_subregion,
126 1.16 mrg _bus_dmatag_destroy,
127 1.1 fvdl };
128 1.1 fvdl
129 1.7 fvdl #define IDTVEC(name) __CONCAT(X,name)
130 1.7 fvdl typedef void (vector) __P((void));
131 1.7 fvdl extern vector *IDTVEC(intr)[];
132 1.7 fvdl
133 1.1 fvdl #define LEGAL_IRQ(x) ((x) >= 0 && (x) < NUM_LEGACY_IRQS && (x) != 2)
134 1.1 fvdl
135 1.1 fvdl int
136 1.15 christos isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
137 1.1 fvdl {
138 1.1 fvdl int i, tmp, bestirq, count;
139 1.1 fvdl struct intrhand **p, *q;
140 1.1 fvdl struct intrsource *isp;
141 1.1 fvdl struct cpu_info *ci;
142 1.1 fvdl
143 1.1 fvdl if (type == IST_NONE)
144 1.1 fvdl panic("intr_alloc: bogus type");
145 1.1 fvdl
146 1.1 fvdl ci = &cpu_info_primary;
147 1.1 fvdl
148 1.1 fvdl bestirq = -1;
149 1.1 fvdl count = -1;
150 1.1 fvdl
151 1.1 fvdl /* some interrupts should never be dynamically allocated */
152 1.1 fvdl mask &= 0xdef8;
153 1.1 fvdl
154 1.1 fvdl /*
155 1.1 fvdl * XXX some interrupts will be used later (6 for fdc, 12 for pms).
156 1.1 fvdl * the right answer is to do "breadth-first" searching of devices.
157 1.1 fvdl */
158 1.1 fvdl mask &= 0xefbf;
159 1.1 fvdl
160 1.1 fvdl simple_lock(&ci->ci_slock);
161 1.1 fvdl
162 1.1 fvdl for (i = 0; i < NUM_LEGACY_IRQS; i++) {
163 1.1 fvdl if (LEGAL_IRQ(i) == 0 || (mask & (1<<i)) == 0)
164 1.1 fvdl continue;
165 1.1 fvdl isp = ci->ci_isources[i];
166 1.1 fvdl if (isp == NULL) {
167 1.1 fvdl /*
168 1.1 fvdl * if nothing's using the irq, just return it
169 1.1 fvdl */
170 1.1 fvdl *irq = i;
171 1.1 fvdl simple_unlock(&ci->ci_slock);
172 1.1 fvdl return (0);
173 1.1 fvdl }
174 1.1 fvdl
175 1.1 fvdl switch(isp->is_type) {
176 1.1 fvdl case IST_EDGE:
177 1.1 fvdl case IST_LEVEL:
178 1.1 fvdl if (type != isp->is_type)
179 1.1 fvdl continue;
180 1.1 fvdl /*
181 1.1 fvdl * if the irq is shareable, count the number of other
182 1.1 fvdl * handlers, and if it's smaller than the last irq like
183 1.1 fvdl * this, remember it
184 1.1 fvdl *
185 1.1 fvdl * XXX We should probably also consider the
186 1.1 fvdl * interrupt level and stick IPL_TTY with other
187 1.1 fvdl * IPL_TTY, etc.
188 1.1 fvdl */
189 1.1 fvdl for (p = &isp->is_handlers, tmp = 0; (q = *p) != NULL;
190 1.1 fvdl p = &q->ih_next, tmp++)
191 1.1 fvdl ;
192 1.1 fvdl if ((bestirq == -1) || (count > tmp)) {
193 1.1 fvdl bestirq = i;
194 1.1 fvdl count = tmp;
195 1.1 fvdl }
196 1.1 fvdl break;
197 1.1 fvdl
198 1.1 fvdl case IST_PULSE:
199 1.1 fvdl /* this just isn't shareable */
200 1.1 fvdl continue;
201 1.1 fvdl }
202 1.1 fvdl }
203 1.1 fvdl
204 1.1 fvdl simple_unlock(&ci->ci_slock);
205 1.1 fvdl
206 1.1 fvdl if (bestirq == -1)
207 1.1 fvdl return (1);
208 1.1 fvdl
209 1.1 fvdl *irq = bestirq;
210 1.1 fvdl
211 1.1 fvdl return (0);
212 1.1 fvdl }
213 1.1 fvdl
214 1.1 fvdl const struct evcnt *
215 1.15 christos isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
216 1.1 fvdl {
217 1.1 fvdl
218 1.1 fvdl /* XXX for now, no evcnt parent reported */
219 1.1 fvdl return NULL;
220 1.1 fvdl }
221 1.1 fvdl
222 1.1 fvdl void *
223 1.14 christos isa_intr_establish(
224 1.15 christos isa_chipset_tag_t ic,
225 1.14 christos int irq,
226 1.14 christos int type,
227 1.14 christos int level,
228 1.14 christos int (*ih_fun)(void *),
229 1.14 christos void *ih_arg
230 1.14 christos )
231 1.1 fvdl {
232 1.1 fvdl struct pic *pic;
233 1.1 fvdl int pin;
234 1.1 fvdl #if NIOAPIC > 0
235 1.1 fvdl int mpih;
236 1.1 fvdl #endif
237 1.1 fvdl
238 1.1 fvdl pin = irq;
239 1.1 fvdl pic = &i8259_pic;
240 1.1 fvdl
241 1.1 fvdl #if NIOAPIC > 0
242 1.1 fvdl if (mp_busses != NULL) {
243 1.10 fvdl if (intr_find_mpmapping(mp_isa_bus, irq, &mpih) == 0 ||
244 1.10 fvdl intr_find_mpmapping(mp_eisa_bus, irq, &mpih) == 0) {
245 1.1 fvdl if (!APIC_IRQ_ISLEGACY(mpih)) {
246 1.1 fvdl pin = APIC_IRQ_PIN(mpih);
247 1.1 fvdl pic = (struct pic *)
248 1.1 fvdl ioapic_find(APIC_IRQ_APIC(mpih));
249 1.1 fvdl if (pic == NULL) {
250 1.1 fvdl printf("isa_intr_establish: "
251 1.1 fvdl "unknown apic %d\n",
252 1.1 fvdl APIC_IRQ_APIC(mpih));
253 1.1 fvdl return NULL;
254 1.1 fvdl }
255 1.1 fvdl }
256 1.1 fvdl } else
257 1.1 fvdl printf("isa_intr_establish: no MP mapping found\n");
258 1.1 fvdl }
259 1.1 fvdl #endif
260 1.1 fvdl return intr_establish(irq, pic, pin, type, level, ih_fun, ih_arg);
261 1.1 fvdl }
262 1.1 fvdl
263 1.1 fvdl /*
264 1.1 fvdl * Deregister an interrupt handler.
265 1.1 fvdl */
266 1.1 fvdl void
267 1.15 christos isa_intr_disestablish(isa_chipset_tag_t ic, void *arg)
268 1.1 fvdl {
269 1.1 fvdl struct intrhand *ih = arg;
270 1.1 fvdl
271 1.1 fvdl if (!LEGAL_IRQ(ih->ih_pin))
272 1.1 fvdl panic("intr_disestablish: bogus irq");
273 1.1 fvdl
274 1.1 fvdl intr_disestablish(ih);
275 1.1 fvdl }
276 1.1 fvdl
277 1.1 fvdl void
278 1.15 christos isa_attach_hook(struct device *parent, struct device *self,
279 1.14 christos struct isabus_attach_args *iba)
280 1.1 fvdl {
281 1.4 fvdl extern struct x86_isa_chipset x86_isa_chipset;
282 1.1 fvdl extern int isa_has_been_seen;
283 1.1 fvdl
284 1.1 fvdl /*
285 1.1 fvdl * Notify others that might need to know that the ISA bus
286 1.1 fvdl * has now been attached.
287 1.1 fvdl */
288 1.1 fvdl if (isa_has_been_seen)
289 1.1 fvdl panic("isaattach: ISA bus already seen!");
290 1.1 fvdl isa_has_been_seen = 1;
291 1.1 fvdl
292 1.1 fvdl /*
293 1.1 fvdl * Since we can only have one ISA bus, we just use a single
294 1.1 fvdl * statically allocated ISA chipset structure. Pass it up
295 1.1 fvdl * now.
296 1.1 fvdl */
297 1.4 fvdl iba->iba_ic = &x86_isa_chipset;
298 1.1 fvdl }
299 1.1 fvdl
300 1.1 fvdl int
301 1.1 fvdl isa_mem_alloc(t, size, align, boundary, flags, addrp, bshp)
302 1.1 fvdl bus_space_tag_t t;
303 1.1 fvdl bus_size_t size, align;
304 1.1 fvdl bus_addr_t boundary;
305 1.1 fvdl int flags;
306 1.1 fvdl bus_addr_t *addrp;
307 1.1 fvdl bus_space_handle_t *bshp;
308 1.1 fvdl {
309 1.1 fvdl
310 1.1 fvdl /*
311 1.1 fvdl * Allocate physical address space in the ISA hole.
312 1.1 fvdl */
313 1.1 fvdl return (bus_space_alloc(t, IOM_BEGIN, IOM_END - 1, size, align,
314 1.1 fvdl boundary, flags, addrp, bshp));
315 1.1 fvdl }
316 1.1 fvdl
317 1.1 fvdl void
318 1.1 fvdl isa_mem_free(t, bsh, size)
319 1.1 fvdl bus_space_tag_t t;
320 1.1 fvdl bus_space_handle_t bsh;
321 1.1 fvdl bus_size_t size;
322 1.1 fvdl {
323 1.1 fvdl
324 1.1 fvdl bus_space_free(t, bsh, size);
325 1.1 fvdl }
326 1.1 fvdl
327 1.1 fvdl /*
328 1.7 fvdl * ISA only has 24-bits of address space. This means
329 1.7 fvdl * we can't DMA to pages over 16M. In order to DMA to
330 1.7 fvdl * arbitrary buffers, we use "bounce buffers" - pages
331 1.7 fvdl * in memory below the 16M boundary. On DMA reads,
332 1.7 fvdl * DMA happens to the bounce buffers, and is copied into
333 1.7 fvdl * the caller's buffer. On writes, data is copied into
334 1.7 fvdl * but bounce buffer, and the DMA happens from those
335 1.7 fvdl * pages. To software using the DMA mapping interface,
336 1.7 fvdl * this looks simply like a data cache.
337 1.7 fvdl *
338 1.7 fvdl * If we have more than 16M of RAM in the system, we may
339 1.7 fvdl * need bounce buffers. We check and remember that here.
340 1.7 fvdl *
341 1.7 fvdl * There are exceptions, however. VLB devices can do
342 1.7 fvdl * 32-bit DMA, and indicate that here.
343 1.7 fvdl *
344 1.7 fvdl * ...or, there is an opposite case. The most segments
345 1.7 fvdl * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
346 1.7 fvdl * the caller can't handle that many segments (e.g. the
347 1.7 fvdl * ISA DMA controller), we may have to bounce it as well.
348 1.7 fvdl */
349 1.7 fvdl static int
350 1.15 christos _isa_dma_may_bounce(bus_dma_tag_t t, bus_dmamap_t map, int flags,
351 1.14 christos int *cookieflagsp)
352 1.1 fvdl {
353 1.7 fvdl if ((flags & ISABUS_DMA_32BIT) != 0)
354 1.1 fvdl map->_dm_bounce_thresh = 0;
355 1.1 fvdl
356 1.7 fvdl if (((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt)
357 1.11 thorpej *cookieflagsp |= X86_DMA_MIGHT_NEED_BOUNCE;
358 1.7 fvdl return 0;
359 1.1 fvdl }
360