isa_machdep.c revision 1.41 1 1.41 cherry /* $NetBSD: isa_machdep.c,v 1.41 2018/12/03 19:51:09 cherry Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.1 fvdl * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
9 1.1 fvdl * Simulation Facility, NASA Ames Research Center.
10 1.1 fvdl *
11 1.1 fvdl * Redistribution and use in source and binary forms, with or without
12 1.1 fvdl * modification, are permitted provided that the following conditions
13 1.1 fvdl * are met:
14 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
15 1.1 fvdl * notice, this list of conditions and the following disclaimer.
16 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
18 1.1 fvdl * documentation and/or other materials provided with the distribution.
19 1.1 fvdl *
20 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
31 1.1 fvdl */
32 1.1 fvdl
33 1.1 fvdl /*-
34 1.1 fvdl * Copyright (c) 1991 The Regents of the University of California.
35 1.1 fvdl * All rights reserved.
36 1.1 fvdl *
37 1.1 fvdl * This code is derived from software contributed to Berkeley by
38 1.1 fvdl * William Jolitz.
39 1.1 fvdl *
40 1.1 fvdl * Redistribution and use in source and binary forms, with or without
41 1.1 fvdl * modification, are permitted provided that the following conditions
42 1.1 fvdl * are met:
43 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
44 1.1 fvdl * notice, this list of conditions and the following disclaimer.
45 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
46 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
47 1.1 fvdl * documentation and/or other materials provided with the distribution.
48 1.8 agc * 3. Neither the name of the University nor the names of its contributors
49 1.1 fvdl * may be used to endorse or promote products derived from this software
50 1.1 fvdl * without specific prior written permission.
51 1.1 fvdl *
52 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
53 1.1 fvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 1.1 fvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 1.1 fvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
56 1.1 fvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 1.1 fvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 1.1 fvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 1.1 fvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 1.1 fvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 1.1 fvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62 1.1 fvdl * SUCH DAMAGE.
63 1.1 fvdl *
64 1.1 fvdl * @(#)isa.c 7.2 (Berkeley) 5/13/91
65 1.1 fvdl */
66 1.1 fvdl
67 1.1 fvdl #include <sys/cdefs.h>
68 1.41 cherry __KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.41 2018/12/03 19:51:09 cherry Exp $");
69 1.1 fvdl
70 1.1 fvdl #include <sys/param.h>
71 1.1 fvdl #include <sys/systm.h>
72 1.1 fvdl #include <sys/kernel.h>
73 1.1 fvdl #include <sys/syslog.h>
74 1.1 fvdl #include <sys/device.h>
75 1.1 fvdl #include <sys/proc.h>
76 1.1 fvdl #include <sys/mbuf.h>
77 1.26 ad #include <sys/bus.h>
78 1.26 ad #include <sys/cpu.h>
79 1.1 fvdl
80 1.12 yamt #include <machine/bus_private.h>
81 1.1 fvdl #include <machine/pio.h>
82 1.1 fvdl #include <machine/cpufunc.h>
83 1.31 dyoung #include <machine/autoconf.h>
84 1.31 dyoung #include <machine/bootinfo.h>
85 1.1 fvdl
86 1.1 fvdl #include <dev/isa/isareg.h>
87 1.1 fvdl #include <dev/isa/isavar.h>
88 1.1 fvdl
89 1.1 fvdl #include <uvm/uvm_extern.h>
90 1.1 fvdl
91 1.31 dyoung #include "acpica.h"
92 1.31 dyoung #include "opt_acpi.h"
93 1.1 fvdl #include "ioapic.h"
94 1.1 fvdl
95 1.1 fvdl #if NIOAPIC > 0
96 1.1 fvdl #include <machine/i82093var.h>
97 1.1 fvdl #include <machine/mpbiosvar.h>
98 1.2 fvdl #endif
99 1.1 fvdl
100 1.7 fvdl static int _isa_dma_may_bounce(bus_dma_tag_t, bus_dmamap_t, int, int *);
101 1.1 fvdl
102 1.1 fvdl struct x86_bus_dma_tag isa_bus_dma_tag = {
103 1.29 christos ._tag_needs_free = 0,
104 1.29 christos ._bounce_thresh = ISA_DMA_BOUNCE_THRESHOLD,
105 1.29 christos ._bounce_alloc_lo = 0,
106 1.29 christos ._bounce_alloc_hi = ISA_DMA_BOUNCE_THRESHOLD,
107 1.29 christos ._may_bounce = _isa_dma_may_bounce,
108 1.1 fvdl };
109 1.1 fvdl
110 1.7 fvdl #define IDTVEC(name) __CONCAT(X,name)
111 1.25 dsl typedef void (vector)(void);
112 1.7 fvdl extern vector *IDTVEC(intr)[];
113 1.7 fvdl
114 1.1 fvdl #define LEGAL_IRQ(x) ((x) >= 0 && (x) < NUM_LEGACY_IRQS && (x) != 2)
115 1.1 fvdl
116 1.1 fvdl int
117 1.15 christos isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
118 1.1 fvdl {
119 1.1 fvdl int i, tmp, bestirq, count;
120 1.1 fvdl struct intrhand **p, *q;
121 1.1 fvdl struct intrsource *isp;
122 1.1 fvdl struct cpu_info *ci;
123 1.1 fvdl
124 1.1 fvdl if (type == IST_NONE)
125 1.1 fvdl panic("intr_alloc: bogus type");
126 1.1 fvdl
127 1.1 fvdl ci = &cpu_info_primary;
128 1.1 fvdl
129 1.1 fvdl bestirq = -1;
130 1.1 fvdl count = -1;
131 1.1 fvdl
132 1.1 fvdl /* some interrupts should never be dynamically allocated */
133 1.1 fvdl mask &= 0xdef8;
134 1.1 fvdl
135 1.1 fvdl /*
136 1.1 fvdl * XXX some interrupts will be used later (6 for fdc, 12 for pms).
137 1.1 fvdl * the right answer is to do "breadth-first" searching of devices.
138 1.1 fvdl */
139 1.1 fvdl mask &= 0xefbf;
140 1.1 fvdl
141 1.26 ad mutex_enter(&cpu_lock);
142 1.1 fvdl
143 1.1 fvdl for (i = 0; i < NUM_LEGACY_IRQS; i++) {
144 1.1 fvdl if (LEGAL_IRQ(i) == 0 || (mask & (1<<i)) == 0)
145 1.1 fvdl continue;
146 1.1 fvdl isp = ci->ci_isources[i];
147 1.1 fvdl if (isp == NULL) {
148 1.32 mbalmer /* if nothing's using the irq, just return it */
149 1.1 fvdl *irq = i;
150 1.26 ad mutex_exit(&cpu_lock);
151 1.32 mbalmer return 0;
152 1.1 fvdl }
153 1.1 fvdl
154 1.1 fvdl switch(isp->is_type) {
155 1.1 fvdl case IST_EDGE:
156 1.1 fvdl case IST_LEVEL:
157 1.1 fvdl if (type != isp->is_type)
158 1.1 fvdl continue;
159 1.1 fvdl /*
160 1.1 fvdl * if the irq is shareable, count the number of other
161 1.1 fvdl * handlers, and if it's smaller than the last irq like
162 1.1 fvdl * this, remember it
163 1.1 fvdl *
164 1.1 fvdl * XXX We should probably also consider the
165 1.1 fvdl * interrupt level and stick IPL_TTY with other
166 1.1 fvdl * IPL_TTY, etc.
167 1.1 fvdl */
168 1.1 fvdl for (p = &isp->is_handlers, tmp = 0; (q = *p) != NULL;
169 1.1 fvdl p = &q->ih_next, tmp++)
170 1.1 fvdl ;
171 1.1 fvdl if ((bestirq == -1) || (count > tmp)) {
172 1.1 fvdl bestirq = i;
173 1.1 fvdl count = tmp;
174 1.1 fvdl }
175 1.1 fvdl break;
176 1.1 fvdl case IST_PULSE:
177 1.1 fvdl /* this just isn't shareable */
178 1.1 fvdl continue;
179 1.1 fvdl }
180 1.1 fvdl }
181 1.1 fvdl
182 1.26 ad mutex_exit(&cpu_lock);
183 1.1 fvdl
184 1.1 fvdl if (bestirq == -1)
185 1.32 mbalmer return 1;
186 1.1 fvdl
187 1.1 fvdl *irq = bestirq;
188 1.1 fvdl
189 1.32 mbalmer return 0;
190 1.1 fvdl }
191 1.1 fvdl
192 1.1 fvdl const struct evcnt *
193 1.15 christos isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
194 1.1 fvdl {
195 1.1 fvdl /* XXX for now, no evcnt parent reported */
196 1.1 fvdl return NULL;
197 1.1 fvdl }
198 1.1 fvdl
199 1.1 fvdl void *
200 1.32 mbalmer isa_intr_establish(isa_chipset_tag_t ic, int irq, int type, int level,
201 1.32 mbalmer int (*ih_fun)(void *), void *ih_arg)
202 1.1 fvdl {
203 1.34 jdolecek return isa_intr_establish_xname(ic, irq, type, level,
204 1.34 jdolecek ih_fun, ih_arg, "unknown");
205 1.34 jdolecek }
206 1.34 jdolecek
207 1.34 jdolecek void *
208 1.34 jdolecek isa_intr_establish_xname(isa_chipset_tag_t ic, int irq, int type, int level,
209 1.34 jdolecek int (*ih_fun)(void *), void *ih_arg, const char *xname)
210 1.34 jdolecek {
211 1.1 fvdl struct pic *pic;
212 1.1 fvdl int pin;
213 1.41 cherry #if NIOAPIC > 0
214 1.38 bouyer intr_handle_t mpih = 0;
215 1.35 cherry struct ioapic_softc *ioapic = NULL;
216 1.1 fvdl #endif
217 1.1 fvdl
218 1.1 fvdl pin = irq;
219 1.1 fvdl pic = &i8259_pic;
220 1.1 fvdl
221 1.1 fvdl #if NIOAPIC > 0
222 1.1 fvdl if (mp_busses != NULL) {
223 1.10 fvdl if (intr_find_mpmapping(mp_isa_bus, irq, &mpih) == 0 ||
224 1.10 fvdl intr_find_mpmapping(mp_eisa_bus, irq, &mpih) == 0) {
225 1.1 fvdl if (!APIC_IRQ_ISLEGACY(mpih)) {
226 1.1 fvdl pin = APIC_IRQ_PIN(mpih);
227 1.23 drochner ioapic = ioapic_find(APIC_IRQ_APIC(mpih));
228 1.23 drochner if (ioapic == NULL) {
229 1.1 fvdl printf("isa_intr_establish: "
230 1.1 fvdl "unknown apic %d\n",
231 1.1 fvdl APIC_IRQ_APIC(mpih));
232 1.1 fvdl return NULL;
233 1.1 fvdl }
234 1.23 drochner pic = &ioapic->sc_pic;
235 1.1 fvdl }
236 1.1 fvdl } else
237 1.1 fvdl printf("isa_intr_establish: no MP mapping found\n");
238 1.1 fvdl }
239 1.1 fvdl #endif
240 1.34 jdolecek return intr_establish_xname(irq, pic, pin, type, level, ih_fun, ih_arg,
241 1.34 jdolecek false, xname);
242 1.1 fvdl }
243 1.1 fvdl
244 1.32 mbalmer /* Deregister an interrupt handler. */
245 1.1 fvdl void
246 1.15 christos isa_intr_disestablish(isa_chipset_tag_t ic, void *arg)
247 1.1 fvdl {
248 1.35 cherry #if !defined(XEN)
249 1.1 fvdl struct intrhand *ih = arg;
250 1.1 fvdl
251 1.1 fvdl if (!LEGAL_IRQ(ih->ih_pin))
252 1.1 fvdl panic("intr_disestablish: bogus irq");
253 1.1 fvdl
254 1.1 fvdl intr_disestablish(ih);
255 1.35 cherry #endif
256 1.1 fvdl }
257 1.1 fvdl
258 1.1 fvdl void
259 1.32 mbalmer isa_attach_hook(device_t parent, device_t self, struct isabus_attach_args *iba)
260 1.1 fvdl {
261 1.4 fvdl extern struct x86_isa_chipset x86_isa_chipset;
262 1.1 fvdl extern int isa_has_been_seen;
263 1.1 fvdl
264 1.1 fvdl /*
265 1.1 fvdl * Notify others that might need to know that the ISA bus
266 1.1 fvdl * has now been attached.
267 1.1 fvdl */
268 1.1 fvdl if (isa_has_been_seen)
269 1.1 fvdl panic("isaattach: ISA bus already seen!");
270 1.1 fvdl isa_has_been_seen = 1;
271 1.1 fvdl
272 1.1 fvdl /*
273 1.1 fvdl * Since we can only have one ISA bus, we just use a single
274 1.1 fvdl * statically allocated ISA chipset structure. Pass it up
275 1.1 fvdl * now.
276 1.1 fvdl */
277 1.4 fvdl iba->iba_ic = &x86_isa_chipset;
278 1.1 fvdl }
279 1.1 fvdl
280 1.27 dyoung void
281 1.28 dyoung isa_detach_hook(isa_chipset_tag_t ic, device_t self)
282 1.27 dyoung {
283 1.27 dyoung extern int isa_has_been_seen;
284 1.27 dyoung
285 1.27 dyoung isa_has_been_seen = 0;
286 1.27 dyoung }
287 1.27 dyoung
288 1.1 fvdl int
289 1.21 cegger isa_mem_alloc(bus_space_tag_t t, bus_size_t size, bus_size_t align,
290 1.32 mbalmer bus_addr_t boundary, int flags, bus_addr_t *addrp, bus_space_handle_t *bshp)
291 1.1 fvdl {
292 1.32 mbalmer /* Allocate physical address space in the ISA hole. */
293 1.32 mbalmer return bus_space_alloc(t, IOM_BEGIN, IOM_END - 1, size, align,
294 1.32 mbalmer boundary, flags, addrp, bshp);
295 1.1 fvdl }
296 1.1 fvdl
297 1.1 fvdl void
298 1.21 cegger isa_mem_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
299 1.1 fvdl {
300 1.1 fvdl bus_space_free(t, bsh, size);
301 1.1 fvdl }
302 1.1 fvdl
303 1.1 fvdl /*
304 1.7 fvdl * ISA only has 24-bits of address space. This means
305 1.7 fvdl * we can't DMA to pages over 16M. In order to DMA to
306 1.7 fvdl * arbitrary buffers, we use "bounce buffers" - pages
307 1.7 fvdl * in memory below the 16M boundary. On DMA reads,
308 1.7 fvdl * DMA happens to the bounce buffers, and is copied into
309 1.7 fvdl * the caller's buffer. On writes, data is copied into
310 1.7 fvdl * but bounce buffer, and the DMA happens from those
311 1.7 fvdl * pages. To software using the DMA mapping interface,
312 1.7 fvdl * this looks simply like a data cache.
313 1.7 fvdl *
314 1.7 fvdl * If we have more than 16M of RAM in the system, we may
315 1.7 fvdl * need bounce buffers. We check and remember that here.
316 1.7 fvdl *
317 1.7 fvdl * There are exceptions, however. VLB devices can do
318 1.7 fvdl * 32-bit DMA, and indicate that here.
319 1.7 fvdl *
320 1.7 fvdl * ...or, there is an opposite case. The most segments
321 1.7 fvdl * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
322 1.7 fvdl * the caller can't handle that many segments (e.g. the
323 1.7 fvdl * ISA DMA controller), we may have to bounce it as well.
324 1.7 fvdl */
325 1.7 fvdl static int
326 1.15 christos _isa_dma_may_bounce(bus_dma_tag_t t, bus_dmamap_t map, int flags,
327 1.14 christos int *cookieflagsp)
328 1.1 fvdl {
329 1.7 fvdl if ((flags & ISABUS_DMA_32BIT) != 0)
330 1.1 fvdl map->_dm_bounce_thresh = 0;
331 1.1 fvdl
332 1.7 fvdl if (((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt)
333 1.11 thorpej *cookieflagsp |= X86_DMA_MIGHT_NEED_BOUNCE;
334 1.7 fvdl return 0;
335 1.1 fvdl }
336 1.31 dyoung
337 1.31 dyoung device_t
338 1.31 dyoung device_isa_register(device_t dev, void *aux)
339 1.31 dyoung {
340 1.31 dyoung /*
341 1.31 dyoung * Handle network interfaces here, the attachment information is
342 1.31 dyoung * not available driver-independently later.
343 1.31 dyoung *
344 1.31 dyoung * For disks, there is nothing useful available at attach time.
345 1.31 dyoung */
346 1.31 dyoung if (device_class(dev) == DV_IFNET) {
347 1.31 dyoung struct btinfo_netif *bin = lookup_bootinfo(BTINFO_NETIF);
348 1.31 dyoung if (bin == NULL)
349 1.31 dyoung return NULL;
350 1.31 dyoung
351 1.31 dyoung /*
352 1.31 dyoung * We don't check the driver name against the device name
353 1.31 dyoung * passed by the boot ROM. The ROM should stay usable if
354 1.31 dyoung * the driver becomes obsolete. The physical attachment
355 1.31 dyoung * information (checked below) must be sufficient to
356 1.32 mbalmer * identify the device.
357 1.31 dyoung */
358 1.31 dyoung if (bin->bus == BI_BUS_ISA &&
359 1.31 dyoung device_is_a(device_parent(dev), "isa")) {
360 1.31 dyoung struct isa_attach_args *iaa = aux;
361 1.31 dyoung
362 1.31 dyoung /* Compare IO base address */
363 1.31 dyoung /* XXXJRT What about multiple IO addrs? */
364 1.31 dyoung if (iaa->ia_nio > 0 &&
365 1.31 dyoung bin->addr.iobase == iaa->ia_io[0].ir_addr)
366 1.31 dyoung return dev;
367 1.31 dyoung }
368 1.31 dyoung }
369 1.31 dyoung #if NACPICA > 0
370 1.31 dyoung #if notyet
371 1.31 dyoung if (device_is_a(dev, "isa") && acpi_active) {
372 1.31 dyoung if (!(AcpiGbl_FADT.BootFlags & ACPI_FADT_LEGACY_DEVICES))
373 1.31 dyoung prop_dictionary_set_bool(device_properties(dev),
374 1.31 dyoung "no-legacy-devices", true);
375 1.31 dyoung }
376 1.31 dyoung #endif
377 1.31 dyoung #endif /* NACPICA > 0 */
378 1.31 dyoung return NULL;
379 1.31 dyoung }
380