isa_machdep.c revision 1.8
1 /* $NetBSD: isa_machdep.c,v 1.8 2003/08/07 16:30:33 agc Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 9 * Simulation Facility, NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /*- 41 * Copyright (c) 1991 The Regents of the University of California. 42 * All rights reserved. 43 * 44 * This code is derived from software contributed to Berkeley by 45 * William Jolitz. 46 * 47 * Redistribution and use in source and binary forms, with or without 48 * modification, are permitted provided that the following conditions 49 * are met: 50 * 1. Redistributions of source code must retain the above copyright 51 * notice, this list of conditions and the following disclaimer. 52 * 2. Redistributions in binary form must reproduce the above copyright 53 * notice, this list of conditions and the following disclaimer in the 54 * documentation and/or other materials provided with the distribution. 55 * 3. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)isa.c 7.2 (Berkeley) 5/13/91 72 */ 73 74 #include <sys/cdefs.h> 75 __KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.8 2003/08/07 16:30:33 agc Exp $"); 76 77 #include <sys/param.h> 78 #include <sys/systm.h> 79 #include <sys/kernel.h> 80 #include <sys/syslog.h> 81 #include <sys/device.h> 82 #include <sys/malloc.h> 83 #include <sys/proc.h> 84 #include <sys/mbuf.h> 85 86 #define _X86_BUS_DMA_PRIVATE 87 #include <machine/bus.h> 88 89 #include <machine/pio.h> 90 #include <machine/cpufunc.h> 91 92 #include <dev/isa/isareg.h> 93 #include <dev/isa/isavar.h> 94 95 #include <uvm/uvm_extern.h> 96 97 #include "ioapic.h" 98 99 #if NIOAPIC > 0 100 #include <machine/i82093var.h> 101 #include <machine/mpbiosvar.h> 102 #endif 103 104 static int _isa_dma_may_bounce(bus_dma_tag_t, bus_dmamap_t, int, int *); 105 106 struct x86_bus_dma_tag isa_bus_dma_tag = { 107 ISA_DMA_BOUNCE_THRESHOLD, /* _bounce_thresh */ 108 0, /* _bounce_alloc_lo */ 109 ISA_DMA_BOUNCE_THRESHOLD, /* _bounce_alloc_hi */ 110 _isa_dma_may_bounce, 111 _bus_dmamap_create, 112 _bus_dmamap_destroy, 113 _bus_dmamap_load, 114 _bus_dmamap_load_mbuf, 115 _bus_dmamap_load_uio, 116 _bus_dmamap_load_raw, 117 _bus_dmamap_unload, 118 _bus_dmamap_sync, 119 _bus_dmamem_alloc, 120 _bus_dmamem_free, 121 _bus_dmamem_map, 122 _bus_dmamem_unmap, 123 _bus_dmamem_mmap, 124 }; 125 126 #define IDTVEC(name) __CONCAT(X,name) 127 typedef void (vector) __P((void)); 128 extern vector *IDTVEC(intr)[]; 129 130 #define LEGAL_IRQ(x) ((x) >= 0 && (x) < NUM_LEGACY_IRQS && (x) != 2) 131 132 int 133 isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq) 134 { 135 int i, tmp, bestirq, count; 136 struct intrhand **p, *q; 137 struct intrsource *isp; 138 struct cpu_info *ci; 139 140 if (type == IST_NONE) 141 panic("intr_alloc: bogus type"); 142 143 ci = &cpu_info_primary; 144 145 bestirq = -1; 146 count = -1; 147 148 /* some interrupts should never be dynamically allocated */ 149 mask &= 0xdef8; 150 151 /* 152 * XXX some interrupts will be used later (6 for fdc, 12 for pms). 153 * the right answer is to do "breadth-first" searching of devices. 154 */ 155 mask &= 0xefbf; 156 157 simple_lock(&ci->ci_slock); 158 159 for (i = 0; i < NUM_LEGACY_IRQS; i++) { 160 if (LEGAL_IRQ(i) == 0 || (mask & (1<<i)) == 0) 161 continue; 162 isp = ci->ci_isources[i]; 163 if (isp == NULL) { 164 /* 165 * if nothing's using the irq, just return it 166 */ 167 *irq = i; 168 simple_unlock(&ci->ci_slock); 169 return (0); 170 } 171 172 switch(isp->is_type) { 173 case IST_EDGE: 174 case IST_LEVEL: 175 if (type != isp->is_type) 176 continue; 177 /* 178 * if the irq is shareable, count the number of other 179 * handlers, and if it's smaller than the last irq like 180 * this, remember it 181 * 182 * XXX We should probably also consider the 183 * interrupt level and stick IPL_TTY with other 184 * IPL_TTY, etc. 185 */ 186 for (p = &isp->is_handlers, tmp = 0; (q = *p) != NULL; 187 p = &q->ih_next, tmp++) 188 ; 189 if ((bestirq == -1) || (count > tmp)) { 190 bestirq = i; 191 count = tmp; 192 } 193 break; 194 195 case IST_PULSE: 196 /* this just isn't shareable */ 197 continue; 198 } 199 } 200 201 simple_unlock(&ci->ci_slock); 202 203 if (bestirq == -1) 204 return (1); 205 206 *irq = bestirq; 207 208 return (0); 209 } 210 211 const struct evcnt * 212 isa_intr_evcnt(isa_chipset_tag_t ic, int irq) 213 { 214 215 /* XXX for now, no evcnt parent reported */ 216 return NULL; 217 } 218 219 void * 220 isa_intr_establish(ic, irq, type, level, ih_fun, ih_arg) 221 isa_chipset_tag_t ic; 222 int irq; 223 int type; 224 int level; 225 int (*ih_fun) __P((void *)); 226 void *ih_arg; 227 { 228 struct pic *pic; 229 int pin; 230 #if NIOAPIC > 0 231 int mpih; 232 #endif 233 234 pin = irq; 235 pic = &i8259_pic; 236 237 #if NIOAPIC > 0 238 if (mp_busses != NULL) { 239 if (intr_find_mpmapping(mp_isa_bus, irq, &mpih) == 0 || 240 intr_find_mpmapping(mp_eisa_bus, irq, &mpih) == 0) { 241 if (!APIC_IRQ_ISLEGACY(mpih)) { 242 pin = APIC_IRQ_PIN(mpih); 243 pic = (struct pic *) 244 ioapic_find(APIC_IRQ_APIC(mpih)); 245 if (pic == NULL) { 246 printf("isa_intr_establish: " 247 "unknown apic %d\n", 248 APIC_IRQ_APIC(mpih)); 249 return NULL; 250 } 251 } 252 } else 253 printf("isa_intr_establish: no MP mapping found\n"); 254 } 255 #endif 256 return intr_establish(irq, pic, pin, type, level, ih_fun, ih_arg); 257 } 258 259 /* 260 * Deregister an interrupt handler. 261 */ 262 void 263 isa_intr_disestablish(ic, arg) 264 isa_chipset_tag_t ic; 265 void *arg; 266 { 267 struct intrhand *ih = arg; 268 269 if (!LEGAL_IRQ(ih->ih_pin)) 270 panic("intr_disestablish: bogus irq"); 271 272 intr_disestablish(ih); 273 } 274 275 void 276 isa_attach_hook(parent, self, iba) 277 struct device *parent, *self; 278 struct isabus_attach_args *iba; 279 { 280 extern struct x86_isa_chipset x86_isa_chipset; 281 extern int isa_has_been_seen; 282 283 /* 284 * Notify others that might need to know that the ISA bus 285 * has now been attached. 286 */ 287 if (isa_has_been_seen) 288 panic("isaattach: ISA bus already seen!"); 289 isa_has_been_seen = 1; 290 291 /* 292 * Since we can only have one ISA bus, we just use a single 293 * statically allocated ISA chipset structure. Pass it up 294 * now. 295 */ 296 iba->iba_ic = &x86_isa_chipset; 297 } 298 299 int 300 isa_mem_alloc(t, size, align, boundary, flags, addrp, bshp) 301 bus_space_tag_t t; 302 bus_size_t size, align; 303 bus_addr_t boundary; 304 int flags; 305 bus_addr_t *addrp; 306 bus_space_handle_t *bshp; 307 { 308 309 /* 310 * Allocate physical address space in the ISA hole. 311 */ 312 return (bus_space_alloc(t, IOM_BEGIN, IOM_END - 1, size, align, 313 boundary, flags, addrp, bshp)); 314 } 315 316 void 317 isa_mem_free(t, bsh, size) 318 bus_space_tag_t t; 319 bus_space_handle_t bsh; 320 bus_size_t size; 321 { 322 323 bus_space_free(t, bsh, size); 324 } 325 326 /* 327 * ISA only has 24-bits of address space. This means 328 * we can't DMA to pages over 16M. In order to DMA to 329 * arbitrary buffers, we use "bounce buffers" - pages 330 * in memory below the 16M boundary. On DMA reads, 331 * DMA happens to the bounce buffers, and is copied into 332 * the caller's buffer. On writes, data is copied into 333 * but bounce buffer, and the DMA happens from those 334 * pages. To software using the DMA mapping interface, 335 * this looks simply like a data cache. 336 * 337 * If we have more than 16M of RAM in the system, we may 338 * need bounce buffers. We check and remember that here. 339 * 340 * There are exceptions, however. VLB devices can do 341 * 32-bit DMA, and indicate that here. 342 * 343 * ...or, there is an opposite case. The most segments 344 * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If 345 * the caller can't handle that many segments (e.g. the 346 * ISA DMA controller), we may have to bounce it as well. 347 */ 348 static int 349 _isa_dma_may_bounce(bus_dma_tag_t t, bus_dmamap_t map, int flags, 350 int *cookieflagsp) 351 { 352 if ((flags & ISABUS_DMA_32BIT) != 0) 353 map->_dm_bounce_thresh = 0; 354 355 if (((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt) 356 *cookieflagsp |= X86_DMA_ID_MIGHT_NEED_BOUNCE; 357 return 0; 358 } 359
Indexes created Sun Sep 28 07:09:56 GMT 2025