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i82802reg.h revision 1.1
      1 /*	$NetBSD: i82802reg.h,v 1.1 2006/02/12 18:16:01 tron Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2000 Michael Shalayeff
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *      This product includes software developed by Michael Shalayeff.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
     25  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     27  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     29  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
     30  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     31  * THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Intel 82802AB/82802AC Firmware Hub
     36  *
     37  * see:	ftp://download.intel.com/design/chipsets/datashts/29065804.pdf
     38  *	and http://www.intel.com/design/chipsets/datashts/29065804.pdf
     39  */
     40 
     41 /*
     42  * unfortunatelly FWH does not show up in the pci device scan, 10x intel.
     43  * so all we do is probe for it in the pchb driver at the following address.
     44  */
     45 #define	I82802_IOBASE	0xffb00000
     46 #define	I82802_IOSIZE	0x00100000
     47 
     48 /*
     49  * FWH registers
     50  * (table 4-4)
     51  */
     52 #define	I82802_BLOCK_LK		0xf0002
     53 #define	I82802_MINUS01_LK	0xe0002
     54 #define	I82802_MINUS02_LK	0xd0002
     55 #define	I82802_MINUS03_LK	0xc0002
     56 #define	I82802_MINUS04_LK	0xb0002
     57 #define	I82802_MINUS05_LK	0xa0002
     58 #define	I82802_MINUS06_LK	0x90002
     59 #define	I82802_MINUS07_LK	0x80002
     60 #define	I82802_MINUS08_LK	0x70002
     61 #define	I82802_MINUS09_LK	0x60002
     62 #define	I82802_MINUS10_LK	0x50002
     63 #define	I82802_MINUS11_LK	0x40002
     64 #define	I82802_MINUS12_LK	0x30002
     65 #define	I82802_MINUS13_LK	0x20002
     66 #define	I82802_MINUS14_LK	0x10002
     67 #define	I82802_MINUS15_LK	0x00002
     68 #define	I82802_FGPI_REG		0xc0100
     69 
     70 /*
     71  * T_BLOCK_LK and T_MINUS_* (block locking registers)
     72  * (table 4-5)
     73  */
     74 #define	I82802_BLR_RD		0x04
     75 #define	I82802_BLR_LD		0x02
     76 #define	I82802_BLR_WL		0x01
     77 
     78 /*
     79  * Register Based Locking Value Definitions
     80  * (tabe 4-6)
     81  */
     82 #define	I82802_LV_FULL		0x00
     83 #define	I82802_LV_WRITE		0x01
     84 #define	I82802_LV_DOWN		0x02
     85 #define	I82802_LV_READ		0x04
     86 
     87 /*
     88  * General Purpose Inputs Register
     89  * (table 4-7)
     90  */
     91 #define	I82802_FGPI_PIN4	0x10	/* PLCC-30/T SOP-7  */
     92 #define	I82802_FGPI_PIN3	0x08	/* PLCC-30/T SOP-15 */
     93 #define	I82802_FGPI_PIN2	0x04	/* PLCC-30/T SOP-16 */
     94 #define	I82802_FGPI_PIN1	0x02	/* PLCC-30/T SOP-17 */
     95 #define	I82802_FGPI_PIN0	0x01	/* PLCC-30/T SOP-18 */
     96 
     97 /*
     98  * RNG registers
     99  */
    100 #define	I82802_RNG_HWST		0xc015f
    101 #define	I82802_RNG_HWST_PRESENT	0x40
    102 #define	I82802_RNG_HWST_ENABLE	0x01
    103 #define	I82802_RNG_RNGST	0xc0160
    104 #define	I82802_RNG_RNGST_DATAV	0x01
    105 #define	I82802_RNG_DATA		0xc0161
    106