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pci_intr_machdep.c revision 1.12.10.1
      1  1.12.10.1       jym /*	$NetBSD: pci_intr_machdep.c,v 1.12.10.1 2009/05/13 17:18:44 jym Exp $	*/
      2        1.1    bouyer 
      3        1.1    bouyer /*-
      4  1.12.10.1       jym  * Copyright (c) 1997, 1998, 2009 The NetBSD Foundation, Inc.
      5        1.1    bouyer  * All rights reserved.
      6        1.1    bouyer  *
      7        1.1    bouyer  * This code is derived from software contributed to The NetBSD Foundation
      8        1.1    bouyer  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9        1.1    bouyer  * NASA Ames Research Center.
     10        1.1    bouyer  *
     11        1.1    bouyer  * Redistribution and use in source and binary forms, with or without
     12        1.1    bouyer  * modification, are permitted provided that the following conditions
     13        1.1    bouyer  * are met:
     14        1.1    bouyer  * 1. Redistributions of source code must retain the above copyright
     15        1.1    bouyer  *    notice, this list of conditions and the following disclaimer.
     16        1.1    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     17        1.1    bouyer  *    notice, this list of conditions and the following disclaimer in the
     18        1.1    bouyer  *    documentation and/or other materials provided with the distribution.
     19        1.1    bouyer  *
     20        1.1    bouyer  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21        1.1    bouyer  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22        1.1    bouyer  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23        1.1    bouyer  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24        1.1    bouyer  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25        1.1    bouyer  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26        1.1    bouyer  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27        1.1    bouyer  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28        1.1    bouyer  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29        1.1    bouyer  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30        1.1    bouyer  * POSSIBILITY OF SUCH DAMAGE.
     31        1.1    bouyer  */
     32        1.1    bouyer 
     33        1.1    bouyer /*
     34        1.1    bouyer  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
     35        1.1    bouyer  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
     36        1.1    bouyer  *
     37        1.1    bouyer  * Redistribution and use in source and binary forms, with or without
     38        1.1    bouyer  * modification, are permitted provided that the following conditions
     39        1.1    bouyer  * are met:
     40        1.1    bouyer  * 1. Redistributions of source code must retain the above copyright
     41        1.1    bouyer  *    notice, this list of conditions and the following disclaimer.
     42        1.1    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     43        1.1    bouyer  *    notice, this list of conditions and the following disclaimer in the
     44        1.1    bouyer  *    documentation and/or other materials provided with the distribution.
     45        1.1    bouyer  * 3. All advertising materials mentioning features or use of this software
     46        1.1    bouyer  *    must display the following acknowledgement:
     47        1.1    bouyer  *	This product includes software developed by Charles M. Hannum.
     48        1.1    bouyer  * 4. The name of the author may not be used to endorse or promote products
     49        1.1    bouyer  *    derived from this software without specific prior written permission.
     50        1.1    bouyer  *
     51        1.1    bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     52        1.1    bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     53        1.1    bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     54        1.1    bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     55        1.1    bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     56        1.1    bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     57        1.1    bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     58        1.1    bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     59        1.1    bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     60        1.1    bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     61        1.1    bouyer  */
     62        1.1    bouyer 
     63        1.1    bouyer /*
     64        1.1    bouyer  * Machine-specific functions for PCI autoconfiguration.
     65        1.1    bouyer  *
     66        1.1    bouyer  * On PCs, there are two methods of generating PCI configuration cycles.
     67        1.1    bouyer  * We try to detect the appropriate mechanism for this machine and set
     68        1.1    bouyer  * up a few function pointers to access the correct method directly.
     69        1.1    bouyer  *
     70        1.1    bouyer  * The configuration method can be hard-coded in the config file by
     71        1.1    bouyer  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     72        1.1    bouyer  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     73        1.1    bouyer  */
     74        1.1    bouyer 
     75        1.1    bouyer #include <sys/cdefs.h>
     76  1.12.10.1       jym __KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.12.10.1 2009/05/13 17:18:44 jym Exp $");
     77        1.1    bouyer 
     78        1.1    bouyer #include <sys/types.h>
     79        1.1    bouyer #include <sys/param.h>
     80        1.1    bouyer #include <sys/time.h>
     81        1.1    bouyer #include <sys/systm.h>
     82        1.1    bouyer #include <sys/errno.h>
     83        1.1    bouyer #include <sys/device.h>
     84        1.7        ad #include <sys/intr.h>
     85        1.1    bouyer 
     86        1.1    bouyer #include <uvm/uvm_extern.h>
     87        1.1    bouyer 
     88        1.1    bouyer #include <dev/pci/pcivar.h>
     89        1.1    bouyer 
     90        1.1    bouyer #include "ioapic.h"
     91        1.1    bouyer #include "eisa.h"
     92        1.2  christos #include "acpi.h"
     93        1.1    bouyer #include "opt_mpbios.h"
     94        1.2  christos #include "opt_acpi.h"
     95        1.1    bouyer 
     96        1.4  christos #if NIOAPIC > 0 || NACPI > 0
     97        1.1    bouyer #include <machine/i82093var.h>
     98        1.2  christos #include <machine/mpconfig.h>
     99        1.1    bouyer #include <machine/mpbiosvar.h>
    100        1.1    bouyer #include <machine/pic.h>
    101        1.1    bouyer #endif
    102        1.1    bouyer 
    103        1.1    bouyer #ifdef MPBIOS
    104        1.1    bouyer #include <machine/mpbiosvar.h>
    105        1.1    bouyer #endif
    106        1.1    bouyer 
    107        1.2  christos #if NACPI > 0
    108        1.1    bouyer #include <machine/mpacpi.h>
    109        1.1    bouyer #endif
    110        1.1    bouyer 
    111       1.11        ad #define	MPSAFE_MASK	0x80000000
    112       1.11        ad 
    113        1.1    bouyer int
    114        1.9    cegger pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    115        1.1    bouyer {
    116        1.1    bouyer 	int pin = pa->pa_intrpin;
    117        1.1    bouyer 	int line = pa->pa_intrline;
    118        1.3  christos #if NIOAPIC > 0 || NACPI > 0
    119        1.1    bouyer 	int rawpin = pa->pa_rawintrpin;
    120        1.1    bouyer 	pci_chipset_tag_t pc = pa->pa_pc;
    121        1.1    bouyer 	int bus, dev, func;
    122        1.1    bouyer #endif
    123        1.1    bouyer 
    124        1.1    bouyer 	if (pin == 0) {
    125        1.1    bouyer 		/* No IRQ used. */
    126        1.1    bouyer 		goto bad;
    127        1.1    bouyer 	}
    128        1.1    bouyer 
    129        1.2  christos 	*ihp = 0;
    130        1.2  christos 
    131        1.1    bouyer 	if (pin > PCI_INTERRUPT_PIN_MAX) {
    132  1.12.10.1       jym 		aprint_normal("pci_intr_map: bad interrupt pin %d\n", pin);
    133        1.1    bouyer 		goto bad;
    134        1.1    bouyer 	}
    135        1.1    bouyer 
    136        1.4  christos #if NIOAPIC > 0 || NACPI > 0
    137        1.1    bouyer 	pci_decompose_tag(pc, pa->pa_tag, &bus, &dev, &func);
    138        1.1    bouyer 	if (mp_busses != NULL) {
    139        1.1    bouyer 		if (intr_find_mpmapping(bus, (dev<<2)|(rawpin-1), ihp) == 0) {
    140        1.2  christos 			if ((*ihp & 0xff) == 0)
    141        1.2  christos 				*ihp |= line;
    142        1.1    bouyer 			return 0;
    143        1.1    bouyer 		}
    144        1.1    bouyer 		/*
    145        1.1    bouyer 		 * No explicit PCI mapping found. This is not fatal,
    146        1.1    bouyer 		 * we'll try the ISA (or possibly EISA) mappings next.
    147        1.1    bouyer 		 */
    148        1.1    bouyer 	}
    149        1.1    bouyer #endif
    150        1.1    bouyer 
    151        1.1    bouyer 	/*
    152        1.1    bouyer 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    153        1.1    bouyer 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    154        1.1    bouyer 	 * `no connection' either doesn't have an interrupt (in which case the
    155        1.1    bouyer 	 * pin number should be 0, and would have been noticed above), or
    156        1.1    bouyer 	 * wasn't configured by the BIOS (in which case we punt, since there's
    157        1.1    bouyer 	 * no real way we can know how the interrupt lines are mapped in the
    158        1.1    bouyer 	 * hardware).
    159        1.1    bouyer 	 *
    160        1.1    bouyer 	 * XXX
    161        1.1    bouyer 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    162        1.1    bouyer 	 * that the BIOS did its job, we also recognize that as meaning that
    163        1.1    bouyer 	 * the BIOS has not configured the device.
    164        1.1    bouyer 	 */
    165        1.1    bouyer 	if (line == 0 || line == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
    166  1.12.10.1       jym 		aprint_normal("pci_intr_map: no mapping for pin %c (line=%02x)\n",
    167        1.1    bouyer 		       '@' + pin, line);
    168        1.1    bouyer 		goto bad;
    169        1.1    bouyer 	} else {
    170        1.1    bouyer 		if (line >= NUM_LEGACY_IRQS) {
    171  1.12.10.1       jym 			aprint_normal("pci_intr_map: bad interrupt line %d\n", line);
    172        1.1    bouyer 			goto bad;
    173        1.1    bouyer 		}
    174        1.1    bouyer 		if (line == 2) {
    175  1.12.10.1       jym 			aprint_normal("pci_intr_map: changed line 2 to line 9\n");
    176        1.1    bouyer 			line = 9;
    177        1.1    bouyer 		}
    178        1.1    bouyer 	}
    179        1.4  christos #if NIOAPIC > 0 || NACPI > 0
    180        1.1    bouyer 	if (mp_busses != NULL) {
    181        1.1    bouyer 		if (intr_find_mpmapping(mp_isa_bus, line, ihp) == 0) {
    182        1.2  christos 			if ((*ihp & 0xff) == 0)
    183        1.2  christos 				*ihp |= line;
    184        1.1    bouyer 			return 0;
    185        1.1    bouyer 		}
    186        1.1    bouyer #if NEISA > 0
    187        1.1    bouyer 		if (intr_find_mpmapping(mp_eisa_bus, line, ihp) == 0) {
    188        1.2  christos 			if ((*ihp & 0xff) == 0)
    189        1.2  christos 				*ihp |= line;
    190        1.1    bouyer 			return 0;
    191        1.1    bouyer 		}
    192        1.1    bouyer #endif
    193  1.12.10.1       jym 		aprint_normal("pci_intr_map: bus %d dev %d func %d pin %d; line %d\n",
    194        1.1    bouyer 		    bus, dev, func, pin, line);
    195  1.12.10.1       jym 		aprint_normal("pci_intr_map: no MP mapping found\n");
    196        1.1    bouyer 	}
    197        1.1    bouyer #endif
    198        1.1    bouyer 
    199        1.1    bouyer 	*ihp = line;
    200        1.1    bouyer 	return 0;
    201        1.1    bouyer 
    202        1.1    bouyer bad:
    203        1.1    bouyer 	*ihp = -1;
    204        1.1    bouyer 	return 1;
    205        1.1    bouyer }
    206        1.1    bouyer 
    207        1.1    bouyer const char *
    208        1.6  christos pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
    209        1.1    bouyer {
    210       1.11        ad 	return intr_string(ih & ~MPSAFE_MASK);
    211        1.1    bouyer }
    212        1.1    bouyer 
    213        1.1    bouyer 
    214        1.1    bouyer const struct evcnt *
    215        1.6  christos pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
    216        1.1    bouyer {
    217        1.1    bouyer 
    218        1.1    bouyer 	/* XXX for now, no evcnt parent reported */
    219        1.1    bouyer 	return NULL;
    220        1.1    bouyer }
    221        1.1    bouyer 
    222       1.11        ad int
    223       1.11        ad pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih,
    224       1.11        ad 		 int attr, uint64_t data)
    225       1.11        ad {
    226       1.11        ad 
    227       1.11        ad 	switch (attr) {
    228       1.11        ad 	case PCI_INTR_MPSAFE:
    229       1.11        ad 		if (data) {
    230       1.11        ad 			 *ih |= MPSAFE_MASK;
    231       1.11        ad 		} else {
    232       1.11        ad 			 *ih &= ~MPSAFE_MASK;
    233       1.11        ad 		}
    234       1.11        ad 		/* XXX Set live if already mapped. */
    235       1.11        ad 		return 0;
    236       1.11        ad 	default:
    237       1.11        ad 		return ENODEV;
    238       1.11        ad 	}
    239       1.11        ad }
    240       1.11        ad 
    241        1.1    bouyer void *
    242        1.6  christos pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
    243        1.5  christos     int level, int (*func)(void *), void *arg)
    244        1.1    bouyer {
    245        1.1    bouyer 	int pin, irq;
    246        1.1    bouyer 	struct pic *pic;
    247       1.12  drochner #if NIOAPIC > 0
    248       1.12  drochner 	struct ioapic_softc *ioapic;
    249       1.12  drochner #endif
    250       1.11        ad 	bool mpsafe;
    251        1.1    bouyer 
    252        1.1    bouyer 	pic = &i8259_pic;
    253       1.11        ad 	pin = irq = (ih & ~MPSAFE_MASK);
    254       1.11        ad 	mpsafe = ((ih & MPSAFE_MASK) != 0);
    255        1.1    bouyer 
    256        1.1    bouyer #if NIOAPIC > 0
    257        1.1    bouyer 	if (ih & APIC_INT_VIA_APIC) {
    258       1.12  drochner 		ioapic = ioapic_find(APIC_IRQ_APIC(ih));
    259       1.12  drochner 		if (ioapic == NULL) {
    260  1.12.10.1       jym 			aprint_normal("pci_intr_establish: bad ioapic %d\n",
    261        1.1    bouyer 			    APIC_IRQ_APIC(ih));
    262        1.1    bouyer 			return NULL;
    263        1.1    bouyer 		}
    264       1.12  drochner 		pic = &ioapic->sc_pic;
    265        1.1    bouyer 		pin = APIC_IRQ_PIN(ih);
    266        1.1    bouyer 		irq = APIC_IRQ_LEGACY_IRQ(ih);
    267        1.1    bouyer 		if (irq < 0 || irq >= NUM_LEGACY_IRQS)
    268        1.1    bouyer 			irq = -1;
    269        1.1    bouyer 	}
    270        1.1    bouyer #endif
    271        1.1    bouyer 
    272       1.10        ad 	return intr_establish(irq, pic, pin, IST_LEVEL, level, func, arg,
    273       1.11        ad 	    mpsafe);
    274        1.1    bouyer }
    275        1.1    bouyer 
    276        1.1    bouyer void
    277        1.6  christos pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
    278        1.1    bouyer {
    279        1.1    bouyer 
    280        1.1    bouyer 	intr_disestablish(cookie);
    281        1.1    bouyer }
    282