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pci_intr_machdep.c revision 1.1
      1 /*	$NetBSD: pci_intr_machdep.c,v 1.1 2006/02/03 19:58:21 bouyer Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
     42  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. Redistributions in binary form must reproduce the above copyright
     50  *    notice, this list of conditions and the following disclaimer in the
     51  *    documentation and/or other materials provided with the distribution.
     52  * 3. All advertising materials mentioning features or use of this software
     53  *    must display the following acknowledgement:
     54  *	This product includes software developed by Charles M. Hannum.
     55  * 4. The name of the author may not be used to endorse or promote products
     56  *    derived from this software without specific prior written permission.
     57  *
     58  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     59  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     60  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     61  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     62  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     63  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     64  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     65  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     66  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     67  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     68  */
     69 
     70 /*
     71  * Machine-specific functions for PCI autoconfiguration.
     72  *
     73  * On PCs, there are two methods of generating PCI configuration cycles.
     74  * We try to detect the appropriate mechanism for this machine and set
     75  * up a few function pointers to access the correct method directly.
     76  *
     77  * The configuration method can be hard-coded in the config file by
     78  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     79  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     80  */
     81 
     82 #include <sys/cdefs.h>
     83 __KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.1 2006/02/03 19:58:21 bouyer Exp $");
     84 
     85 #include <sys/types.h>
     86 #include <sys/param.h>
     87 #include <sys/time.h>
     88 #include <sys/systm.h>
     89 #include <sys/errno.h>
     90 #include <sys/device.h>
     91 #include <sys/lock.h>
     92 
     93 #include <uvm/uvm_extern.h>
     94 
     95 #include <machine/intr.h>
     96 
     97 #include <dev/pci/pcivar.h>
     98 
     99 #include "ioapic.h"
    100 #include "eisa.h"
    101 #include "opt_mpbios.h"
    102 #include "opt_mpacpi.h"
    103 
    104 #if NIOAPIC > 0
    105 #include <machine/i82093var.h>
    106 #include <machine/mpbiosvar.h>
    107 #include <machine/pic.h>
    108 #endif
    109 
    110 #ifdef MPBIOS
    111 #include <machine/mpbiosvar.h>
    112 #endif
    113 
    114 #ifdef MPACPI
    115 #include <machine/mpacpi.h>
    116 #endif
    117 
    118 int
    119 pci_intr_map(pa, ihp)
    120 	struct pci_attach_args *pa;
    121 	pci_intr_handle_t *ihp;
    122 {
    123 	int pin = pa->pa_intrpin;
    124 	int line = pa->pa_intrline;
    125 #if NIOAPIC > 0
    126 	int rawpin = pa->pa_rawintrpin;
    127 	pci_chipset_tag_t pc = pa->pa_pc;
    128 	int bus, dev, func;
    129 #endif
    130 
    131 	if (pin == 0) {
    132 		/* No IRQ used. */
    133 		goto bad;
    134 	}
    135 
    136 	if (pin > PCI_INTERRUPT_PIN_MAX) {
    137 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    138 		goto bad;
    139 	}
    140 
    141 #if NIOAPIC > 0
    142 	pci_decompose_tag(pc, pa->pa_tag, &bus, &dev, &func);
    143 	if (mp_busses != NULL) {
    144 		if (intr_find_mpmapping(bus, (dev<<2)|(rawpin-1), ihp) == 0) {
    145 			*ihp |= line;
    146 			return 0;
    147 		}
    148 		/*
    149 		 * No explicit PCI mapping found. This is not fatal,
    150 		 * we'll try the ISA (or possibly EISA) mappings next.
    151 		 */
    152 	}
    153 #endif
    154 
    155 	/*
    156 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    157 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    158 	 * `no connection' either doesn't have an interrupt (in which case the
    159 	 * pin number should be 0, and would have been noticed above), or
    160 	 * wasn't configured by the BIOS (in which case we punt, since there's
    161 	 * no real way we can know how the interrupt lines are mapped in the
    162 	 * hardware).
    163 	 *
    164 	 * XXX
    165 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    166 	 * that the BIOS did its job, we also recognize that as meaning that
    167 	 * the BIOS has not configured the device.
    168 	 */
    169 	if (line == 0 || line == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
    170 		printf("pci_intr_map: no mapping for pin %c (line=%02x)\n",
    171 		       '@' + pin, line);
    172 		goto bad;
    173 	} else {
    174 		if (line >= NUM_LEGACY_IRQS) {
    175 			printf("pci_intr_map: bad interrupt line %d\n", line);
    176 			goto bad;
    177 		}
    178 		if (line == 2) {
    179 			printf("pci_intr_map: changed line 2 to line 9\n");
    180 			line = 9;
    181 		}
    182 	}
    183 #if NIOAPIC > 0
    184 	if (mp_busses != NULL) {
    185 		if (intr_find_mpmapping(mp_isa_bus, line, ihp) == 0) {
    186 			*ihp |= line;
    187 			return 0;
    188 		}
    189 #if NEISA > 0
    190 		if (intr_find_mpmapping(mp_eisa_bus, line, ihp) == 0) {
    191 			*ihp |= line;
    192 			return 0;
    193 		}
    194 #endif
    195 		printf("pci_intr_map: bus %d dev %d func %d pin %d; line %d\n",
    196 		    bus, dev, func, pin, line);
    197 		printf("pci_intr_map: no MP mapping found\n");
    198 	}
    199 #endif
    200 
    201 	*ihp = line;
    202 	return 0;
    203 
    204 bad:
    205 	*ihp = -1;
    206 	return 1;
    207 }
    208 
    209 const char *
    210 pci_intr_string(pc, ih)
    211 	pci_chipset_tag_t pc;
    212 	pci_intr_handle_t ih;
    213 {
    214 	return intr_string(ih);
    215 }
    216 
    217 
    218 const struct evcnt *
    219 pci_intr_evcnt(pc, ih)
    220 	pci_chipset_tag_t pc;
    221 	pci_intr_handle_t ih;
    222 {
    223 
    224 	/* XXX for now, no evcnt parent reported */
    225 	return NULL;
    226 }
    227 
    228 void *
    229 pci_intr_establish(pc, ih, level, func, arg)
    230 	pci_chipset_tag_t pc;
    231 	pci_intr_handle_t ih;
    232 	int level, (*func) __P((void *));
    233 	void *arg;
    234 {
    235 	int pin, irq;
    236 	struct pic *pic;
    237 
    238 	pic = &i8259_pic;
    239 	pin = irq = ih;
    240 
    241 #if NIOAPIC > 0
    242 	if (ih & APIC_INT_VIA_APIC) {
    243 		pic = (struct pic *)ioapic_find(APIC_IRQ_APIC(ih));
    244 		if (pic == NULL) {
    245 			printf("pci_intr_establish: bad ioapic %d\n",
    246 			    APIC_IRQ_APIC(ih));
    247 			return NULL;
    248 		}
    249 		pin = APIC_IRQ_PIN(ih);
    250 		irq = APIC_IRQ_LEGACY_IRQ(ih);
    251 		if (irq < 0 || irq >= NUM_LEGACY_IRQS)
    252 			irq = -1;
    253 	}
    254 #endif
    255 
    256 	return intr_establish(irq, pic, pin, IST_LEVEL, level, func, arg);
    257 }
    258 
    259 void
    260 pci_intr_disestablish(pc, cookie)
    261 	pci_chipset_tag_t pc;
    262 	void *cookie;
    263 {
    264 
    265 	intr_disestablish(cookie);
    266 }
    267