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pci_intr_machdep.c revision 1.11
      1 /*	$NetBSD: pci_intr_machdep.c,v 1.11 2008/05/30 19:26:35 ad Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
     35  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
     36  *
     37  * Redistribution and use in source and binary forms, with or without
     38  * modification, are permitted provided that the following conditions
     39  * are met:
     40  * 1. Redistributions of source code must retain the above copyright
     41  *    notice, this list of conditions and the following disclaimer.
     42  * 2. Redistributions in binary form must reproduce the above copyright
     43  *    notice, this list of conditions and the following disclaimer in the
     44  *    documentation and/or other materials provided with the distribution.
     45  * 3. All advertising materials mentioning features or use of this software
     46  *    must display the following acknowledgement:
     47  *	This product includes software developed by Charles M. Hannum.
     48  * 4. The name of the author may not be used to endorse or promote products
     49  *    derived from this software without specific prior written permission.
     50  *
     51  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     52  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     53  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     54  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     55  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     56  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     60  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     61  */
     62 
     63 /*
     64  * Machine-specific functions for PCI autoconfiguration.
     65  *
     66  * On PCs, there are two methods of generating PCI configuration cycles.
     67  * We try to detect the appropriate mechanism for this machine and set
     68  * up a few function pointers to access the correct method directly.
     69  *
     70  * The configuration method can be hard-coded in the config file by
     71  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     72  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     73  */
     74 
     75 #include <sys/cdefs.h>
     76 __KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.11 2008/05/30 19:26:35 ad Exp $");
     77 
     78 #include <sys/types.h>
     79 #include <sys/param.h>
     80 #include <sys/time.h>
     81 #include <sys/systm.h>
     82 #include <sys/errno.h>
     83 #include <sys/device.h>
     84 #include <sys/intr.h>
     85 
     86 #include <uvm/uvm_extern.h>
     87 
     88 #include <dev/pci/pcivar.h>
     89 
     90 #include "ioapic.h"
     91 #include "eisa.h"
     92 #include "acpi.h"
     93 #include "opt_mpbios.h"
     94 #include "opt_acpi.h"
     95 
     96 #if NIOAPIC > 0 || NACPI > 0
     97 #include <machine/i82093var.h>
     98 #include <machine/mpconfig.h>
     99 #include <machine/mpbiosvar.h>
    100 #include <machine/pic.h>
    101 #endif
    102 
    103 #ifdef MPBIOS
    104 #include <machine/mpbiosvar.h>
    105 #endif
    106 
    107 #if NACPI > 0
    108 #include <machine/mpacpi.h>
    109 #endif
    110 
    111 #define	MPSAFE_MASK	0x80000000
    112 
    113 int
    114 pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    115 {
    116 	int pin = pa->pa_intrpin;
    117 	int line = pa->pa_intrline;
    118 #if NIOAPIC > 0 || NACPI > 0
    119 	int rawpin = pa->pa_rawintrpin;
    120 	pci_chipset_tag_t pc = pa->pa_pc;
    121 	int bus, dev, func;
    122 #endif
    123 
    124 	if (pin == 0) {
    125 		/* No IRQ used. */
    126 		goto bad;
    127 	}
    128 
    129 	*ihp = 0;
    130 
    131 	if (pin > PCI_INTERRUPT_PIN_MAX) {
    132 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    133 		goto bad;
    134 	}
    135 
    136 #if NIOAPIC > 0 || NACPI > 0
    137 	pci_decompose_tag(pc, pa->pa_tag, &bus, &dev, &func);
    138 	if (mp_busses != NULL) {
    139 		if (intr_find_mpmapping(bus, (dev<<2)|(rawpin-1), ihp) == 0) {
    140 			if ((*ihp & 0xff) == 0)
    141 				*ihp |= line;
    142 			return 0;
    143 		}
    144 		/*
    145 		 * No explicit PCI mapping found. This is not fatal,
    146 		 * we'll try the ISA (or possibly EISA) mappings next.
    147 		 */
    148 	}
    149 #endif
    150 
    151 	/*
    152 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    153 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    154 	 * `no connection' either doesn't have an interrupt (in which case the
    155 	 * pin number should be 0, and would have been noticed above), or
    156 	 * wasn't configured by the BIOS (in which case we punt, since there's
    157 	 * no real way we can know how the interrupt lines are mapped in the
    158 	 * hardware).
    159 	 *
    160 	 * XXX
    161 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    162 	 * that the BIOS did its job, we also recognize that as meaning that
    163 	 * the BIOS has not configured the device.
    164 	 */
    165 	if (line == 0 || line == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
    166 		printf("pci_intr_map: no mapping for pin %c (line=%02x)\n",
    167 		       '@' + pin, line);
    168 		goto bad;
    169 	} else {
    170 		if (line >= NUM_LEGACY_IRQS) {
    171 			printf("pci_intr_map: bad interrupt line %d\n", line);
    172 			goto bad;
    173 		}
    174 		if (line == 2) {
    175 			printf("pci_intr_map: changed line 2 to line 9\n");
    176 			line = 9;
    177 		}
    178 	}
    179 #if NIOAPIC > 0 || NACPI > 0
    180 	if (mp_busses != NULL) {
    181 		if (intr_find_mpmapping(mp_isa_bus, line, ihp) == 0) {
    182 			if ((*ihp & 0xff) == 0)
    183 				*ihp |= line;
    184 			return 0;
    185 		}
    186 #if NEISA > 0
    187 		if (intr_find_mpmapping(mp_eisa_bus, line, ihp) == 0) {
    188 			if ((*ihp & 0xff) == 0)
    189 				*ihp |= line;
    190 			return 0;
    191 		}
    192 #endif
    193 		printf("pci_intr_map: bus %d dev %d func %d pin %d; line %d\n",
    194 		    bus, dev, func, pin, line);
    195 		printf("pci_intr_map: no MP mapping found\n");
    196 	}
    197 #endif
    198 
    199 	*ihp = line;
    200 	return 0;
    201 
    202 bad:
    203 	*ihp = -1;
    204 	return 1;
    205 }
    206 
    207 const char *
    208 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
    209 {
    210 	return intr_string(ih & ~MPSAFE_MASK);
    211 }
    212 
    213 
    214 const struct evcnt *
    215 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
    216 {
    217 
    218 	/* XXX for now, no evcnt parent reported */
    219 	return NULL;
    220 }
    221 
    222 int
    223 pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih,
    224 		 int attr, uint64_t data)
    225 {
    226 
    227 	switch (attr) {
    228 	case PCI_INTR_MPSAFE:
    229 		if (data) {
    230 			 *ih |= MPSAFE_MASK;
    231 		} else {
    232 			 *ih &= ~MPSAFE_MASK;
    233 		}
    234 		/* XXX Set live if already mapped. */
    235 		return 0;
    236 	default:
    237 		return ENODEV;
    238 	}
    239 }
    240 
    241 void *
    242 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
    243     int level, int (*func)(void *), void *arg)
    244 {
    245 	int pin, irq;
    246 	struct pic *pic;
    247 	bool mpsafe;
    248 
    249 	pic = &i8259_pic;
    250 	pin = irq = (ih & ~MPSAFE_MASK);
    251 	mpsafe = ((ih & MPSAFE_MASK) != 0);
    252 
    253 #if NIOAPIC > 0
    254 	if (ih & APIC_INT_VIA_APIC) {
    255 		pic = (struct pic *)ioapic_find(APIC_IRQ_APIC(ih));
    256 		if (pic == NULL) {
    257 			printf("pci_intr_establish: bad ioapic %d\n",
    258 			    APIC_IRQ_APIC(ih));
    259 			return NULL;
    260 		}
    261 		pin = APIC_IRQ_PIN(ih);
    262 		irq = APIC_IRQ_LEGACY_IRQ(ih);
    263 		if (irq < 0 || irq >= NUM_LEGACY_IRQS)
    264 			irq = -1;
    265 	}
    266 #endif
    267 
    268 	return intr_establish(irq, pic, pin, IST_LEVEL, level, func, arg,
    269 	    mpsafe);
    270 }
    271 
    272 void
    273 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
    274 {
    275 
    276 	intr_disestablish(cookie);
    277 }
    278