pci_machdep.c revision 1.16
1 /* $NetBSD: pci_machdep.c,v 1.16 2006/07/04 00:30:23 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 42 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Charles M. Hannum. 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 60 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 61 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 62 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 63 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 64 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 65 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 66 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 67 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 /* 71 * Machine-specific functions for PCI autoconfiguration. 72 * 73 * On PCs, there are two methods of generating PCI configuration cycles. 74 * We try to detect the appropriate mechanism for this machine and set 75 * up a few function pointers to access the correct method directly. 76 * 77 * The configuration method can be hard-coded in the config file by 78 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode 79 * as defined section 3.6.4.1, `Generating Configuration Cycles'. 80 */ 81 82 #include <sys/cdefs.h> 83 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.16 2006/07/04 00:30:23 christos Exp $"); 84 85 #include <sys/types.h> 86 #include <sys/param.h> 87 #include <sys/time.h> 88 #include <sys/systm.h> 89 #include <sys/errno.h> 90 #include <sys/device.h> 91 #include <sys/lock.h> 92 93 #include <uvm/uvm_extern.h> 94 95 #include <machine/bus.h> 96 #include <machine/bus_private.h> 97 98 #include <machine/pio.h> 99 100 #include <dev/isa/isareg.h> 101 #include <dev/isa/isavar.h> 102 #include <dev/pci/pcivar.h> 103 #include <dev/pci/pcireg.h> 104 #include <dev/pci/pcidevs.h> 105 106 #include "acpi.h" 107 #include "opt_mpbios.h" 108 #include "opt_acpi.h" 109 110 #ifdef MPBIOS 111 #include <machine/mpbiosvar.h> 112 #endif 113 114 #if NACPI > 0 115 #include <machine/mpacpi.h> 116 #endif 117 118 #include <machine/mpconfig.h> 119 120 #include "opt_pci_conf_mode.h" 121 122 int pci_mode = -1; 123 124 static void pci_bridge_hook(pci_chipset_tag_t, pcitag_t, void *); 125 struct pci_bridge_hook_arg { 126 void (*func)(pci_chipset_tag_t, pcitag_t, void *); 127 void *arg; 128 }; 129 130 131 struct simplelock pci_conf_slock = SIMPLELOCK_INITIALIZER; 132 133 #define PCI_CONF_LOCK(s) \ 134 do { \ 135 (s) = splhigh(); \ 136 simple_lock(&pci_conf_slock); \ 137 } while (0) 138 139 #define PCI_CONF_UNLOCK(s) \ 140 do { \ 141 simple_unlock(&pci_conf_slock); \ 142 splx((s)); \ 143 } while (0) 144 145 #define PCI_MODE1_ENABLE 0x80000000UL 146 #define PCI_MODE1_ADDRESS_REG 0x0cf8 147 #define PCI_MODE1_DATA_REG 0x0cfc 148 149 #define PCI_MODE2_ENABLE_REG 0x0cf8 150 #define PCI_MODE2_FORWARD_REG 0x0cfa 151 152 #define _m1tag(b, d, f) \ 153 (PCI_MODE1_ENABLE | ((b) << 16) | ((d) << 11) | ((f) << 8)) 154 #define _qe(bus, dev, fcn, vend, prod) \ 155 {_m1tag(bus, dev, fcn), PCI_ID_CODE(vend, prod)} 156 struct { 157 u_int32_t tag; 158 pcireg_t id; 159 } pcim1_quirk_tbl[] = { 160 _qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX1), 161 /* XXX Triflex2 not tested */ 162 _qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX2), 163 _qe(0, 0, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX4), 164 /* Triton needed for Connectix Virtual PC */ 165 _qe(0, 0, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82437FX), 166 /* Connectix Virtual PC 5 has a 440BX */ 167 _qe(0, 0, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443BX_NOAGP), 168 /* Parallels Desktop for Mac */ 169 _qe(0, 2, 0, PCI_VENDOR_PARALLELS, PCI_PRODUCT_PARALLELS_VIDEO), 170 _qe(0, 3, 0, PCI_VENDOR_PARALLELS, PCI_PRODUCT_PARALLELS_TOOLS), 171 /* SIS 741 */ 172 _qe(0, 0, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_741), 173 {0, 0xffffffff} /* patchable */ 174 }; 175 #undef _m1tag 176 #undef _id 177 #undef _qe 178 179 /* 180 * PCI doesn't have any special needs; just use the generic versions 181 * of these functions. 182 */ 183 struct x86_bus_dma_tag pci_bus_dma_tag = { 184 #if defined(_LP64) || defined(PAE) 185 PCI32_DMA_BOUNCE_THRESHOLD, /* bounce_thresh */ 186 ISA_DMA_BOUNCE_THRESHOLD, /* bounce_alloclo */ 187 PCI32_DMA_BOUNCE_THRESHOLD, /* bounce_allochi */ 188 #else 189 0, 190 0, 191 0, 192 #endif 193 NULL, /* _may_bounce */ 194 _bus_dmamap_create, 195 _bus_dmamap_destroy, 196 _bus_dmamap_load, 197 _bus_dmamap_load_mbuf, 198 _bus_dmamap_load_uio, 199 _bus_dmamap_load_raw, 200 _bus_dmamap_unload, 201 #if defined(_LP64) || defined(PAE) 202 _bus_dmamap_sync, 203 #else 204 NULL, 205 #endif 206 _bus_dmamem_alloc, 207 _bus_dmamem_free, 208 _bus_dmamem_map, 209 _bus_dmamem_unmap, 210 _bus_dmamem_mmap, 211 }; 212 213 #ifdef _LP64 214 struct x86_bus_dma_tag pci_bus_dma64_tag = { 215 0, 216 0, 217 0, 218 NULL, /* _may_bounce */ 219 _bus_dmamap_create, 220 _bus_dmamap_destroy, 221 _bus_dmamap_load, 222 _bus_dmamap_load_mbuf, 223 _bus_dmamap_load_uio, 224 _bus_dmamap_load_raw, 225 _bus_dmamap_unload, 226 NULL, 227 _bus_dmamem_alloc, 228 _bus_dmamem_free, 229 _bus_dmamem_map, 230 _bus_dmamem_unmap, 231 _bus_dmamem_mmap, 232 }; 233 #endif 234 235 void 236 pci_attach_hook(parent, self, pba) 237 struct device *parent, *self; 238 struct pcibus_attach_args *pba; 239 { 240 241 if (pba->pba_bus == 0) 242 printf(": configuration mode %d", pci_mode); 243 #ifdef MPBIOS 244 mpbios_pci_attach_hook(parent, self, pba); 245 #endif 246 #if NACPI > 0 247 mpacpi_pci_attach_hook(parent, self, pba); 248 #endif 249 } 250 251 int 252 pci_bus_maxdevs(pc, busno) 253 pci_chipset_tag_t pc; 254 int busno; 255 { 256 257 /* 258 * Bus number is irrelevant. If Configuration Mechanism 2 is in 259 * use, can only have devices 0-15 on any bus. If Configuration 260 * Mechanism 1 is in use, can have devices 0-32 (i.e. the `normal' 261 * range). 262 */ 263 if (pci_mode == 2) 264 return (16); 265 else 266 return (32); 267 } 268 269 pcitag_t 270 pci_make_tag(pc, bus, device, function) 271 pci_chipset_tag_t pc; 272 int bus, device, function; 273 { 274 pcitag_t tag; 275 276 #ifndef PCI_CONF_MODE 277 switch (pci_mode) { 278 case 1: 279 goto mode1; 280 case 2: 281 goto mode2; 282 default: 283 panic("pci_make_tag: mode not configured"); 284 } 285 #endif 286 287 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) 288 #ifndef PCI_CONF_MODE 289 mode1: 290 #endif 291 if (bus >= 256 || device >= 32 || function >= 8) 292 panic("pci_make_tag: bad request"); 293 294 tag.mode1 = PCI_MODE1_ENABLE | 295 (bus << 16) | (device << 11) | (function << 8); 296 return tag; 297 #endif 298 299 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) 300 #ifndef PCI_CONF_MODE 301 mode2: 302 #endif 303 if (bus >= 256 || device >= 16 || function >= 8) 304 panic("pci_make_tag: bad request"); 305 306 tag.mode2.port = 0xc000 | (device << 8); 307 tag.mode2.enable = 0xf0 | (function << 1); 308 tag.mode2.forward = bus; 309 return tag; 310 #endif 311 } 312 313 void 314 pci_decompose_tag(pc, tag, bp, dp, fp) 315 pci_chipset_tag_t pc; 316 pcitag_t tag; 317 int *bp, *dp, *fp; 318 { 319 320 #ifndef PCI_CONF_MODE 321 switch (pci_mode) { 322 case 1: 323 goto mode1; 324 case 2: 325 goto mode2; 326 default: 327 panic("pci_decompose_tag: mode not configured"); 328 } 329 #endif 330 331 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) 332 #ifndef PCI_CONF_MODE 333 mode1: 334 #endif 335 if (bp != NULL) 336 *bp = (tag.mode1 >> 16) & 0xff; 337 if (dp != NULL) 338 *dp = (tag.mode1 >> 11) & 0x1f; 339 if (fp != NULL) 340 *fp = (tag.mode1 >> 8) & 0x7; 341 return; 342 #endif 343 344 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) 345 #ifndef PCI_CONF_MODE 346 mode2: 347 #endif 348 if (bp != NULL) 349 *bp = tag.mode2.forward & 0xff; 350 if (dp != NULL) 351 *dp = (tag.mode2.port >> 8) & 0xf; 352 if (fp != NULL) 353 *fp = (tag.mode2.enable >> 1) & 0x7; 354 #endif 355 } 356 357 pcireg_t 358 pci_conf_read(pc, tag, reg) 359 pci_chipset_tag_t pc; 360 pcitag_t tag; 361 int reg; 362 { 363 pcireg_t data; 364 int s; 365 366 #ifndef PCI_CONF_MODE 367 switch (pci_mode) { 368 case 1: 369 goto mode1; 370 case 2: 371 goto mode2; 372 default: 373 panic("pci_conf_read: mode not configured"); 374 } 375 #endif 376 377 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) 378 #ifndef PCI_CONF_MODE 379 mode1: 380 #endif 381 PCI_CONF_LOCK(s); 382 outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg); 383 data = inl(PCI_MODE1_DATA_REG); 384 outl(PCI_MODE1_ADDRESS_REG, 0); 385 PCI_CONF_UNLOCK(s); 386 return data; 387 #endif 388 389 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) 390 #ifndef PCI_CONF_MODE 391 mode2: 392 #endif 393 PCI_CONF_LOCK(s); 394 outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable); 395 outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward); 396 data = inl(tag.mode2.port | reg); 397 outb(PCI_MODE2_ENABLE_REG, 0); 398 PCI_CONF_UNLOCK(s); 399 return data; 400 #endif 401 } 402 403 void 404 pci_conf_write(pc, tag, reg, data) 405 pci_chipset_tag_t pc; 406 pcitag_t tag; 407 int reg; 408 pcireg_t data; 409 { 410 int s; 411 412 #ifndef PCI_CONF_MODE 413 switch (pci_mode) { 414 case 1: 415 goto mode1; 416 case 2: 417 goto mode2; 418 default: 419 panic("pci_conf_write: mode not configured"); 420 } 421 #endif 422 423 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 1) 424 #ifndef PCI_CONF_MODE 425 mode1: 426 #endif 427 PCI_CONF_LOCK(s); 428 outl(PCI_MODE1_ADDRESS_REG, tag.mode1 | reg); 429 outl(PCI_MODE1_DATA_REG, data); 430 outl(PCI_MODE1_ADDRESS_REG, 0); 431 PCI_CONF_UNLOCK(s); 432 return; 433 #endif 434 435 #if !defined(PCI_CONF_MODE) || (PCI_CONF_MODE == 2) 436 #ifndef PCI_CONF_MODE 437 mode2: 438 #endif 439 PCI_CONF_LOCK(s); 440 outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable); 441 outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward); 442 outl(tag.mode2.port | reg, data); 443 outb(PCI_MODE2_ENABLE_REG, 0); 444 PCI_CONF_UNLOCK(s); 445 #endif 446 } 447 448 int 449 pci_mode_detect() 450 { 451 452 #ifdef PCI_CONF_MODE 453 #if (PCI_CONF_MODE == 1) || (PCI_CONF_MODE == 2) 454 return (pci_mode = PCI_CONF_MODE); 455 #else 456 #error Invalid PCI configuration mode. 457 #endif 458 #else 459 u_int32_t sav, val; 460 int i; 461 pcireg_t idreg; 462 463 if (pci_mode != -1) 464 return pci_mode; 465 466 /* 467 * We try to divine which configuration mode the host bridge wants. 468 */ 469 470 sav = inl(PCI_MODE1_ADDRESS_REG); 471 472 pci_mode = 1; /* assume this for now */ 473 /* 474 * catch some known buggy implementations of mode 1 475 */ 476 for (i = 0; i < sizeof(pcim1_quirk_tbl) / sizeof(pcim1_quirk_tbl[0]); 477 i++) { 478 pcitag_t t; 479 480 if (!pcim1_quirk_tbl[i].tag) 481 break; 482 t.mode1 = pcim1_quirk_tbl[i].tag; 483 idreg = pci_conf_read(0, t, PCI_ID_REG); /* needs "pci_mode" */ 484 if (idreg == pcim1_quirk_tbl[i].id) { 485 #ifdef DEBUG 486 printf("known mode 1 PCI chipset (%08x)\n", 487 idreg); 488 #endif 489 return (pci_mode); 490 } 491 } 492 493 /* 494 * Strong check for standard compliant mode 1: 495 * 1. bit 31 ("enable") can be set 496 * 2. byte/word access does not affect register 497 */ 498 outl(PCI_MODE1_ADDRESS_REG, PCI_MODE1_ENABLE); 499 outb(PCI_MODE1_ADDRESS_REG + 3, 0); 500 outw(PCI_MODE1_ADDRESS_REG + 2, 0); 501 val = inl(PCI_MODE1_ADDRESS_REG); 502 if ((val & 0x80fffffc) != PCI_MODE1_ENABLE) { 503 #ifdef DEBUG 504 printf("pci_mode_detect: mode 1 enable failed (%x)\n", 505 val); 506 #endif 507 goto not1; 508 } 509 outl(PCI_MODE1_ADDRESS_REG, 0); 510 val = inl(PCI_MODE1_ADDRESS_REG); 511 if ((val & 0x80fffffc) != 0) 512 goto not1; 513 return (pci_mode); 514 not1: 515 outl(PCI_MODE1_ADDRESS_REG, sav); 516 517 /* 518 * This mode 2 check is quite weak (and known to give false 519 * positives on some Compaq machines). 520 * However, this doesn't matter, because this is the 521 * last test, and simply no PCI devices will be found if 522 * this happens. 523 */ 524 outb(PCI_MODE2_ENABLE_REG, 0); 525 outb(PCI_MODE2_FORWARD_REG, 0); 526 if (inb(PCI_MODE2_ENABLE_REG) != 0 || 527 inb(PCI_MODE2_FORWARD_REG) != 0) 528 goto not2; 529 return (pci_mode = 2); 530 not2: 531 532 return (pci_mode = 0); 533 #endif 534 } 535 536 /* 537 * Determine which flags should be passed to the primary PCI bus's 538 * autoconfiguration node. We use this to detect broken chipsets 539 * which cannot safely use memory-mapped device access. 540 */ 541 int 542 pci_bus_flags() 543 { 544 int rval = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 545 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 546 int device, maxndevs; 547 pcitag_t tag; 548 pcireg_t id; 549 550 maxndevs = pci_bus_maxdevs(NULL, 0); 551 552 for (device = 0; device < maxndevs; device++) { 553 tag = pci_make_tag(NULL, 0, device, 0); 554 id = pci_conf_read(NULL, tag, PCI_ID_REG); 555 556 /* Invalid vendor ID value? */ 557 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 558 continue; 559 /* XXX Not invalid, but we've done this ~forever. */ 560 if (PCI_VENDOR(id) == 0) 561 continue; 562 563 switch (PCI_VENDOR(id)) { 564 case PCI_VENDOR_SIS: 565 switch (PCI_PRODUCT(id)) { 566 case PCI_PRODUCT_SIS_85C496: 567 goto disable_mem; 568 } 569 break; 570 } 571 } 572 573 return (rval); 574 575 disable_mem: 576 printf("Warning: broken PCI-Host bridge detected; " 577 "disabling memory-mapped access\n"); 578 rval &= ~(PCI_FLAGS_MEM_ENABLED|PCI_FLAGS_MRL_OKAY|PCI_FLAGS_MRM_OKAY| 579 PCI_FLAGS_MWI_OKAY); 580 return (rval); 581 } 582 583 void 584 pci_device_foreach(pci_chipset_tag_t pc, int maxbus, 585 void (*func)(pci_chipset_tag_t, pcitag_t, void *), void *context) 586 { 587 pci_device_foreach_min(pc, 0, maxbus, func, context); 588 } 589 590 void 591 pci_device_foreach_min(pci_chipset_tag_t pc, int minbus, int maxbus, 592 void (*func)(pci_chipset_tag_t, pcitag_t, void *), void *context) 593 { 594 const struct pci_quirkdata *qd; 595 int bus, device, function, maxdevs, nfuncs; 596 pcireg_t id, bhlcr; 597 pcitag_t tag; 598 599 for (bus = minbus; bus <= maxbus; bus++) { 600 maxdevs = pci_bus_maxdevs(pc, bus); 601 for (device = 0; device < maxdevs; device++) { 602 tag = pci_make_tag(pc, bus, device, 0); 603 id = pci_conf_read(pc, tag, PCI_ID_REG); 604 605 /* Invalid vendor ID value? */ 606 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 607 continue; 608 /* XXX Not invalid, but we've done this ~forever. */ 609 if (PCI_VENDOR(id) == 0) 610 continue; 611 612 qd = pci_lookup_quirkdata(PCI_VENDOR(id), 613 PCI_PRODUCT(id)); 614 615 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 616 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 617 (qd != NULL && 618 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 619 nfuncs = 8; 620 else 621 nfuncs = 1; 622 623 for (function = 0; function < nfuncs; function++) { 624 tag = pci_make_tag(pc, bus, device, function); 625 id = pci_conf_read(pc, tag, PCI_ID_REG); 626 627 /* Invalid vendor ID value? */ 628 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 629 continue; 630 /* 631 * XXX Not invalid, but we've done this 632 * ~forever. 633 */ 634 if (PCI_VENDOR(id) == 0) 635 continue; 636 (*func)(pc, tag, context); 637 } 638 } 639 } 640 } 641 642 void 643 pci_bridge_foreach(pci_chipset_tag_t pc, int minbus, int maxbus, 644 void (*func)(pci_chipset_tag_t, pcitag_t, void *), void *ctx) 645 { 646 struct pci_bridge_hook_arg bridge_hook; 647 648 bridge_hook.func = func; 649 bridge_hook.arg = ctx; 650 651 pci_device_foreach_min(pc, minbus, maxbus, pci_bridge_hook, 652 &bridge_hook); 653 } 654 655 static void 656 pci_bridge_hook(pci_chipset_tag_t pc, pcitag_t tag, void *ctx) 657 { 658 struct pci_bridge_hook_arg *bridge_hook = (void *)ctx; 659 pcireg_t reg; 660 661 reg = pci_conf_read(pc, tag, PCI_CLASS_REG); 662 if (PCI_CLASS(reg) == PCI_CLASS_BRIDGE && 663 (PCI_SUBCLASS(reg) == PCI_SUBCLASS_BRIDGE_PCI || 664 PCI_SUBCLASS(reg) == PCI_SUBCLASS_BRIDGE_CARDBUS)) { 665 (*bridge_hook->func)(pc, tag, bridge_hook->arg); 666 } 667 } 668
Indexes created Fri Sep 26 08:10:20 GMT 2025