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tco.c revision 1.10
      1  1.10  riastrad /*	$NetBSD: tco.c,v 1.10 2023/04/12 06:39:15 riastradh Exp $	*/
      2   1.1  pgoyette 
      3   1.1  pgoyette /*-
      4   1.1  pgoyette  * Copyright (c) 2015 The NetBSD Foundation, Inc.
      5   1.1  pgoyette  * All rights reserved.
      6   1.1  pgoyette  *
      7   1.1  pgoyette  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1  pgoyette  * by Minoura Makoto and Matthew R. Green.
      9   1.1  pgoyette  *
     10   1.1  pgoyette  * Redistribution and use in source and binary forms, with or without
     11   1.1  pgoyette  * modification, are permitted provided that the following conditions
     12   1.1  pgoyette  * are met:
     13   1.1  pgoyette  * 1. Redistributions of source code must retain the above copyright
     14   1.1  pgoyette  *    notice, this list of conditions and the following disclaimer.
     15   1.1  pgoyette  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1  pgoyette  *    notice, this list of conditions and the following disclaimer in the
     17   1.1  pgoyette  *    documentation and/or other materials provided with the distribution.
     18   1.1  pgoyette  *
     19   1.1  pgoyette  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1  pgoyette  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1  pgoyette  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1  pgoyette  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1  pgoyette  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1  pgoyette  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1  pgoyette  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1  pgoyette  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1  pgoyette  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1  pgoyette  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1  pgoyette  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1  pgoyette  */
     31   1.1  pgoyette 
     32   1.1  pgoyette /*
     33   1.1  pgoyette  * Intel I/O Controller Hub (ICHn) watchdog timer
     34   1.1  pgoyette  */
     35   1.1  pgoyette 
     36   1.1  pgoyette #include <sys/cdefs.h>
     37  1.10  riastrad __KERNEL_RCSID(0, "$NetBSD: tco.c,v 1.10 2023/04/12 06:39:15 riastradh Exp $");
     38   1.1  pgoyette 
     39   1.1  pgoyette #include <sys/types.h>
     40   1.1  pgoyette #include <sys/param.h>
     41   1.1  pgoyette #include <sys/systm.h>
     42   1.1  pgoyette #include <sys/device.h>
     43   1.1  pgoyette #include <sys/timetc.h>
     44   1.1  pgoyette #include <sys/module.h>
     45   1.1  pgoyette 
     46   1.1  pgoyette #include <dev/pci/pcivar.h>
     47   1.1  pgoyette #include <dev/pci/pcireg.h>
     48   1.1  pgoyette #include <dev/ic/i82801lpcreg.h>
     49   1.1  pgoyette 
     50   1.1  pgoyette #include <dev/sysmon/sysmonvar.h>
     51   1.1  pgoyette 
     52   1.1  pgoyette #include <arch/x86/pci/tco.h>
     53   1.1  pgoyette 
     54   1.1  pgoyette #include "pcibvar.h"
     55   1.1  pgoyette 
     56   1.3  riastrad struct tco_softc {
     57   1.1  pgoyette 	struct sysmon_wdog	sc_smw;
     58   1.7  riastrad 	bus_space_tag_t		sc_pmt;
     59   1.7  riastrad 	bus_space_handle_t	sc_pmh;
     60   1.1  pgoyette 	bus_space_tag_t		sc_rcbat;
     61   1.1  pgoyette 	bus_space_handle_t	sc_rcbah;
     62   1.1  pgoyette 	struct pcib_softc *	sc_pcib;
     63  1.10  riastrad 	pci_chipset_tag_t	sc_pc;
     64   1.8  riastrad 	bus_space_tag_t		sc_tcot;
     65   1.8  riastrad 	bus_space_handle_t	sc_tcoh;
     66  1.10  riastrad 	int			(*sc_set_noreboot)(device_t, bool);
     67   1.1  pgoyette 	int			sc_armed;
     68   1.1  pgoyette 	unsigned int		sc_min_t;
     69   1.1  pgoyette 	unsigned int		sc_max_t;
     70   1.4  riastrad 	int			sc_version;
     71   1.8  riastrad 	bool			sc_attached;
     72   1.1  pgoyette };
     73   1.1  pgoyette 
     74   1.1  pgoyette static int tco_match(device_t, cfdata_t, void *);
     75   1.1  pgoyette static void tco_attach(device_t, device_t, void *);
     76   1.1  pgoyette static int tco_detach(device_t, int);
     77   1.1  pgoyette 
     78   1.1  pgoyette static bool tco_suspend(device_t, const pmf_qual_t *);
     79   1.1  pgoyette 
     80   1.1  pgoyette static int tcotimer_setmode(struct sysmon_wdog *);
     81   1.1  pgoyette static int tcotimer_tickle(struct sysmon_wdog *);
     82   1.1  pgoyette static void tcotimer_stop(struct tco_softc *);
     83   1.1  pgoyette static void tcotimer_start(struct tco_softc *);
     84   1.1  pgoyette static void tcotimer_status_reset(struct tco_softc *);
     85   1.1  pgoyette static int  tcotimer_disable_noreboot(device_t);
     86   1.1  pgoyette 
     87   1.1  pgoyette CFATTACH_DECL3_NEW(tco, sizeof(struct tco_softc),
     88   1.1  pgoyette     tco_match, tco_attach, tco_detach, NULL, NULL, NULL, 0);
     89   1.1  pgoyette 
     90   1.1  pgoyette /*
     91   1.1  pgoyette  * Autoconf callbacks.
     92   1.1  pgoyette  */
     93   1.1  pgoyette static int
     94   1.1  pgoyette tco_match(device_t parent, cfdata_t match, void *aux)
     95   1.1  pgoyette {
     96   1.5  riastrad 	struct tco_attach_args *ta = aux;
     97   1.1  pgoyette 
     98   1.4  riastrad 	switch (ta->ta_version) {
     99  1.10  riastrad 	case TCO_VERSION_SMBUS:
    100  1.10  riastrad 		break;
    101   1.4  riastrad 	case TCO_VERSION_RCBA:
    102   1.4  riastrad 	case TCO_VERSION_PCIB:
    103  1.10  riastrad 		if (ta->ta_pmt == 0)
    104  1.10  riastrad 			return 0;
    105   1.4  riastrad 		break;
    106   1.4  riastrad 	default:
    107   1.4  riastrad 		return 0;
    108   1.4  riastrad 	}
    109   1.4  riastrad 
    110   1.4  riastrad 	return 1;
    111   1.1  pgoyette }
    112   1.1  pgoyette 
    113   1.1  pgoyette static void
    114   1.1  pgoyette tco_attach(device_t parent, device_t self, void *aux)
    115   1.1  pgoyette {
    116   1.1  pgoyette 	struct tco_softc *sc = device_private(self);
    117   1.5  riastrad 	struct tco_attach_args *ta = aux;
    118   1.1  pgoyette 	uint32_t ioreg;
    119   1.1  pgoyette 
    120   1.1  pgoyette 	/* Retrieve bus info shared with parent/siblings */
    121   1.4  riastrad 	sc->sc_version = ta->ta_version;
    122   1.7  riastrad 	sc->sc_pmt = ta->ta_pmt;
    123   1.7  riastrad 	sc->sc_pmh = ta->ta_pmh;
    124   1.1  pgoyette 	sc->sc_rcbat = ta->ta_rcbat;
    125   1.1  pgoyette 	sc->sc_rcbah = ta->ta_rcbah;
    126   1.1  pgoyette 	sc->sc_pcib = ta->ta_pcib;
    127   1.1  pgoyette 
    128   1.2  christos 	aprint_normal(": TCO (watchdog) timer configured.\n");
    129   1.2  christos 	aprint_naive("\n");
    130   1.2  christos 
    131  1.10  riastrad 	switch (sc->sc_version) {
    132  1.10  riastrad 	case TCO_VERSION_SMBUS:
    133  1.10  riastrad 		sc->sc_tcot = ta->ta_tcot;
    134  1.10  riastrad 		sc->sc_tcoh = ta->ta_tcoh;
    135  1.10  riastrad 		sc->sc_set_noreboot = ta->ta_set_noreboot;
    136  1.10  riastrad 		break;
    137  1.10  riastrad 	case TCO_VERSION_RCBA:
    138  1.10  riastrad 	case TCO_VERSION_PCIB:
    139  1.10  riastrad 		sc->sc_tcot = sc->sc_pmt;
    140  1.10  riastrad 		if (bus_space_subregion(sc->sc_pmt, sc->sc_pmh, PMC_TCO_BASE,
    141  1.10  riastrad 			TCO_REGSIZE, &sc->sc_tcoh)) {
    142  1.10  riastrad 			aprint_error_dev(self, "failed to map TCO\n");
    143  1.10  riastrad 			return;
    144  1.10  riastrad 		}
    145  1.10  riastrad 		break;
    146   1.8  riastrad 	}
    147   1.8  riastrad 
    148   1.1  pgoyette 	/* Explicitly stop the TCO timer. */
    149   1.1  pgoyette 	tcotimer_stop(sc);
    150   1.1  pgoyette 
    151   1.1  pgoyette 	/*
    152   1.1  pgoyette 	 * Enable TCO timeout SMI only if the hardware reset does not
    153   1.1  pgoyette 	 * work. We don't know what the SMBIOS does.
    154   1.1  pgoyette 	 */
    155   1.7  riastrad 	ioreg = bus_space_read_4(sc->sc_pmt, sc->sc_pmh, PMC_SMI_EN);
    156  1.10  riastrad 	aprint_debug_dev(self, "SMI_EN=0x%08x\n", ioreg);
    157   1.6  riastrad 	ioreg &= ~PMC_SMI_EN_TCO_EN;
    158   1.1  pgoyette 
    159   1.3  riastrad 	/*
    160   1.1  pgoyette 	 * Clear the No Reboot (NR) bit. If this fails, enabling the TCO_EN bit
    161   1.1  pgoyette 	 * in the SMI_EN register is the last chance.
    162   1.1  pgoyette 	 */
    163   1.1  pgoyette 	if (tcotimer_disable_noreboot(self)) {
    164   1.6  riastrad 		ioreg |= PMC_SMI_EN_TCO_EN;
    165   1.1  pgoyette 	}
    166   1.6  riastrad 	if ((ioreg & PMC_SMI_EN_GBL_SMI_EN) != 0) {
    167  1.10  riastrad 		aprint_debug_dev(self, "SMI_EN:=0x%08x\n", ioreg);
    168   1.7  riastrad 		bus_space_write_4(sc->sc_pmt, sc->sc_pmh, PMC_SMI_EN, ioreg);
    169  1.10  riastrad 		aprint_debug_dev(self, "SMI_EN=0x%08x\n",
    170  1.10  riastrad 		    bus_space_read_4(sc->sc_pmt, sc->sc_pmh, PMC_SMI_EN));
    171   1.1  pgoyette 	}
    172   1.1  pgoyette 
    173   1.1  pgoyette 	/* Reset the watchdog status registers. */
    174   1.1  pgoyette 	tcotimer_status_reset(sc);
    175   1.1  pgoyette 
    176   1.3  riastrad 	/*
    177   1.1  pgoyette 	 * Register the driver with the sysmon watchdog framework.
    178   1.1  pgoyette 	 */
    179   1.1  pgoyette 	sc->sc_smw.smw_name = device_xname(self);
    180   1.1  pgoyette 	sc->sc_smw.smw_cookie = sc;
    181   1.1  pgoyette 	sc->sc_smw.smw_setmode = tcotimer_setmode;
    182   1.1  pgoyette 	sc->sc_smw.smw_tickle = tcotimer_tickle;
    183   1.1  pgoyette 
    184   1.3  riastrad 	/*
    185   1.1  pgoyette 	 * ICH6 or newer are limited to 2ticks min and 613ticks max.
    186   1.1  pgoyette 	 *                              1sec           367secs
    187   1.1  pgoyette 	 *
    188   1.1  pgoyette 	 * ICH5 or older are limited to 4ticks min and 39ticks max.
    189   1.1  pgoyette 	 *                              2secs          23secs
    190   1.1  pgoyette 	 */
    191   1.4  riastrad 	switch (sc->sc_version) {
    192  1.10  riastrad 	case TCO_VERSION_SMBUS:
    193   1.4  riastrad 	case TCO_VERSION_RCBA:
    194   1.6  riastrad 		sc->sc_max_t = TCOTIMER2_MAX_TICK;
    195   1.6  riastrad 		sc->sc_min_t = TCOTIMER2_MIN_TICK;
    196   1.4  riastrad 		break;
    197   1.4  riastrad 	case TCO_VERSION_PCIB:
    198   1.6  riastrad 		sc->sc_max_t = TCOTIMER_MAX_TICK;
    199   1.6  riastrad 		sc->sc_min_t = TCOTIMER_MIN_TICK;
    200   1.4  riastrad 		break;
    201   1.1  pgoyette 	}
    202   1.6  riastrad 	sc->sc_smw.smw_period = tcotimer_tick_to_second(sc->sc_max_t);
    203   1.1  pgoyette 
    204   1.1  pgoyette 	aprint_verbose_dev(self, "Min/Max interval %u/%u seconds\n",
    205   1.6  riastrad 		tcotimer_tick_to_second(sc->sc_min_t),
    206   1.6  riastrad 		tcotimer_tick_to_second(sc->sc_max_t));
    207   1.1  pgoyette 
    208   1.1  pgoyette 	if (sysmon_wdog_register(&sc->sc_smw))
    209   1.1  pgoyette 		aprint_error_dev(self, "unable to register TCO timer"
    210   1.1  pgoyette 		       "as a sysmon watchdog device.\n");
    211   1.1  pgoyette 
    212   1.1  pgoyette 	if (!pmf_device_register(self, tco_suspend, NULL))
    213   1.1  pgoyette 		aprint_error_dev(self, "unable to register with pmf\n");
    214   1.8  riastrad 
    215   1.8  riastrad 	sc->sc_attached = true;
    216   1.1  pgoyette }
    217   1.1  pgoyette 
    218   1.1  pgoyette static int
    219   1.1  pgoyette tco_detach(device_t self, int flags)
    220   1.1  pgoyette {
    221   1.1  pgoyette 	struct tco_softc *sc = device_private(self);
    222   1.1  pgoyette 	int rc;
    223   1.1  pgoyette 
    224   1.8  riastrad 	if (!sc->sc_attached)
    225   1.8  riastrad 		return 0;
    226   1.8  riastrad 
    227   1.1  pgoyette 	if ((rc = sysmon_wdog_unregister(&sc->sc_smw)) != 0) {
    228   1.1  pgoyette 		if (rc == ERESTART)
    229   1.1  pgoyette 			rc = EINTR;
    230   1.1  pgoyette 		return rc;
    231   1.1  pgoyette 	}
    232   1.1  pgoyette 
    233   1.1  pgoyette 	/* Explicitly stop the TCO timer. */
    234   1.1  pgoyette 	tcotimer_stop(sc);
    235   1.1  pgoyette 
    236   1.1  pgoyette 	/* XXX Set No Reboot? */
    237   1.1  pgoyette 
    238   1.1  pgoyette 	pmf_device_deregister(self);
    239   1.1  pgoyette 
    240   1.1  pgoyette 	return 0;
    241   1.1  pgoyette }
    242   1.1  pgoyette 
    243   1.1  pgoyette static bool
    244   1.1  pgoyette tco_suspend(device_t self, const pmf_qual_t *quals)
    245   1.1  pgoyette {
    246   1.1  pgoyette 	struct tco_softc *sc = device_private(self);
    247   1.1  pgoyette 
    248   1.1  pgoyette 	/* Allow suspend only if watchdog is not armed */
    249   1.1  pgoyette 
    250   1.1  pgoyette 	return ((sc->sc_smw.smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED);
    251   1.1  pgoyette }
    252   1.1  pgoyette 
    253   1.1  pgoyette /*
    254   1.1  pgoyette  * Sysmon watchdog callbacks.
    255   1.1  pgoyette  */
    256   1.1  pgoyette static int
    257   1.1  pgoyette tcotimer_setmode(struct sysmon_wdog *smw)
    258   1.1  pgoyette {
    259   1.1  pgoyette 	struct tco_softc *sc = smw->smw_cookie;
    260   1.1  pgoyette 	unsigned int period;
    261   1.1  pgoyette 	uint16_t ich6period = 0;
    262   1.1  pgoyette 	uint8_t ich5period = 0;
    263   1.1  pgoyette 
    264   1.1  pgoyette 	if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
    265   1.1  pgoyette 		/* Stop the TCO timer. */
    266   1.1  pgoyette 		tcotimer_stop(sc);
    267   1.1  pgoyette 	} else {
    268   1.6  riastrad 		period = tcotimer_second_to_tick(smw->smw_period);
    269   1.1  pgoyette 		if (period < sc->sc_min_t || period > sc->sc_max_t)
    270   1.1  pgoyette 			return EINVAL;
    271   1.3  riastrad 
    272   1.1  pgoyette 		/* Stop the TCO timer, */
    273   1.1  pgoyette 		tcotimer_stop(sc);
    274   1.1  pgoyette 
    275   1.1  pgoyette 		/* set the timeout, */
    276   1.4  riastrad 		switch (sc->sc_version) {
    277  1.10  riastrad 		case TCO_VERSION_SMBUS:
    278   1.4  riastrad 		case TCO_VERSION_RCBA:
    279   1.1  pgoyette 			/* ICH6 or newer */
    280   1.8  riastrad 			ich6period = bus_space_read_2(sc->sc_tcot, sc->sc_tcoh,
    281   1.9  riastrad 			    TCO_TMR2);
    282   1.1  pgoyette 			ich6period &= 0xfc00;
    283   1.8  riastrad 			bus_space_write_2(sc->sc_tcot, sc->sc_tcoh,
    284   1.9  riastrad 			    TCO_TMR2, ich6period | period);
    285   1.4  riastrad 			break;
    286   1.4  riastrad 		case TCO_VERSION_PCIB:
    287   1.1  pgoyette 			/* ICH5 or older */
    288   1.8  riastrad 			ich5period = bus_space_read_1(sc->sc_tcot, sc->sc_tcoh,
    289   1.9  riastrad 			    TCO_TMR);
    290   1.1  pgoyette 			ich5period &= 0xc0;
    291   1.8  riastrad 			bus_space_write_1(sc->sc_tcot, sc->sc_tcoh,
    292   1.9  riastrad 			    TCO_TMR, ich5period | period);
    293   1.4  riastrad 			break;
    294   1.1  pgoyette 		}
    295   1.1  pgoyette 
    296   1.1  pgoyette 		/* and start/reload the timer. */
    297   1.1  pgoyette 		tcotimer_start(sc);
    298   1.1  pgoyette 		tcotimer_tickle(smw);
    299   1.1  pgoyette 	}
    300   1.1  pgoyette 
    301   1.1  pgoyette 	return 0;
    302   1.1  pgoyette }
    303   1.1  pgoyette 
    304   1.1  pgoyette static int
    305   1.1  pgoyette tcotimer_tickle(struct sysmon_wdog *smw)
    306   1.1  pgoyette {
    307   1.1  pgoyette 	struct tco_softc *sc = smw->smw_cookie;
    308   1.1  pgoyette 
    309   1.1  pgoyette 	/* any value is allowed */
    310   1.4  riastrad 	switch (sc->sc_version) {
    311  1.10  riastrad 	case TCO_VERSION_SMBUS:
    312   1.4  riastrad 	case TCO_VERSION_RCBA:
    313   1.9  riastrad 		bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO_RLD, 1);
    314   1.4  riastrad 		break;
    315   1.4  riastrad 	case TCO_VERSION_PCIB:
    316   1.9  riastrad 		bus_space_write_1(sc->sc_tcot, sc->sc_tcoh, TCO_RLD, 1);
    317   1.4  riastrad 		break;
    318   1.4  riastrad 	}
    319   1.1  pgoyette 
    320   1.1  pgoyette 	return 0;
    321   1.1  pgoyette }
    322   1.1  pgoyette 
    323   1.1  pgoyette static void
    324   1.1  pgoyette tcotimer_stop(struct tco_softc *sc)
    325   1.1  pgoyette {
    326   1.1  pgoyette 	uint16_t ioreg;
    327   1.1  pgoyette 
    328   1.9  riastrad 	ioreg = bus_space_read_2(sc->sc_tcot, sc->sc_tcoh, TCO1_CNT);
    329   1.9  riastrad 	ioreg |= TCO1_CNT_TCO_TMR_HLT;
    330   1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO1_CNT, ioreg);
    331   1.1  pgoyette }
    332   1.1  pgoyette 
    333   1.1  pgoyette static void
    334   1.1  pgoyette tcotimer_start(struct tco_softc *sc)
    335   1.1  pgoyette {
    336   1.1  pgoyette 	uint16_t ioreg;
    337   1.1  pgoyette 
    338   1.9  riastrad 	ioreg = bus_space_read_2(sc->sc_tcot, sc->sc_tcoh, TCO1_CNT);
    339   1.9  riastrad 	ioreg &= ~TCO1_CNT_TCO_TMR_HLT;
    340   1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO1_CNT, ioreg);
    341   1.1  pgoyette }
    342   1.1  pgoyette 
    343   1.1  pgoyette static void
    344   1.1  pgoyette tcotimer_status_reset(struct tco_softc *sc)
    345   1.1  pgoyette {
    346   1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO1_STS,
    347   1.9  riastrad 	    TCO1_STS_TIMEOUT);
    348   1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO2_STS,
    349   1.9  riastrad 	    TCO2_STS_BOOT_STS);
    350   1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO2_STS,
    351   1.9  riastrad 	    TCO2_STS_SECONDS_TO_STS);
    352   1.1  pgoyette }
    353   1.1  pgoyette 
    354   1.1  pgoyette /*
    355   1.1  pgoyette  * Clear the No Reboot (NR) bit, this enables reboots when the timer
    356   1.1  pgoyette  * reaches the timeout for the second time.
    357   1.1  pgoyette  */
    358   1.1  pgoyette static int
    359   1.1  pgoyette tcotimer_disable_noreboot(device_t self)
    360   1.1  pgoyette {
    361   1.1  pgoyette 	struct tco_softc *sc = device_private(self);
    362  1.10  riastrad 	int error = EINVAL;
    363   1.1  pgoyette 
    364   1.4  riastrad 	switch (sc->sc_version) {
    365  1.10  riastrad 	case TCO_VERSION_SMBUS:
    366  1.10  riastrad 		error = (*sc->sc_set_noreboot)(self, false);
    367  1.10  riastrad 		if (error)
    368  1.10  riastrad 			goto error;
    369  1.10  riastrad 		break;
    370   1.4  riastrad 	case TCO_VERSION_RCBA: {
    371   1.1  pgoyette 		uint32_t status;
    372   1.1  pgoyette 
    373   1.1  pgoyette 		status = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,
    374   1.1  pgoyette 		    LPCIB_GCS_OFFSET);
    375   1.1  pgoyette 		status &= ~LPCIB_GCS_NO_REBOOT;
    376   1.1  pgoyette 		bus_space_write_4(sc->sc_rcbat, sc->sc_rcbah,
    377   1.1  pgoyette 		    LPCIB_GCS_OFFSET, status);
    378   1.1  pgoyette 		status = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,
    379   1.1  pgoyette 		    LPCIB_GCS_OFFSET);
    380   1.1  pgoyette 		if (status & LPCIB_GCS_NO_REBOOT)
    381   1.1  pgoyette 			goto error;
    382   1.4  riastrad 		break;
    383   1.4  riastrad 	}
    384   1.4  riastrad 	case TCO_VERSION_PCIB: {
    385   1.1  pgoyette 		pcireg_t pcireg;
    386   1.1  pgoyette 
    387   1.1  pgoyette 		pcireg = pci_conf_read(sc->sc_pcib->sc_pc, sc->sc_pcib->sc_tag,
    388   1.3  riastrad 		    LPCIB_PCI_GEN_STA);
    389   1.1  pgoyette 		if (pcireg & LPCIB_PCI_GEN_STA_NO_REBOOT) {
    390   1.1  pgoyette 			/* TCO timeout reset is disabled; try to enable it */
    391   1.1  pgoyette 			pcireg &= ~LPCIB_PCI_GEN_STA_NO_REBOOT;
    392   1.1  pgoyette 			pci_conf_write(sc->sc_pcib->sc_pc, sc->sc_pcib->sc_tag,
    393   1.3  riastrad 			    LPCIB_PCI_GEN_STA, pcireg);
    394   1.1  pgoyette 			if (pcireg & LPCIB_PCI_GEN_STA_NO_REBOOT)
    395   1.1  pgoyette 				goto error;
    396   1.1  pgoyette 		}
    397   1.4  riastrad 		break;
    398   1.4  riastrad 	}
    399   1.1  pgoyette 	}
    400   1.1  pgoyette 
    401   1.1  pgoyette 	return 0;
    402   1.1  pgoyette error:
    403   1.1  pgoyette 	aprint_error_dev(self, "TCO timer reboot disabled by hardware; "
    404   1.1  pgoyette 	    "hope SMBIOS properly handles it.\n");
    405  1.10  riastrad 	return error;
    406   1.1  pgoyette }
    407   1.1  pgoyette 
    408   1.1  pgoyette MODULE(MODULE_CLASS_DRIVER, tco, "sysmon_wdog");
    409   1.1  pgoyette 
    410   1.1  pgoyette #ifdef _MODULE
    411   1.3  riastrad #include "ioconf.c"
    412   1.1  pgoyette #endif
    413   1.1  pgoyette 
    414   1.1  pgoyette static int
    415   1.1  pgoyette tco_modcmd(modcmd_t cmd, void *arg)
    416   1.1  pgoyette {
    417   1.1  pgoyette 	int ret = 0;
    418   1.1  pgoyette 
    419   1.1  pgoyette 	switch (cmd) {
    420   1.1  pgoyette 	case MODULE_CMD_INIT:
    421   1.1  pgoyette #ifdef _MODULE
    422   1.1  pgoyette 		ret = config_init_component(cfdriver_ioconf_tco,
    423   1.3  riastrad 		    cfattach_ioconf_tco,
    424   1.3  riastrad 		    cfdata_ioconf_tco);
    425   1.1  pgoyette #endif
    426   1.1  pgoyette 		break;
    427   1.1  pgoyette 	case MODULE_CMD_FINI:
    428   1.1  pgoyette #ifdef _MODULE
    429   1.1  pgoyette 		ret = config_fini_component(cfdriver_ioconf_tco,
    430   1.3  riastrad 		    cfattach_ioconf_tco,
    431   1.3  riastrad 		    cfdata_ioconf_tco);
    432   1.1  pgoyette #endif
    433   1.1  pgoyette 		break;
    434   1.1  pgoyette 	default:
    435   1.1  pgoyette 		ret = ENOTTY;
    436   1.1  pgoyette 	}
    437   1.1  pgoyette 
    438   1.1  pgoyette 	return ret;
    439   1.1  pgoyette }
    440