tco.c revision 1.2 1 1.2 christos /* $NetBSD: tco.c,v 1.2 2015/08/30 07:50:34 christos Exp $ */
2 1.1 pgoyette
3 1.1 pgoyette /*-
4 1.1 pgoyette * Copyright (c) 2015 The NetBSD Foundation, Inc.
5 1.1 pgoyette * All rights reserved.
6 1.1 pgoyette *
7 1.1 pgoyette * This code is derived from software contributed to The NetBSD Foundation
8 1.1 pgoyette * by Minoura Makoto and Matthew R. Green.
9 1.1 pgoyette *
10 1.1 pgoyette * Redistribution and use in source and binary forms, with or without
11 1.1 pgoyette * modification, are permitted provided that the following conditions
12 1.1 pgoyette * are met:
13 1.1 pgoyette * 1. Redistributions of source code must retain the above copyright
14 1.1 pgoyette * notice, this list of conditions and the following disclaimer.
15 1.1 pgoyette * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 pgoyette * notice, this list of conditions and the following disclaimer in the
17 1.1 pgoyette * documentation and/or other materials provided with the distribution.
18 1.1 pgoyette *
19 1.1 pgoyette * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 pgoyette * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 pgoyette * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 pgoyette * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 pgoyette * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 pgoyette * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 pgoyette * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 pgoyette * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 pgoyette * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 pgoyette * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 pgoyette * POSSIBILITY OF SUCH DAMAGE.
30 1.1 pgoyette */
31 1.1 pgoyette
32 1.1 pgoyette /*
33 1.1 pgoyette * Intel I/O Controller Hub (ICHn) watchdog timer
34 1.1 pgoyette */
35 1.1 pgoyette
36 1.1 pgoyette #include <sys/cdefs.h>
37 1.2 christos __KERNEL_RCSID(0, "$NetBSD: tco.c,v 1.2 2015/08/30 07:50:34 christos Exp $");
38 1.1 pgoyette
39 1.1 pgoyette #include <sys/types.h>
40 1.1 pgoyette #include <sys/param.h>
41 1.1 pgoyette #include <sys/systm.h>
42 1.1 pgoyette #include <sys/device.h>
43 1.1 pgoyette #include <sys/timetc.h>
44 1.1 pgoyette #include <sys/module.h>
45 1.1 pgoyette
46 1.1 pgoyette #include <dev/pci/pcivar.h>
47 1.1 pgoyette #include <dev/pci/pcireg.h>
48 1.1 pgoyette #include <dev/ic/i82801lpcreg.h>
49 1.1 pgoyette
50 1.1 pgoyette #include <dev/sysmon/sysmonvar.h>
51 1.1 pgoyette
52 1.1 pgoyette #include <arch/x86/pci/tco.h>
53 1.1 pgoyette
54 1.1 pgoyette #include "pcibvar.h"
55 1.1 pgoyette
56 1.1 pgoyette struct tco_softc{
57 1.1 pgoyette struct sysmon_wdog sc_smw;
58 1.1 pgoyette bus_space_tag_t sc_iot;
59 1.1 pgoyette bus_space_handle_t sc_ioh;
60 1.1 pgoyette bus_space_tag_t sc_rcbat;
61 1.1 pgoyette bus_space_handle_t sc_rcbah;
62 1.1 pgoyette struct pcib_softc * sc_pcib;
63 1.1 pgoyette int sc_armed;
64 1.1 pgoyette unsigned int sc_min_t;
65 1.1 pgoyette unsigned int sc_max_t;
66 1.1 pgoyette int sc_has_rcba;
67 1.1 pgoyette };
68 1.1 pgoyette
69 1.1 pgoyette static int tco_match(device_t, cfdata_t, void *);
70 1.1 pgoyette static void tco_attach(device_t, device_t, void *);
71 1.1 pgoyette static int tco_detach(device_t, int);
72 1.1 pgoyette
73 1.1 pgoyette static bool tco_suspend(device_t, const pmf_qual_t *);
74 1.1 pgoyette
75 1.1 pgoyette static int tcotimer_setmode(struct sysmon_wdog *);
76 1.1 pgoyette static int tcotimer_tickle(struct sysmon_wdog *);
77 1.1 pgoyette static void tcotimer_stop(struct tco_softc *);
78 1.1 pgoyette static void tcotimer_start(struct tco_softc *);
79 1.1 pgoyette static void tcotimer_status_reset(struct tco_softc *);
80 1.1 pgoyette static int tcotimer_disable_noreboot(device_t);
81 1.1 pgoyette
82 1.1 pgoyette CFATTACH_DECL3_NEW(tco, sizeof(struct tco_softc),
83 1.1 pgoyette tco_match, tco_attach, tco_detach, NULL, NULL, NULL, 0);
84 1.1 pgoyette
85 1.1 pgoyette /*
86 1.1 pgoyette * Autoconf callbacks.
87 1.1 pgoyette */
88 1.1 pgoyette static int
89 1.1 pgoyette tco_match(device_t parent, cfdata_t match, void *aux)
90 1.1 pgoyette {
91 1.1 pgoyette struct lpcib_tco_attach_args *ta = aux;
92 1.1 pgoyette
93 1.1 pgoyette if (ta->ta_iot != 0)
94 1.1 pgoyette return 1;
95 1.1 pgoyette
96 1.1 pgoyette return 0;
97 1.1 pgoyette }
98 1.1 pgoyette
99 1.1 pgoyette static void
100 1.1 pgoyette tco_attach(device_t parent, device_t self, void *aux)
101 1.1 pgoyette {
102 1.1 pgoyette struct tco_softc *sc = device_private(self);
103 1.1 pgoyette struct lpcib_tco_attach_args *ta = aux;
104 1.1 pgoyette uint32_t ioreg;
105 1.1 pgoyette
106 1.1 pgoyette /* Retrieve bus info shared with parent/siblings */
107 1.1 pgoyette
108 1.1 pgoyette sc->sc_iot = ta->ta_iot;
109 1.1 pgoyette sc->sc_ioh = ta->ta_ioh;
110 1.1 pgoyette sc->sc_rcbat = ta->ta_rcbat;
111 1.1 pgoyette sc->sc_rcbah = ta->ta_rcbah;
112 1.1 pgoyette sc->sc_pcib = ta->ta_pcib;
113 1.1 pgoyette sc->sc_has_rcba = ta->ta_has_rcba;
114 1.1 pgoyette
115 1.2 christos aprint_normal(": TCO (watchdog) timer configured.\n");
116 1.2 christos aprint_naive("\n");
117 1.2 christos
118 1.1 pgoyette /* Explicitly stop the TCO timer. */
119 1.1 pgoyette tcotimer_stop(sc);
120 1.1 pgoyette
121 1.1 pgoyette /*
122 1.1 pgoyette * Enable TCO timeout SMI only if the hardware reset does not
123 1.1 pgoyette * work. We don't know what the SMBIOS does.
124 1.1 pgoyette */
125 1.1 pgoyette ioreg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, LPCIB_SMI_EN);
126 1.1 pgoyette ioreg &= ~LPCIB_SMI_EN_TCO_EN;
127 1.1 pgoyette
128 1.1 pgoyette /*
129 1.1 pgoyette * Clear the No Reboot (NR) bit. If this fails, enabling the TCO_EN bit
130 1.1 pgoyette * in the SMI_EN register is the last chance.
131 1.1 pgoyette */
132 1.1 pgoyette if (tcotimer_disable_noreboot(self)) {
133 1.1 pgoyette ioreg |= LPCIB_SMI_EN_TCO_EN;
134 1.1 pgoyette }
135 1.1 pgoyette if ((ioreg & LPCIB_SMI_EN_GBL_SMI_EN) != 0) {
136 1.1 pgoyette bus_space_write_4(sc->sc_iot, sc->sc_ioh, LPCIB_SMI_EN, ioreg);
137 1.1 pgoyette }
138 1.1 pgoyette
139 1.1 pgoyette /* Reset the watchdog status registers. */
140 1.1 pgoyette tcotimer_status_reset(sc);
141 1.1 pgoyette
142 1.1 pgoyette /*
143 1.1 pgoyette * Register the driver with the sysmon watchdog framework.
144 1.1 pgoyette */
145 1.1 pgoyette sc->sc_smw.smw_name = device_xname(self);
146 1.1 pgoyette sc->sc_smw.smw_cookie = sc;
147 1.1 pgoyette sc->sc_smw.smw_setmode = tcotimer_setmode;
148 1.1 pgoyette sc->sc_smw.smw_tickle = tcotimer_tickle;
149 1.1 pgoyette
150 1.1 pgoyette /*
151 1.1 pgoyette * ICH6 or newer are limited to 2ticks min and 613ticks max.
152 1.1 pgoyette * 1sec 367secs
153 1.1 pgoyette *
154 1.1 pgoyette * ICH5 or older are limited to 4ticks min and 39ticks max.
155 1.1 pgoyette * 2secs 23secs
156 1.1 pgoyette */
157 1.1 pgoyette if (sc->sc_has_rcba) {
158 1.1 pgoyette sc->sc_max_t = LPCIB_TCOTIMER2_MAX_TICK;
159 1.1 pgoyette sc->sc_min_t = LPCIB_TCOTIMER2_MIN_TICK;
160 1.1 pgoyette } else {
161 1.1 pgoyette sc->sc_max_t = LPCIB_TCOTIMER_MAX_TICK;
162 1.1 pgoyette sc->sc_min_t = LPCIB_TCOTIMER_MIN_TICK;
163 1.1 pgoyette }
164 1.1 pgoyette sc->sc_smw.smw_period = lpcib_tcotimer_tick_to_second(sc->sc_max_t);
165 1.1 pgoyette
166 1.1 pgoyette aprint_verbose_dev(self, "Min/Max interval %u/%u seconds\n",
167 1.1 pgoyette lpcib_tcotimer_tick_to_second(sc->sc_min_t),
168 1.1 pgoyette lpcib_tcotimer_tick_to_second(sc->sc_max_t));
169 1.1 pgoyette
170 1.1 pgoyette if (sysmon_wdog_register(&sc->sc_smw))
171 1.1 pgoyette aprint_error_dev(self, "unable to register TCO timer"
172 1.1 pgoyette "as a sysmon watchdog device.\n");
173 1.1 pgoyette
174 1.1 pgoyette if (!pmf_device_register(self, tco_suspend, NULL))
175 1.1 pgoyette aprint_error_dev(self, "unable to register with pmf\n");
176 1.1 pgoyette }
177 1.1 pgoyette
178 1.1 pgoyette static int
179 1.1 pgoyette tco_detach(device_t self, int flags)
180 1.1 pgoyette {
181 1.1 pgoyette struct tco_softc *sc = device_private(self);
182 1.1 pgoyette int rc;
183 1.1 pgoyette
184 1.1 pgoyette if ((rc = sysmon_wdog_unregister(&sc->sc_smw)) != 0) {
185 1.1 pgoyette if (rc == ERESTART)
186 1.1 pgoyette rc = EINTR;
187 1.1 pgoyette return rc;
188 1.1 pgoyette }
189 1.1 pgoyette
190 1.1 pgoyette /* Explicitly stop the TCO timer. */
191 1.1 pgoyette tcotimer_stop(sc);
192 1.1 pgoyette
193 1.1 pgoyette /* XXX Set No Reboot? */
194 1.1 pgoyette
195 1.1 pgoyette pmf_device_deregister(self);
196 1.1 pgoyette
197 1.1 pgoyette return 0;
198 1.1 pgoyette }
199 1.1 pgoyette
200 1.1 pgoyette static bool
201 1.1 pgoyette tco_suspend(device_t self, const pmf_qual_t *quals)
202 1.1 pgoyette {
203 1.1 pgoyette struct tco_softc *sc = device_private(self);
204 1.1 pgoyette
205 1.1 pgoyette /* Allow suspend only if watchdog is not armed */
206 1.1 pgoyette
207 1.1 pgoyette return ((sc->sc_smw.smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED);
208 1.1 pgoyette }
209 1.1 pgoyette
210 1.1 pgoyette /*
211 1.1 pgoyette * Sysmon watchdog callbacks.
212 1.1 pgoyette */
213 1.1 pgoyette static int
214 1.1 pgoyette tcotimer_setmode(struct sysmon_wdog *smw)
215 1.1 pgoyette {
216 1.1 pgoyette struct tco_softc *sc = smw->smw_cookie;
217 1.1 pgoyette unsigned int period;
218 1.1 pgoyette uint16_t ich6period = 0;
219 1.1 pgoyette uint8_t ich5period = 0;
220 1.1 pgoyette
221 1.1 pgoyette if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
222 1.1 pgoyette /* Stop the TCO timer. */
223 1.1 pgoyette tcotimer_stop(sc);
224 1.1 pgoyette } else {
225 1.1 pgoyette period = lpcib_tcotimer_second_to_tick(smw->smw_period);
226 1.1 pgoyette if (period < sc->sc_min_t || period > sc->sc_max_t)
227 1.1 pgoyette return EINVAL;
228 1.1 pgoyette
229 1.1 pgoyette /* Stop the TCO timer, */
230 1.1 pgoyette tcotimer_stop(sc);
231 1.1 pgoyette
232 1.1 pgoyette /* set the timeout, */
233 1.1 pgoyette if (sc->sc_has_rcba) {
234 1.1 pgoyette /* ICH6 or newer */
235 1.1 pgoyette ich6period = bus_space_read_2(sc->sc_iot, sc->sc_ioh,
236 1.1 pgoyette LPCIB_TCO_TMR2);
237 1.1 pgoyette ich6period &= 0xfc00;
238 1.1 pgoyette bus_space_write_2(sc->sc_iot, sc->sc_ioh,
239 1.1 pgoyette LPCIB_TCO_TMR2, ich6period | period);
240 1.1 pgoyette } else {
241 1.1 pgoyette /* ICH5 or older */
242 1.1 pgoyette ich5period = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
243 1.1 pgoyette LPCIB_TCO_TMR);
244 1.1 pgoyette ich5period &= 0xc0;
245 1.1 pgoyette bus_space_write_1(sc->sc_iot, sc->sc_ioh,
246 1.1 pgoyette LPCIB_TCO_TMR, ich5period | period);
247 1.1 pgoyette }
248 1.1 pgoyette
249 1.1 pgoyette /* and start/reload the timer. */
250 1.1 pgoyette tcotimer_start(sc);
251 1.1 pgoyette tcotimer_tickle(smw);
252 1.1 pgoyette }
253 1.1 pgoyette
254 1.1 pgoyette return 0;
255 1.1 pgoyette }
256 1.1 pgoyette
257 1.1 pgoyette static int
258 1.1 pgoyette tcotimer_tickle(struct sysmon_wdog *smw)
259 1.1 pgoyette {
260 1.1 pgoyette struct tco_softc *sc = smw->smw_cookie;
261 1.1 pgoyette
262 1.1 pgoyette /* any value is allowed */
263 1.1 pgoyette if (sc->sc_has_rcba)
264 1.1 pgoyette bus_space_write_2(sc->sc_iot, sc->sc_ioh, LPCIB_TCO_RLD, 1);
265 1.1 pgoyette else
266 1.1 pgoyette bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_TCO_RLD, 1);
267 1.1 pgoyette
268 1.1 pgoyette return 0;
269 1.1 pgoyette }
270 1.1 pgoyette
271 1.1 pgoyette static void
272 1.1 pgoyette tcotimer_stop(struct tco_softc *sc)
273 1.1 pgoyette {
274 1.1 pgoyette uint16_t ioreg;
275 1.1 pgoyette
276 1.1 pgoyette ioreg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, LPCIB_TCO1_CNT);
277 1.1 pgoyette ioreg |= LPCIB_TCO1_CNT_TCO_TMR_HLT;
278 1.1 pgoyette bus_space_write_2(sc->sc_iot, sc->sc_ioh, LPCIB_TCO1_CNT, ioreg);
279 1.1 pgoyette }
280 1.1 pgoyette
281 1.1 pgoyette static void
282 1.1 pgoyette tcotimer_start(struct tco_softc *sc)
283 1.1 pgoyette {
284 1.1 pgoyette uint16_t ioreg;
285 1.1 pgoyette
286 1.1 pgoyette ioreg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, LPCIB_TCO1_CNT);
287 1.1 pgoyette ioreg &= ~LPCIB_TCO1_CNT_TCO_TMR_HLT;
288 1.1 pgoyette bus_space_write_2(sc->sc_iot, sc->sc_ioh, LPCIB_TCO1_CNT, ioreg);
289 1.1 pgoyette }
290 1.1 pgoyette
291 1.1 pgoyette static void
292 1.1 pgoyette tcotimer_status_reset(struct tco_softc *sc)
293 1.1 pgoyette {
294 1.1 pgoyette bus_space_write_2(sc->sc_iot, sc->sc_ioh, LPCIB_TCO1_STS,
295 1.1 pgoyette LPCIB_TCO1_STS_TIMEOUT);
296 1.1 pgoyette bus_space_write_2(sc->sc_iot, sc->sc_ioh, LPCIB_TCO2_STS,
297 1.1 pgoyette LPCIB_TCO2_STS_BOOT_STS);
298 1.1 pgoyette bus_space_write_2(sc->sc_iot, sc->sc_ioh, LPCIB_TCO2_STS,
299 1.1 pgoyette LPCIB_TCO2_STS_SECONDS_TO_STS);
300 1.1 pgoyette }
301 1.1 pgoyette
302 1.1 pgoyette /*
303 1.1 pgoyette * Clear the No Reboot (NR) bit, this enables reboots when the timer
304 1.1 pgoyette * reaches the timeout for the second time.
305 1.1 pgoyette */
306 1.1 pgoyette static int
307 1.1 pgoyette tcotimer_disable_noreboot(device_t self)
308 1.1 pgoyette {
309 1.1 pgoyette struct tco_softc *sc = device_private(self);
310 1.1 pgoyette
311 1.1 pgoyette if (sc->sc_has_rcba) {
312 1.1 pgoyette uint32_t status;
313 1.1 pgoyette
314 1.1 pgoyette status = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,
315 1.1 pgoyette LPCIB_GCS_OFFSET);
316 1.1 pgoyette status &= ~LPCIB_GCS_NO_REBOOT;
317 1.1 pgoyette bus_space_write_4(sc->sc_rcbat, sc->sc_rcbah,
318 1.1 pgoyette LPCIB_GCS_OFFSET, status);
319 1.1 pgoyette status = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,
320 1.1 pgoyette LPCIB_GCS_OFFSET);
321 1.1 pgoyette if (status & LPCIB_GCS_NO_REBOOT)
322 1.1 pgoyette goto error;
323 1.1 pgoyette } else {
324 1.1 pgoyette pcireg_t pcireg;
325 1.1 pgoyette
326 1.1 pgoyette pcireg = pci_conf_read(sc->sc_pcib->sc_pc, sc->sc_pcib->sc_tag,
327 1.1 pgoyette LPCIB_PCI_GEN_STA);
328 1.1 pgoyette if (pcireg & LPCIB_PCI_GEN_STA_NO_REBOOT) {
329 1.1 pgoyette /* TCO timeout reset is disabled; try to enable it */
330 1.1 pgoyette pcireg &= ~LPCIB_PCI_GEN_STA_NO_REBOOT;
331 1.1 pgoyette pci_conf_write(sc->sc_pcib->sc_pc, sc->sc_pcib->sc_tag,
332 1.1 pgoyette LPCIB_PCI_GEN_STA, pcireg);
333 1.1 pgoyette if (pcireg & LPCIB_PCI_GEN_STA_NO_REBOOT)
334 1.1 pgoyette goto error;
335 1.1 pgoyette }
336 1.1 pgoyette }
337 1.1 pgoyette
338 1.1 pgoyette return 0;
339 1.1 pgoyette error:
340 1.1 pgoyette aprint_error_dev(self, "TCO timer reboot disabled by hardware; "
341 1.1 pgoyette "hope SMBIOS properly handles it.\n");
342 1.1 pgoyette return EINVAL;
343 1.1 pgoyette }
344 1.1 pgoyette
345 1.1 pgoyette MODULE(MODULE_CLASS_DRIVER, tco, "sysmon_wdog");
346 1.1 pgoyette
347 1.1 pgoyette #ifdef _MODULE
348 1.1 pgoyette #include "ioconf.c"
349 1.1 pgoyette #endif
350 1.1 pgoyette
351 1.1 pgoyette static int
352 1.1 pgoyette tco_modcmd(modcmd_t cmd, void *arg)
353 1.1 pgoyette {
354 1.1 pgoyette int ret = 0;
355 1.1 pgoyette
356 1.1 pgoyette switch (cmd) {
357 1.1 pgoyette case MODULE_CMD_INIT:
358 1.1 pgoyette #ifdef _MODULE
359 1.1 pgoyette ret = config_init_component(cfdriver_ioconf_tco,
360 1.1 pgoyette cfattach_ioconf_tco,
361 1.1 pgoyette cfdata_ioconf_tco);
362 1.1 pgoyette #endif
363 1.1 pgoyette break;
364 1.1 pgoyette case MODULE_CMD_FINI:
365 1.1 pgoyette #ifdef _MODULE
366 1.1 pgoyette ret = config_fini_component(cfdriver_ioconf_tco,
367 1.1 pgoyette cfattach_ioconf_tco,
368 1.1 pgoyette cfdata_ioconf_tco);
369 1.1 pgoyette #endif
370 1.1 pgoyette break;
371 1.1 pgoyette default:
372 1.1 pgoyette ret = ENOTTY;
373 1.1 pgoyette }
374 1.1 pgoyette
375 1.1 pgoyette return ret;
376 1.1 pgoyette }
377