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tco.c revision 1.9
      1  1.9  riastrad /*	$NetBSD: tco.c,v 1.9 2022/09/22 14:43:04 riastradh Exp $	*/
      2  1.1  pgoyette 
      3  1.1  pgoyette /*-
      4  1.1  pgoyette  * Copyright (c) 2015 The NetBSD Foundation, Inc.
      5  1.1  pgoyette  * All rights reserved.
      6  1.1  pgoyette  *
      7  1.1  pgoyette  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  pgoyette  * by Minoura Makoto and Matthew R. Green.
      9  1.1  pgoyette  *
     10  1.1  pgoyette  * Redistribution and use in source and binary forms, with or without
     11  1.1  pgoyette  * modification, are permitted provided that the following conditions
     12  1.1  pgoyette  * are met:
     13  1.1  pgoyette  * 1. Redistributions of source code must retain the above copyright
     14  1.1  pgoyette  *    notice, this list of conditions and the following disclaimer.
     15  1.1  pgoyette  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  pgoyette  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  pgoyette  *    documentation and/or other materials provided with the distribution.
     18  1.1  pgoyette  *
     19  1.1  pgoyette  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1  pgoyette  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1  pgoyette  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1  pgoyette  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1  pgoyette  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1  pgoyette  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1  pgoyette  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1  pgoyette  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1  pgoyette  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1  pgoyette  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1  pgoyette  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1  pgoyette  */
     31  1.1  pgoyette 
     32  1.1  pgoyette /*
     33  1.1  pgoyette  * Intel I/O Controller Hub (ICHn) watchdog timer
     34  1.1  pgoyette  */
     35  1.1  pgoyette 
     36  1.1  pgoyette #include <sys/cdefs.h>
     37  1.9  riastrad __KERNEL_RCSID(0, "$NetBSD: tco.c,v 1.9 2022/09/22 14:43:04 riastradh Exp $");
     38  1.1  pgoyette 
     39  1.1  pgoyette #include <sys/types.h>
     40  1.1  pgoyette #include <sys/param.h>
     41  1.1  pgoyette #include <sys/systm.h>
     42  1.1  pgoyette #include <sys/device.h>
     43  1.1  pgoyette #include <sys/timetc.h>
     44  1.1  pgoyette #include <sys/module.h>
     45  1.1  pgoyette 
     46  1.1  pgoyette #include <dev/pci/pcivar.h>
     47  1.1  pgoyette #include <dev/pci/pcireg.h>
     48  1.1  pgoyette #include <dev/ic/i82801lpcreg.h>
     49  1.1  pgoyette 
     50  1.1  pgoyette #include <dev/sysmon/sysmonvar.h>
     51  1.1  pgoyette 
     52  1.1  pgoyette #include <arch/x86/pci/tco.h>
     53  1.1  pgoyette 
     54  1.1  pgoyette #include "pcibvar.h"
     55  1.1  pgoyette 
     56  1.3  riastrad struct tco_softc {
     57  1.1  pgoyette 	struct sysmon_wdog	sc_smw;
     58  1.7  riastrad 	bus_space_tag_t		sc_pmt;
     59  1.7  riastrad 	bus_space_handle_t	sc_pmh;
     60  1.1  pgoyette 	bus_space_tag_t		sc_rcbat;
     61  1.1  pgoyette 	bus_space_handle_t	sc_rcbah;
     62  1.1  pgoyette 	struct pcib_softc *	sc_pcib;
     63  1.8  riastrad 	bus_space_tag_t		sc_tcot;
     64  1.8  riastrad 	bus_space_handle_t	sc_tcoh;
     65  1.1  pgoyette 	int			sc_armed;
     66  1.1  pgoyette 	unsigned int		sc_min_t;
     67  1.1  pgoyette 	unsigned int		sc_max_t;
     68  1.4  riastrad 	int			sc_version;
     69  1.8  riastrad 	bool			sc_attached;
     70  1.1  pgoyette };
     71  1.1  pgoyette 
     72  1.1  pgoyette static int tco_match(device_t, cfdata_t, void *);
     73  1.1  pgoyette static void tco_attach(device_t, device_t, void *);
     74  1.1  pgoyette static int tco_detach(device_t, int);
     75  1.1  pgoyette 
     76  1.1  pgoyette static bool tco_suspend(device_t, const pmf_qual_t *);
     77  1.1  pgoyette 
     78  1.1  pgoyette static int tcotimer_setmode(struct sysmon_wdog *);
     79  1.1  pgoyette static int tcotimer_tickle(struct sysmon_wdog *);
     80  1.1  pgoyette static void tcotimer_stop(struct tco_softc *);
     81  1.1  pgoyette static void tcotimer_start(struct tco_softc *);
     82  1.1  pgoyette static void tcotimer_status_reset(struct tco_softc *);
     83  1.1  pgoyette static int  tcotimer_disable_noreboot(device_t);
     84  1.1  pgoyette 
     85  1.1  pgoyette CFATTACH_DECL3_NEW(tco, sizeof(struct tco_softc),
     86  1.1  pgoyette     tco_match, tco_attach, tco_detach, NULL, NULL, NULL, 0);
     87  1.1  pgoyette 
     88  1.1  pgoyette /*
     89  1.1  pgoyette  * Autoconf callbacks.
     90  1.1  pgoyette  */
     91  1.1  pgoyette static int
     92  1.1  pgoyette tco_match(device_t parent, cfdata_t match, void *aux)
     93  1.1  pgoyette {
     94  1.5  riastrad 	struct tco_attach_args *ta = aux;
     95  1.1  pgoyette 
     96  1.7  riastrad 	if (ta->ta_pmt == 0)
     97  1.4  riastrad 		return 0;
     98  1.1  pgoyette 
     99  1.4  riastrad 	switch (ta->ta_version) {
    100  1.4  riastrad 	case TCO_VERSION_RCBA:
    101  1.4  riastrad 	case TCO_VERSION_PCIB:
    102  1.4  riastrad 		break;
    103  1.4  riastrad 	default:
    104  1.4  riastrad 		return 0;
    105  1.4  riastrad 	}
    106  1.4  riastrad 
    107  1.4  riastrad 	return 1;
    108  1.1  pgoyette }
    109  1.1  pgoyette 
    110  1.1  pgoyette static void
    111  1.1  pgoyette tco_attach(device_t parent, device_t self, void *aux)
    112  1.1  pgoyette {
    113  1.1  pgoyette 	struct tco_softc *sc = device_private(self);
    114  1.5  riastrad 	struct tco_attach_args *ta = aux;
    115  1.1  pgoyette 	uint32_t ioreg;
    116  1.1  pgoyette 
    117  1.1  pgoyette 	/* Retrieve bus info shared with parent/siblings */
    118  1.4  riastrad 	sc->sc_version = ta->ta_version;
    119  1.7  riastrad 	sc->sc_pmt = ta->ta_pmt;
    120  1.7  riastrad 	sc->sc_pmh = ta->ta_pmh;
    121  1.1  pgoyette 	sc->sc_rcbat = ta->ta_rcbat;
    122  1.1  pgoyette 	sc->sc_rcbah = ta->ta_rcbah;
    123  1.1  pgoyette 	sc->sc_pcib = ta->ta_pcib;
    124  1.1  pgoyette 
    125  1.2  christos 	aprint_normal(": TCO (watchdog) timer configured.\n");
    126  1.2  christos 	aprint_naive("\n");
    127  1.2  christos 
    128  1.8  riastrad 	sc->sc_tcot = sc->sc_pmt;
    129  1.8  riastrad 	if (bus_space_subregion(sc->sc_pmt, sc->sc_pmh, PMC_TCO_BASE,
    130  1.8  riastrad 		TCO_REGSIZE, &sc->sc_tcoh)) {
    131  1.8  riastrad 		aprint_error_dev(self, "failed to map TCO registers\n");
    132  1.8  riastrad 		return;
    133  1.8  riastrad 	}
    134  1.8  riastrad 
    135  1.1  pgoyette 	/* Explicitly stop the TCO timer. */
    136  1.1  pgoyette 	tcotimer_stop(sc);
    137  1.1  pgoyette 
    138  1.1  pgoyette 	/*
    139  1.1  pgoyette 	 * Enable TCO timeout SMI only if the hardware reset does not
    140  1.1  pgoyette 	 * work. We don't know what the SMBIOS does.
    141  1.1  pgoyette 	 */
    142  1.7  riastrad 	ioreg = bus_space_read_4(sc->sc_pmt, sc->sc_pmh, PMC_SMI_EN);
    143  1.6  riastrad 	ioreg &= ~PMC_SMI_EN_TCO_EN;
    144  1.1  pgoyette 
    145  1.3  riastrad 	/*
    146  1.1  pgoyette 	 * Clear the No Reboot (NR) bit. If this fails, enabling the TCO_EN bit
    147  1.1  pgoyette 	 * in the SMI_EN register is the last chance.
    148  1.1  pgoyette 	 */
    149  1.1  pgoyette 	if (tcotimer_disable_noreboot(self)) {
    150  1.6  riastrad 		ioreg |= PMC_SMI_EN_TCO_EN;
    151  1.1  pgoyette 	}
    152  1.6  riastrad 	if ((ioreg & PMC_SMI_EN_GBL_SMI_EN) != 0) {
    153  1.7  riastrad 		bus_space_write_4(sc->sc_pmt, sc->sc_pmh, PMC_SMI_EN, ioreg);
    154  1.1  pgoyette 	}
    155  1.1  pgoyette 
    156  1.1  pgoyette 	/* Reset the watchdog status registers. */
    157  1.1  pgoyette 	tcotimer_status_reset(sc);
    158  1.1  pgoyette 
    159  1.3  riastrad 	/*
    160  1.1  pgoyette 	 * Register the driver with the sysmon watchdog framework.
    161  1.1  pgoyette 	 */
    162  1.1  pgoyette 	sc->sc_smw.smw_name = device_xname(self);
    163  1.1  pgoyette 	sc->sc_smw.smw_cookie = sc;
    164  1.1  pgoyette 	sc->sc_smw.smw_setmode = tcotimer_setmode;
    165  1.1  pgoyette 	sc->sc_smw.smw_tickle = tcotimer_tickle;
    166  1.1  pgoyette 
    167  1.3  riastrad 	/*
    168  1.1  pgoyette 	 * ICH6 or newer are limited to 2ticks min and 613ticks max.
    169  1.1  pgoyette 	 *                              1sec           367secs
    170  1.1  pgoyette 	 *
    171  1.1  pgoyette 	 * ICH5 or older are limited to 4ticks min and 39ticks max.
    172  1.1  pgoyette 	 *                              2secs          23secs
    173  1.1  pgoyette 	 */
    174  1.4  riastrad 	switch (sc->sc_version) {
    175  1.4  riastrad 	case TCO_VERSION_RCBA:
    176  1.6  riastrad 		sc->sc_max_t = TCOTIMER2_MAX_TICK;
    177  1.6  riastrad 		sc->sc_min_t = TCOTIMER2_MIN_TICK;
    178  1.4  riastrad 		break;
    179  1.4  riastrad 	case TCO_VERSION_PCIB:
    180  1.6  riastrad 		sc->sc_max_t = TCOTIMER_MAX_TICK;
    181  1.6  riastrad 		sc->sc_min_t = TCOTIMER_MIN_TICK;
    182  1.4  riastrad 		break;
    183  1.1  pgoyette 	}
    184  1.6  riastrad 	sc->sc_smw.smw_period = tcotimer_tick_to_second(sc->sc_max_t);
    185  1.1  pgoyette 
    186  1.1  pgoyette 	aprint_verbose_dev(self, "Min/Max interval %u/%u seconds\n",
    187  1.6  riastrad 		tcotimer_tick_to_second(sc->sc_min_t),
    188  1.6  riastrad 		tcotimer_tick_to_second(sc->sc_max_t));
    189  1.1  pgoyette 
    190  1.1  pgoyette 	if (sysmon_wdog_register(&sc->sc_smw))
    191  1.1  pgoyette 		aprint_error_dev(self, "unable to register TCO timer"
    192  1.1  pgoyette 		       "as a sysmon watchdog device.\n");
    193  1.1  pgoyette 
    194  1.1  pgoyette 	if (!pmf_device_register(self, tco_suspend, NULL))
    195  1.1  pgoyette 		aprint_error_dev(self, "unable to register with pmf\n");
    196  1.8  riastrad 
    197  1.8  riastrad 	sc->sc_attached = true;
    198  1.1  pgoyette }
    199  1.1  pgoyette 
    200  1.1  pgoyette static int
    201  1.1  pgoyette tco_detach(device_t self, int flags)
    202  1.1  pgoyette {
    203  1.1  pgoyette 	struct tco_softc *sc = device_private(self);
    204  1.1  pgoyette 	int rc;
    205  1.1  pgoyette 
    206  1.8  riastrad 	if (!sc->sc_attached)
    207  1.8  riastrad 		return 0;
    208  1.8  riastrad 
    209  1.1  pgoyette 	if ((rc = sysmon_wdog_unregister(&sc->sc_smw)) != 0) {
    210  1.1  pgoyette 		if (rc == ERESTART)
    211  1.1  pgoyette 			rc = EINTR;
    212  1.1  pgoyette 		return rc;
    213  1.1  pgoyette 	}
    214  1.1  pgoyette 
    215  1.1  pgoyette 	/* Explicitly stop the TCO timer. */
    216  1.1  pgoyette 	tcotimer_stop(sc);
    217  1.1  pgoyette 
    218  1.1  pgoyette 	/* XXX Set No Reboot? */
    219  1.1  pgoyette 
    220  1.1  pgoyette 	pmf_device_deregister(self);
    221  1.1  pgoyette 
    222  1.1  pgoyette 	return 0;
    223  1.1  pgoyette }
    224  1.1  pgoyette 
    225  1.1  pgoyette static bool
    226  1.1  pgoyette tco_suspend(device_t self, const pmf_qual_t *quals)
    227  1.1  pgoyette {
    228  1.1  pgoyette 	struct tco_softc *sc = device_private(self);
    229  1.1  pgoyette 
    230  1.1  pgoyette 	/* Allow suspend only if watchdog is not armed */
    231  1.1  pgoyette 
    232  1.1  pgoyette 	return ((sc->sc_smw.smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED);
    233  1.1  pgoyette }
    234  1.1  pgoyette 
    235  1.1  pgoyette /*
    236  1.1  pgoyette  * Sysmon watchdog callbacks.
    237  1.1  pgoyette  */
    238  1.1  pgoyette static int
    239  1.1  pgoyette tcotimer_setmode(struct sysmon_wdog *smw)
    240  1.1  pgoyette {
    241  1.1  pgoyette 	struct tco_softc *sc = smw->smw_cookie;
    242  1.1  pgoyette 	unsigned int period;
    243  1.1  pgoyette 	uint16_t ich6period = 0;
    244  1.1  pgoyette 	uint8_t ich5period = 0;
    245  1.1  pgoyette 
    246  1.1  pgoyette 	if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
    247  1.1  pgoyette 		/* Stop the TCO timer. */
    248  1.1  pgoyette 		tcotimer_stop(sc);
    249  1.1  pgoyette 	} else {
    250  1.6  riastrad 		period = tcotimer_second_to_tick(smw->smw_period);
    251  1.1  pgoyette 		if (period < sc->sc_min_t || period > sc->sc_max_t)
    252  1.1  pgoyette 			return EINVAL;
    253  1.3  riastrad 
    254  1.1  pgoyette 		/* Stop the TCO timer, */
    255  1.1  pgoyette 		tcotimer_stop(sc);
    256  1.1  pgoyette 
    257  1.1  pgoyette 		/* set the timeout, */
    258  1.4  riastrad 		switch (sc->sc_version) {
    259  1.4  riastrad 		case TCO_VERSION_RCBA:
    260  1.1  pgoyette 			/* ICH6 or newer */
    261  1.8  riastrad 			ich6period = bus_space_read_2(sc->sc_tcot, sc->sc_tcoh,
    262  1.9  riastrad 			    TCO_TMR2);
    263  1.1  pgoyette 			ich6period &= 0xfc00;
    264  1.8  riastrad 			bus_space_write_2(sc->sc_tcot, sc->sc_tcoh,
    265  1.9  riastrad 			    TCO_TMR2, ich6period | period);
    266  1.4  riastrad 			break;
    267  1.4  riastrad 		case TCO_VERSION_PCIB:
    268  1.1  pgoyette 			/* ICH5 or older */
    269  1.8  riastrad 			ich5period = bus_space_read_1(sc->sc_tcot, sc->sc_tcoh,
    270  1.9  riastrad 			    TCO_TMR);
    271  1.1  pgoyette 			ich5period &= 0xc0;
    272  1.8  riastrad 			bus_space_write_1(sc->sc_tcot, sc->sc_tcoh,
    273  1.9  riastrad 			    TCO_TMR, ich5period | period);
    274  1.4  riastrad 			break;
    275  1.1  pgoyette 		}
    276  1.1  pgoyette 
    277  1.1  pgoyette 		/* and start/reload the timer. */
    278  1.1  pgoyette 		tcotimer_start(sc);
    279  1.1  pgoyette 		tcotimer_tickle(smw);
    280  1.1  pgoyette 	}
    281  1.1  pgoyette 
    282  1.1  pgoyette 	return 0;
    283  1.1  pgoyette }
    284  1.1  pgoyette 
    285  1.1  pgoyette static int
    286  1.1  pgoyette tcotimer_tickle(struct sysmon_wdog *smw)
    287  1.1  pgoyette {
    288  1.1  pgoyette 	struct tco_softc *sc = smw->smw_cookie;
    289  1.1  pgoyette 
    290  1.1  pgoyette 	/* any value is allowed */
    291  1.4  riastrad 	switch (sc->sc_version) {
    292  1.4  riastrad 	case TCO_VERSION_RCBA:
    293  1.9  riastrad 		bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO_RLD, 1);
    294  1.4  riastrad 		break;
    295  1.4  riastrad 	case TCO_VERSION_PCIB:
    296  1.9  riastrad 		bus_space_write_1(sc->sc_tcot, sc->sc_tcoh, TCO_RLD, 1);
    297  1.4  riastrad 		break;
    298  1.4  riastrad 	}
    299  1.1  pgoyette 
    300  1.1  pgoyette 	return 0;
    301  1.1  pgoyette }
    302  1.1  pgoyette 
    303  1.1  pgoyette static void
    304  1.1  pgoyette tcotimer_stop(struct tco_softc *sc)
    305  1.1  pgoyette {
    306  1.1  pgoyette 	uint16_t ioreg;
    307  1.1  pgoyette 
    308  1.9  riastrad 	ioreg = bus_space_read_2(sc->sc_tcot, sc->sc_tcoh, TCO1_CNT);
    309  1.9  riastrad 	ioreg |= TCO1_CNT_TCO_TMR_HLT;
    310  1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO1_CNT, ioreg);
    311  1.1  pgoyette }
    312  1.1  pgoyette 
    313  1.1  pgoyette static void
    314  1.1  pgoyette tcotimer_start(struct tco_softc *sc)
    315  1.1  pgoyette {
    316  1.1  pgoyette 	uint16_t ioreg;
    317  1.1  pgoyette 
    318  1.9  riastrad 	ioreg = bus_space_read_2(sc->sc_tcot, sc->sc_tcoh, TCO1_CNT);
    319  1.9  riastrad 	ioreg &= ~TCO1_CNT_TCO_TMR_HLT;
    320  1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO1_CNT, ioreg);
    321  1.1  pgoyette }
    322  1.1  pgoyette 
    323  1.1  pgoyette static void
    324  1.1  pgoyette tcotimer_status_reset(struct tco_softc *sc)
    325  1.1  pgoyette {
    326  1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO1_STS,
    327  1.9  riastrad 	    TCO1_STS_TIMEOUT);
    328  1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO2_STS,
    329  1.9  riastrad 	    TCO2_STS_BOOT_STS);
    330  1.9  riastrad 	bus_space_write_2(sc->sc_tcot, sc->sc_tcoh, TCO2_STS,
    331  1.9  riastrad 	    TCO2_STS_SECONDS_TO_STS);
    332  1.1  pgoyette }
    333  1.1  pgoyette 
    334  1.1  pgoyette /*
    335  1.1  pgoyette  * Clear the No Reboot (NR) bit, this enables reboots when the timer
    336  1.1  pgoyette  * reaches the timeout for the second time.
    337  1.1  pgoyette  */
    338  1.1  pgoyette static int
    339  1.1  pgoyette tcotimer_disable_noreboot(device_t self)
    340  1.1  pgoyette {
    341  1.1  pgoyette 	struct tco_softc *sc = device_private(self);
    342  1.1  pgoyette 
    343  1.4  riastrad 	switch (sc->sc_version) {
    344  1.4  riastrad 	case TCO_VERSION_RCBA: {
    345  1.1  pgoyette 		uint32_t status;
    346  1.1  pgoyette 
    347  1.1  pgoyette 		status = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,
    348  1.1  pgoyette 		    LPCIB_GCS_OFFSET);
    349  1.1  pgoyette 		status &= ~LPCIB_GCS_NO_REBOOT;
    350  1.1  pgoyette 		bus_space_write_4(sc->sc_rcbat, sc->sc_rcbah,
    351  1.1  pgoyette 		    LPCIB_GCS_OFFSET, status);
    352  1.1  pgoyette 		status = bus_space_read_4(sc->sc_rcbat, sc->sc_rcbah,
    353  1.1  pgoyette 		    LPCIB_GCS_OFFSET);
    354  1.1  pgoyette 		if (status & LPCIB_GCS_NO_REBOOT)
    355  1.1  pgoyette 			goto error;
    356  1.4  riastrad 		break;
    357  1.4  riastrad 	}
    358  1.4  riastrad 	case TCO_VERSION_PCIB: {
    359  1.1  pgoyette 		pcireg_t pcireg;
    360  1.1  pgoyette 
    361  1.1  pgoyette 		pcireg = pci_conf_read(sc->sc_pcib->sc_pc, sc->sc_pcib->sc_tag,
    362  1.3  riastrad 		    LPCIB_PCI_GEN_STA);
    363  1.1  pgoyette 		if (pcireg & LPCIB_PCI_GEN_STA_NO_REBOOT) {
    364  1.1  pgoyette 			/* TCO timeout reset is disabled; try to enable it */
    365  1.1  pgoyette 			pcireg &= ~LPCIB_PCI_GEN_STA_NO_REBOOT;
    366  1.1  pgoyette 			pci_conf_write(sc->sc_pcib->sc_pc, sc->sc_pcib->sc_tag,
    367  1.3  riastrad 			    LPCIB_PCI_GEN_STA, pcireg);
    368  1.1  pgoyette 			if (pcireg & LPCIB_PCI_GEN_STA_NO_REBOOT)
    369  1.1  pgoyette 				goto error;
    370  1.1  pgoyette 		}
    371  1.4  riastrad 		break;
    372  1.4  riastrad 	}
    373  1.1  pgoyette 	}
    374  1.1  pgoyette 
    375  1.1  pgoyette 	return 0;
    376  1.1  pgoyette error:
    377  1.1  pgoyette 	aprint_error_dev(self, "TCO timer reboot disabled by hardware; "
    378  1.1  pgoyette 	    "hope SMBIOS properly handles it.\n");
    379  1.1  pgoyette 	return EINVAL;
    380  1.1  pgoyette }
    381  1.1  pgoyette 
    382  1.1  pgoyette MODULE(MODULE_CLASS_DRIVER, tco, "sysmon_wdog");
    383  1.1  pgoyette 
    384  1.1  pgoyette #ifdef _MODULE
    385  1.3  riastrad #include "ioconf.c"
    386  1.1  pgoyette #endif
    387  1.1  pgoyette 
    388  1.1  pgoyette static int
    389  1.1  pgoyette tco_modcmd(modcmd_t cmd, void *arg)
    390  1.1  pgoyette {
    391  1.1  pgoyette 	int ret = 0;
    392  1.1  pgoyette 
    393  1.1  pgoyette 	switch (cmd) {
    394  1.1  pgoyette 	case MODULE_CMD_INIT:
    395  1.1  pgoyette #ifdef _MODULE
    396  1.1  pgoyette 		ret = config_init_component(cfdriver_ioconf_tco,
    397  1.3  riastrad 		    cfattach_ioconf_tco,
    398  1.3  riastrad 		    cfdata_ioconf_tco);
    399  1.1  pgoyette #endif
    400  1.1  pgoyette 		break;
    401  1.1  pgoyette 	case MODULE_CMD_FINI:
    402  1.1  pgoyette #ifdef _MODULE
    403  1.1  pgoyette 		ret = config_fini_component(cfdriver_ioconf_tco,
    404  1.3  riastrad 		    cfattach_ioconf_tco,
    405  1.3  riastrad 		    cfdata_ioconf_tco);
    406  1.1  pgoyette #endif
    407  1.1  pgoyette 		break;
    408  1.1  pgoyette 	default:
    409  1.1  pgoyette 		ret = ENOTTY;
    410  1.1  pgoyette 	}
    411  1.1  pgoyette 
    412  1.1  pgoyette 	return ret;
    413  1.1  pgoyette }
    414