1 1.20 msaitoh /* $NetBSD: cpu_ucode_intel.c,v 1.20 2022/09/15 14:34:22 msaitoh Exp $ */ 2 1.17 maxv 3 1.1 drochner /* 4 1.17 maxv * Copyright (c) 2012, 2019 The NetBSD Foundation, Inc. 5 1.1 drochner * All rights reserved. 6 1.1 drochner * 7 1.1 drochner * This code is derived from software contributed to The NetBSD Foundation 8 1.17 maxv * by Matthias Drochner and Maxime Villard. 9 1.1 drochner * 10 1.1 drochner * Redistribution and use in source and binary forms, with or without 11 1.1 drochner * modification, are permitted provided that the following conditions 12 1.1 drochner * are met: 13 1.1 drochner * 1. Redistributions of source code must retain the above copyright 14 1.1 drochner * notice, this list of conditions and the following disclaimer. 15 1.1 drochner * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 drochner * notice, this list of conditions and the following disclaimer in the 17 1.1 drochner * documentation and/or other materials provided with the distribution. 18 1.1 drochner * 19 1.1 drochner * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 drochner * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 drochner * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 drochner * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 drochner * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 drochner * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 drochner * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 drochner * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 drochner * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 drochner * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 drochner * POSSIBILITY OF SUCH DAMAGE. 30 1.1 drochner */ 31 1.1 drochner 32 1.1 drochner #include <sys/cdefs.h> 33 1.20 msaitoh __KERNEL_RCSID(0, "$NetBSD: cpu_ucode_intel.c,v 1.20 2022/09/15 14:34:22 msaitoh Exp $"); 34 1.1 drochner 35 1.15 pgoyette #ifdef _KERNEL_OPT 36 1.1 drochner #include "opt_xen.h" 37 1.1 drochner #include "opt_cpu_ucode.h" 38 1.15 pgoyette #endif 39 1.1 drochner 40 1.1 drochner #include <sys/param.h> 41 1.1 drochner #include <sys/conf.h> 42 1.1 drochner #include <sys/cpuio.h> 43 1.1 drochner #include <sys/cpu.h> 44 1.1 drochner #include <sys/kmem.h> 45 1.1 drochner 46 1.1 drochner #include <machine/cpufunc.h> 47 1.1 drochner #include <machine/specialreg.h> 48 1.1 drochner #include <x86/cpu_ucode.h> 49 1.1 drochner 50 1.1 drochner static void 51 1.1 drochner intel_getcurrentucode(uint32_t *ucodeversion, int *platformid) 52 1.1 drochner { 53 1.1 drochner unsigned int unneeded_ids[4]; 54 1.1 drochner uint64_t msr; 55 1.1 drochner 56 1.1 drochner kpreempt_disable(); 57 1.1 drochner 58 1.6 msaitoh wrmsr(MSR_BIOS_SIGN, 0); 59 1.1 drochner x86_cpuid(0, unneeded_ids); 60 1.6 msaitoh msr = rdmsr(MSR_BIOS_SIGN); 61 1.1 drochner *ucodeversion = msr >> 32; 62 1.1 drochner 63 1.1 drochner kpreempt_enable(); 64 1.1 drochner 65 1.1 drochner msr = rdmsr(MSR_IA32_PLATFORM_ID); 66 1.1 drochner *platformid = ((int)(msr >> 50)) & 7; 67 1.1 drochner } 68 1.1 drochner 69 1.1 drochner int 70 1.13 christos cpu_ucode_intel_get_version(struct cpu_ucode_version *ucode, 71 1.13 christos void *ptr, size_t len) 72 1.1 drochner { 73 1.1 drochner struct cpu_info *ci = curcpu(); 74 1.13 christos struct cpu_ucode_version_intel1 *data = ptr; 75 1.1 drochner 76 1.1 drochner if (ucode->loader_version != CPU_UCODE_LOADER_INTEL1 || 77 1.4 msaitoh CPUID_TO_FAMILY(ci->ci_signature) < 6) 78 1.1 drochner return EOPNOTSUPP; 79 1.1 drochner 80 1.13 christos if (len < sizeof(*data)) 81 1.13 christos return ENOSPC; 82 1.1 drochner 83 1.13 christos intel_getcurrentucode(&data->ucodeversion, &data->platformid); 84 1.13 christos return 0; 85 1.1 drochner } 86 1.1 drochner 87 1.1 drochner int 88 1.1 drochner cpu_ucode_intel_firmware_open(firmware_handle_t *fwh, const char *fwname) 89 1.1 drochner { 90 1.1 drochner const char *fw_path = "cpu_x86_intel1"; 91 1.1 drochner uint32_t ucodeversion, cpu_signature; 92 1.17 maxv char cpuspec[11]; 93 1.1 drochner int platformid; 94 1.1 drochner 95 1.1 drochner if (fwname != NULL && fwname[0] != '\0') 96 1.1 drochner return firmware_open(fw_path, fwname, fwh); 97 1.1 drochner 98 1.1 drochner cpu_signature = curcpu()->ci_signature; 99 1.4 msaitoh if (CPUID_TO_FAMILY(cpu_signature) < 6) 100 1.1 drochner return EOPNOTSUPP; 101 1.1 drochner 102 1.1 drochner intel_getcurrentucode(&ucodeversion, &platformid); 103 1.5 christos snprintf(cpuspec, sizeof(cpuspec), "%08x-%d", cpu_signature, 104 1.5 christos platformid); 105 1.1 drochner 106 1.1 drochner return firmware_open(fw_path, cpuspec, fwh); 107 1.1 drochner } 108 1.1 drochner 109 1.18 bouyer #ifndef XENPV 110 1.14 msaitoh static int 111 1.17 maxv cpu_ucode_intel_verify(struct cpu_ucode_softc *sc, 112 1.17 maxv struct intel1_ucode_header *buf) 113 1.14 msaitoh { 114 1.20 msaitoh struct intel1_ucode_ext_table *ehdr; 115 1.17 maxv uint32_t data_size, total_size, payload_size, ext_size; 116 1.14 msaitoh uint32_t sum; 117 1.20 msaitoh uint32_t *p; 118 1.14 msaitoh int i; 119 1.17 maxv 120 1.14 msaitoh if ((buf->uh_header_ver != 1) || (buf->uh_loader_rev != 1)) 121 1.14 msaitoh return EINVAL; 122 1.14 msaitoh 123 1.19 msaitoh /* Data size. */ 124 1.19 msaitoh if (buf->uh_data_size == 0) 125 1.14 msaitoh data_size = 2000; 126 1.19 msaitoh else 127 1.14 msaitoh data_size = buf->uh_data_size; 128 1.17 maxv if ((data_size % 4) != 0) 129 1.17 maxv return EINVAL; 130 1.17 maxv if (data_size > sc->sc_blobsize) 131 1.14 msaitoh return EINVAL; 132 1.14 msaitoh 133 1.19 msaitoh /* Total size. */ 134 1.19 msaitoh if (buf->uh_total_size == 0) 135 1.14 msaitoh total_size = data_size + 48; 136 1.19 msaitoh else 137 1.14 msaitoh total_size = buf->uh_total_size; 138 1.17 maxv if ((total_size % 1024) != 0) 139 1.17 maxv return EINVAL; 140 1.17 maxv if (total_size > sc->sc_blobsize) 141 1.14 msaitoh return EINVAL; 142 1.14 msaitoh 143 1.19 msaitoh /* Payload size. */ 144 1.14 msaitoh payload_size = data_size + 48; 145 1.17 maxv if (payload_size > sc->sc_blobsize) 146 1.17 maxv return EINVAL; 147 1.14 msaitoh 148 1.20 msaitoh /* Verify checksum of update data and header(s). */ 149 1.14 msaitoh sum = 0; 150 1.20 msaitoh p = (uint32_t *)buf; 151 1.20 msaitoh for (i = 0; i < (payload_size / sizeof(uint32_t)); i++) 152 1.20 msaitoh sum += p[i]; 153 1.17 maxv if (sum != 0) 154 1.14 msaitoh return EINVAL; 155 1.17 maxv 156 1.17 maxv ext_size = total_size - payload_size; 157 1.20 msaitoh if (ext_size > 0) { 158 1.20 msaitoh /* This image has extended signature table. */ 159 1.20 msaitoh ehdr = (struct intel1_ucode_ext_table *) 160 1.20 msaitoh ((uint8_t *)buf + sizeof(struct intel1_ucode_header) + 161 1.20 msaitoh data_size); 162 1.20 msaitoh payload_size = 163 1.20 msaitoh sizeof(struct intel1_ucode_ext_table) + 164 1.20 msaitoh sizeof(struct intel1_ucode_proc_signature) * 165 1.20 msaitoh ehdr->uet_count; 166 1.20 msaitoh 167 1.20 msaitoh sum = 0; 168 1.20 msaitoh p = (uint32_t *)ehdr; 169 1.20 msaitoh for (i = 0; i < (payload_size / sizeof(uint32_t)); i++) 170 1.20 msaitoh sum += p[i]; 171 1.20 msaitoh if (sum != 0) 172 1.20 msaitoh return EINVAL; 173 1.20 msaitoh } 174 1.14 msaitoh 175 1.14 msaitoh return 0; 176 1.14 msaitoh } 177 1.14 msaitoh 178 1.1 drochner int 179 1.1 drochner cpu_ucode_intel_apply(struct cpu_ucode_softc *sc, int cpuno) 180 1.1 drochner { 181 1.1 drochner uint32_t ucodetarget, oucodeversion, nucodeversion; 182 1.1 drochner struct intel1_ucode_header *uh; 183 1.17 maxv int platformid, cpuid, error; 184 1.17 maxv size_t newbufsize = 0; 185 1.9 mrg void *uha; 186 1.1 drochner 187 1.17 maxv if (sc->loader_version != CPU_UCODE_LOADER_INTEL1 || 188 1.17 maxv cpuno != CPU_UCODE_CURRENT_CPU) 189 1.1 drochner return EINVAL; 190 1.1 drochner 191 1.17 maxv uh = (struct intel1_ucode_header *)sc->sc_blob; 192 1.17 maxv 193 1.17 maxv error = cpu_ucode_intel_verify(sc, uh); 194 1.17 maxv if (error != 0) 195 1.17 maxv return error; 196 1.14 msaitoh 197 1.1 drochner ucodetarget = uh->uh_rev; 198 1.1 drochner 199 1.17 maxv if (((uintptr_t)sc->sc_blob) & 15) { 200 1.17 maxv /* Make the buffer 16 byte aligned. */ 201 1.7 msaitoh newbufsize = sc->sc_blobsize + 15; 202 1.9 mrg uha = kmem_alloc(newbufsize, KM_SLEEP); 203 1.19 msaitoh uh = 204 1.19 msaitoh (struct intel1_ucode_header *)roundup2((uintptr_t)uha, 16); 205 1.7 msaitoh memcpy(uh, sc->sc_blob, sc->sc_blobsize); 206 1.7 msaitoh } 207 1.7 msaitoh 208 1.1 drochner kpreempt_disable(); 209 1.1 drochner 210 1.1 drochner intel_getcurrentucode(&oucodeversion, &platformid); 211 1.1 drochner if (oucodeversion >= ucodetarget) { 212 1.1 drochner kpreempt_enable(); 213 1.17 maxv error = EEXIST; 214 1.7 msaitoh goto out; 215 1.1 drochner } 216 1.16 maxv 217 1.16 maxv /* 218 1.16 maxv * Perform update. On some platforms a cache invalidation is 219 1.16 maxv * required. 220 1.16 maxv */ 221 1.16 maxv wbinvd(); 222 1.9 mrg wrmsr(MSR_BIOS_UPDT_TRIG, (uintptr_t)uh + 48); 223 1.16 maxv 224 1.1 drochner intel_getcurrentucode(&nucodeversion, &platformid); 225 1.10 jym cpuid = curcpu()->ci_index; 226 1.1 drochner 227 1.1 drochner kpreempt_enable(); 228 1.1 drochner 229 1.7 msaitoh if (nucodeversion != ucodetarget) { 230 1.17 maxv error = EIO; 231 1.7 msaitoh goto out; 232 1.7 msaitoh } 233 1.1 drochner 234 1.17 maxv printf("cpu %d: ucode 0x%x->0x%x\n", cpuid, oucodeversion, 235 1.17 maxv nucodeversion); 236 1.17 maxv 237 1.7 msaitoh out: 238 1.7 msaitoh if (newbufsize != 0) 239 1.9 mrg kmem_free(uha, newbufsize); 240 1.17 maxv return error; 241 1.1 drochner } 242 1.3 gdt #endif /* ! XEN */ 243