cpu_ucode_intel.c revision 1.18 1 1.18 bouyer /* $NetBSD: cpu_ucode_intel.c,v 1.18 2020/04/25 15:26:18 bouyer Exp $ */
2 1.17 maxv
3 1.1 drochner /*
4 1.17 maxv * Copyright (c) 2012, 2019 The NetBSD Foundation, Inc.
5 1.1 drochner * All rights reserved.
6 1.1 drochner *
7 1.1 drochner * This code is derived from software contributed to The NetBSD Foundation
8 1.17 maxv * by Matthias Drochner and Maxime Villard.
9 1.1 drochner *
10 1.1 drochner * Redistribution and use in source and binary forms, with or without
11 1.1 drochner * modification, are permitted provided that the following conditions
12 1.1 drochner * are met:
13 1.1 drochner * 1. Redistributions of source code must retain the above copyright
14 1.1 drochner * notice, this list of conditions and the following disclaimer.
15 1.1 drochner * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 drochner * notice, this list of conditions and the following disclaimer in the
17 1.1 drochner * documentation and/or other materials provided with the distribution.
18 1.1 drochner *
19 1.1 drochner * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 drochner * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 drochner * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 drochner * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 drochner * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 drochner * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 drochner * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 drochner * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 drochner * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 drochner * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 drochner * POSSIBILITY OF SUCH DAMAGE.
30 1.1 drochner */
31 1.1 drochner
32 1.1 drochner #include <sys/cdefs.h>
33 1.18 bouyer __KERNEL_RCSID(0, "$NetBSD: cpu_ucode_intel.c,v 1.18 2020/04/25 15:26:18 bouyer Exp $");
34 1.1 drochner
35 1.15 pgoyette #ifdef _KERNEL_OPT
36 1.1 drochner #include "opt_xen.h"
37 1.1 drochner #include "opt_cpu_ucode.h"
38 1.15 pgoyette #endif
39 1.1 drochner
40 1.1 drochner #include <sys/param.h>
41 1.1 drochner #include <sys/conf.h>
42 1.1 drochner #include <sys/cpuio.h>
43 1.1 drochner #include <sys/cpu.h>
44 1.1 drochner #include <sys/kmem.h>
45 1.1 drochner
46 1.1 drochner #include <machine/cpufunc.h>
47 1.1 drochner #include <machine/specialreg.h>
48 1.1 drochner #include <x86/cpu_ucode.h>
49 1.1 drochner
50 1.1 drochner static void
51 1.1 drochner intel_getcurrentucode(uint32_t *ucodeversion, int *platformid)
52 1.1 drochner {
53 1.1 drochner unsigned int unneeded_ids[4];
54 1.1 drochner uint64_t msr;
55 1.1 drochner
56 1.1 drochner kpreempt_disable();
57 1.1 drochner
58 1.6 msaitoh wrmsr(MSR_BIOS_SIGN, 0);
59 1.1 drochner x86_cpuid(0, unneeded_ids);
60 1.6 msaitoh msr = rdmsr(MSR_BIOS_SIGN);
61 1.1 drochner *ucodeversion = msr >> 32;
62 1.1 drochner
63 1.1 drochner kpreempt_enable();
64 1.1 drochner
65 1.1 drochner msr = rdmsr(MSR_IA32_PLATFORM_ID);
66 1.1 drochner *platformid = ((int)(msr >> 50)) & 7;
67 1.1 drochner }
68 1.1 drochner
69 1.1 drochner int
70 1.13 christos cpu_ucode_intel_get_version(struct cpu_ucode_version *ucode,
71 1.13 christos void *ptr, size_t len)
72 1.1 drochner {
73 1.1 drochner struct cpu_info *ci = curcpu();
74 1.13 christos struct cpu_ucode_version_intel1 *data = ptr;
75 1.1 drochner
76 1.1 drochner if (ucode->loader_version != CPU_UCODE_LOADER_INTEL1 ||
77 1.4 msaitoh CPUID_TO_FAMILY(ci->ci_signature) < 6)
78 1.1 drochner return EOPNOTSUPP;
79 1.1 drochner
80 1.13 christos if (len < sizeof(*data))
81 1.13 christos return ENOSPC;
82 1.1 drochner
83 1.13 christos intel_getcurrentucode(&data->ucodeversion, &data->platformid);
84 1.13 christos return 0;
85 1.1 drochner }
86 1.1 drochner
87 1.1 drochner int
88 1.1 drochner cpu_ucode_intel_firmware_open(firmware_handle_t *fwh, const char *fwname)
89 1.1 drochner {
90 1.1 drochner const char *fw_path = "cpu_x86_intel1";
91 1.1 drochner uint32_t ucodeversion, cpu_signature;
92 1.17 maxv char cpuspec[11];
93 1.1 drochner int platformid;
94 1.1 drochner
95 1.1 drochner if (fwname != NULL && fwname[0] != '\0')
96 1.1 drochner return firmware_open(fw_path, fwname, fwh);
97 1.1 drochner
98 1.1 drochner cpu_signature = curcpu()->ci_signature;
99 1.4 msaitoh if (CPUID_TO_FAMILY(cpu_signature) < 6)
100 1.1 drochner return EOPNOTSUPP;
101 1.1 drochner
102 1.1 drochner intel_getcurrentucode(&ucodeversion, &platformid);
103 1.5 christos snprintf(cpuspec, sizeof(cpuspec), "%08x-%d", cpu_signature,
104 1.5 christos platformid);
105 1.1 drochner
106 1.1 drochner return firmware_open(fw_path, cpuspec, fwh);
107 1.1 drochner }
108 1.1 drochner
109 1.18 bouyer #ifndef XENPV
110 1.14 msaitoh static int
111 1.17 maxv cpu_ucode_intel_verify(struct cpu_ucode_softc *sc,
112 1.17 maxv struct intel1_ucode_header *buf)
113 1.14 msaitoh {
114 1.17 maxv uint32_t data_size, total_size, payload_size, ext_size;
115 1.14 msaitoh uint32_t sum;
116 1.14 msaitoh int i;
117 1.17 maxv
118 1.14 msaitoh if ((buf->uh_header_ver != 1) || (buf->uh_loader_rev != 1))
119 1.14 msaitoh return EINVAL;
120 1.14 msaitoh
121 1.17 maxv /*
122 1.17 maxv * Data size.
123 1.17 maxv */
124 1.17 maxv if (buf->uh_data_size == 0) {
125 1.14 msaitoh data_size = 2000;
126 1.17 maxv } else {
127 1.14 msaitoh data_size = buf->uh_data_size;
128 1.17 maxv }
129 1.17 maxv if ((data_size % 4) != 0)
130 1.17 maxv return EINVAL;
131 1.17 maxv if (data_size > sc->sc_blobsize)
132 1.14 msaitoh return EINVAL;
133 1.14 msaitoh
134 1.17 maxv /*
135 1.17 maxv * Total size.
136 1.17 maxv */
137 1.17 maxv if (buf->uh_total_size == 0) {
138 1.14 msaitoh total_size = data_size + 48;
139 1.17 maxv } else {
140 1.14 msaitoh total_size = buf->uh_total_size;
141 1.17 maxv }
142 1.17 maxv if ((total_size % 1024) != 0)
143 1.17 maxv return EINVAL;
144 1.17 maxv if (total_size > sc->sc_blobsize)
145 1.14 msaitoh return EINVAL;
146 1.14 msaitoh
147 1.17 maxv /*
148 1.17 maxv * Payload size.
149 1.17 maxv */
150 1.14 msaitoh payload_size = data_size + 48;
151 1.17 maxv if (payload_size > sc->sc_blobsize)
152 1.17 maxv return EINVAL;
153 1.14 msaitoh
154 1.14 msaitoh /*
155 1.17 maxv * Verify checksum of update data and header. Exclude extended
156 1.17 maxv * signature.
157 1.14 msaitoh */
158 1.14 msaitoh sum = 0;
159 1.17 maxv for (i = 0; i < (payload_size / sizeof(uint32_t)); i++) {
160 1.14 msaitoh sum += *((uint32_t *)buf + i);
161 1.17 maxv }
162 1.17 maxv if (sum != 0)
163 1.14 msaitoh return EINVAL;
164 1.17 maxv
165 1.17 maxv /*
166 1.17 maxv * Extended table size. Ignored for now.
167 1.17 maxv */
168 1.17 maxv ext_size = total_size - payload_size;
169 1.17 maxv if (ext_size > 0) {
170 1.17 maxv printf("This image has extended signature table.");
171 1.14 msaitoh }
172 1.14 msaitoh
173 1.14 msaitoh return 0;
174 1.14 msaitoh }
175 1.14 msaitoh
176 1.1 drochner int
177 1.1 drochner cpu_ucode_intel_apply(struct cpu_ucode_softc *sc, int cpuno)
178 1.1 drochner {
179 1.1 drochner uint32_t ucodetarget, oucodeversion, nucodeversion;
180 1.1 drochner struct intel1_ucode_header *uh;
181 1.17 maxv int platformid, cpuid, error;
182 1.17 maxv size_t newbufsize = 0;
183 1.9 mrg void *uha;
184 1.1 drochner
185 1.17 maxv if (sc->loader_version != CPU_UCODE_LOADER_INTEL1 ||
186 1.17 maxv cpuno != CPU_UCODE_CURRENT_CPU)
187 1.1 drochner return EINVAL;
188 1.1 drochner
189 1.17 maxv uh = (struct intel1_ucode_header *)sc->sc_blob;
190 1.17 maxv
191 1.17 maxv error = cpu_ucode_intel_verify(sc, uh);
192 1.17 maxv if (error != 0)
193 1.17 maxv return error;
194 1.14 msaitoh
195 1.1 drochner ucodetarget = uh->uh_rev;
196 1.1 drochner
197 1.17 maxv if (((uintptr_t)sc->sc_blob) & 15) {
198 1.17 maxv /* Make the buffer 16 byte aligned. */
199 1.7 msaitoh newbufsize = sc->sc_blobsize + 15;
200 1.9 mrg uha = kmem_alloc(newbufsize, KM_SLEEP);
201 1.9 mrg uh = (struct intel1_ucode_header *)roundup2((uintptr_t)uha, 16);
202 1.7 msaitoh memcpy(uh, sc->sc_blob, sc->sc_blobsize);
203 1.7 msaitoh }
204 1.7 msaitoh
205 1.1 drochner kpreempt_disable();
206 1.1 drochner
207 1.1 drochner intel_getcurrentucode(&oucodeversion, &platformid);
208 1.1 drochner if (oucodeversion >= ucodetarget) {
209 1.1 drochner kpreempt_enable();
210 1.17 maxv error = EEXIST;
211 1.7 msaitoh goto out;
212 1.1 drochner }
213 1.16 maxv
214 1.16 maxv /*
215 1.16 maxv * Perform update. On some platforms a cache invalidation is
216 1.16 maxv * required.
217 1.16 maxv */
218 1.16 maxv wbinvd();
219 1.9 mrg wrmsr(MSR_BIOS_UPDT_TRIG, (uintptr_t)uh + 48);
220 1.16 maxv
221 1.1 drochner intel_getcurrentucode(&nucodeversion, &platformid);
222 1.10 jym cpuid = curcpu()->ci_index;
223 1.1 drochner
224 1.1 drochner kpreempt_enable();
225 1.1 drochner
226 1.7 msaitoh if (nucodeversion != ucodetarget) {
227 1.17 maxv error = EIO;
228 1.7 msaitoh goto out;
229 1.7 msaitoh }
230 1.1 drochner
231 1.17 maxv printf("cpu %d: ucode 0x%x->0x%x\n", cpuid, oucodeversion,
232 1.17 maxv nucodeversion);
233 1.17 maxv
234 1.7 msaitoh out:
235 1.7 msaitoh if (newbufsize != 0)
236 1.9 mrg kmem_free(uha, newbufsize);
237 1.17 maxv return error;
238 1.1 drochner }
239 1.3 gdt #endif /* ! XEN */
240