hypervisor.h revision 1.8.2.6 1 1.8.2.6 skrll /* $NetBSD: hypervisor.h,v 1.8.2.6 2005/04/01 14:29:10 skrll Exp $ */
2 1.8.2.2 skrll
3 1.8.2.2 skrll /*
4 1.8.2.2 skrll *
5 1.8.2.2 skrll * Communication to/from hypervisor.
6 1.8.2.2 skrll *
7 1.8.2.6 skrll * Copyright (c) 2002-2004, K A Fraser
8 1.8.2.2 skrll *
9 1.8.2.2 skrll * Permission is hereby granted, free of charge, to any person obtaining a copy
10 1.8.2.6 skrll * of this source file (the "Software"), to deal in the Software without
11 1.8.2.6 skrll * restriction, including without limitation the rights to use, copy, modify,
12 1.8.2.6 skrll * merge, publish, distribute, sublicense, and/or sell copies of the Software,
13 1.8.2.6 skrll * and to permit persons to whom the Software is furnished to do so, subject to
14 1.8.2.6 skrll * the following conditions:
15 1.8.2.2 skrll *
16 1.8.2.2 skrll * The above copyright notice and this permission notice shall be included in
17 1.8.2.2 skrll * all copies or substantial portions of the Software.
18 1.8.2.2 skrll *
19 1.8.2.6 skrll * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 1.8.2.6 skrll * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 1.8.2.6 skrll * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22 1.8.2.6 skrll * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 1.8.2.6 skrll * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 1.8.2.6 skrll * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 1.8.2.6 skrll * IN THE SOFTWARE.
26 1.8.2.2 skrll */
27 1.8.2.2 skrll
28 1.8.2.2 skrll
29 1.8.2.2 skrll #ifndef _XEN_HYPERVISOR_H_
30 1.8.2.2 skrll #define _XEN_HYPERVISOR_H_
31 1.8.2.2 skrll
32 1.8.2.2 skrll
33 1.8.2.2 skrll struct hypervisor_attach_args {
34 1.8.2.2 skrll const char *haa_busname;
35 1.8.2.2 skrll };
36 1.8.2.2 skrll
37 1.8.2.2 skrll struct xencons_attach_args {
38 1.8.2.2 skrll const char *xa_device;
39 1.8.2.2 skrll };
40 1.8.2.2 skrll
41 1.8.2.2 skrll struct xen_npx_attach_args {
42 1.8.2.2 skrll const char *xa_device;
43 1.8.2.2 skrll };
44 1.8.2.2 skrll
45 1.8.2.2 skrll
46 1.8.2.6 skrll #define u8 uint8_t
47 1.8.2.2 skrll #define u16 uint16_t
48 1.8.2.2 skrll #define u32 uint32_t
49 1.8.2.2 skrll #define u64 uint64_t
50 1.8.2.6 skrll #define s8 int8_t
51 1.8.2.6 skrll #define s16 int16_t
52 1.8.2.6 skrll #define s32 int32_t
53 1.8.2.6 skrll #define s64 int64_t
54 1.8.2.6 skrll
55 1.8.2.6 skrll #include <machine/xen-public/xen.h>
56 1.8.2.6 skrll #include <machine/xen-public/dom0_ops.h>
57 1.8.2.6 skrll #include <machine/xen-public/event_channel.h>
58 1.8.2.6 skrll #include <machine/xen-public/physdev.h>
59 1.8.2.6 skrll #include <machine/xen-public/io/domain_controller.h>
60 1.8.2.6 skrll #include <machine/xen-public/io/netif.h>
61 1.8.2.6 skrll #include <machine/xen-public/io/blkif.h>
62 1.8.2.2 skrll
63 1.8.2.6 skrll #undef u8
64 1.8.2.2 skrll #undef u16
65 1.8.2.2 skrll #undef u32
66 1.8.2.2 skrll #undef u64
67 1.8.2.6 skrll #undef s8
68 1.8.2.6 skrll #undef s16
69 1.8.2.6 skrll #undef s32
70 1.8.2.6 skrll #undef s64
71 1.8.2.2 skrll
72 1.8.2.2 skrll
73 1.8.2.2 skrll /*
74 1.8.2.2 skrll * a placeholder for the start of day information passed up from the hypervisor
75 1.8.2.2 skrll */
76 1.8.2.2 skrll union start_info_union
77 1.8.2.2 skrll {
78 1.8.2.2 skrll start_info_t start_info;
79 1.8.2.2 skrll char padding[512];
80 1.8.2.2 skrll };
81 1.8.2.2 skrll extern union start_info_union start_info_union;
82 1.8.2.2 skrll #define xen_start_info (start_info_union.start_info)
83 1.8.2.2 skrll
84 1.8.2.2 skrll
85 1.8.2.2 skrll /* hypervisor.c */
86 1.8.2.6 skrll struct intrframe;
87 1.8.2.6 skrll void do_hypervisor_callback(struct intrframe *regs);
88 1.8.2.6 skrll void hypervisor_notify_via_evtchn(unsigned int);
89 1.8.2.6 skrll void hypervisor_enable_irq(unsigned int);
90 1.8.2.6 skrll void hypervisor_disable_irq(unsigned int);
91 1.8.2.6 skrll void hypervisor_acknowledge_irq(unsigned int);
92 1.8.2.6 skrll
93 1.8.2.6 skrll /* hypervisor_machdep.c */
94 1.8.2.6 skrll void hypervisor_unmask_event(unsigned int);
95 1.8.2.6 skrll void hypervisor_mask_event(unsigned int);
96 1.8.2.6 skrll void hypervisor_clear_event(unsigned int);
97 1.8.2.6 skrll void hypervisor_force_callback(void);
98 1.8.2.2 skrll
99 1.8.2.2 skrll /*
100 1.8.2.2 skrll * Assembler stubs for hyper-calls.
101 1.8.2.2 skrll */
102 1.8.2.2 skrll
103 1.8.2.6 skrll static inline int
104 1.8.2.6 skrll HYPERVISOR_set_trap_table(trap_info_t *table)
105 1.8.2.2 skrll {
106 1.8.2.2 skrll int ret;
107 1.8.2.6 skrll unsigned long ign1;
108 1.8.2.6 skrll
109 1.8.2.2 skrll __asm__ __volatile__ (
110 1.8.2.2 skrll TRAP_INSTR
111 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
112 1.8.2.6 skrll : "0" (__HYPERVISOR_set_trap_table), "1" (table)
113 1.8.2.6 skrll : "memory" );
114 1.8.2.2 skrll
115 1.8.2.2 skrll return ret;
116 1.8.2.2 skrll }
117 1.8.2.2 skrll
118 1.8.2.6 skrll static inline int
119 1.8.2.6 skrll HYPERVISOR_mmu_update(mmu_update_t *req, int count, int *success_count)
120 1.8.2.2 skrll {
121 1.8.2.2 skrll int ret;
122 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
123 1.8.2.6 skrll
124 1.8.2.2 skrll __asm__ __volatile__ (
125 1.8.2.2 skrll TRAP_INSTR
126 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
127 1.8.2.6 skrll : "0" (__HYPERVISOR_mmu_update), "1" (req), "2" (count),
128 1.8.2.6 skrll "3" (success_count)
129 1.8.2.6 skrll : "memory" );
130 1.8.2.2 skrll
131 1.8.2.2 skrll return ret;
132 1.8.2.2 skrll }
133 1.8.2.2 skrll
134 1.8.2.6 skrll static inline int
135 1.8.2.6 skrll HYPERVISOR_set_gdt(unsigned long *frame_list, int entries)
136 1.8.2.2 skrll {
137 1.8.2.2 skrll int ret;
138 1.8.2.6 skrll unsigned long ign1, ign2;
139 1.8.2.6 skrll
140 1.8.2.2 skrll __asm__ __volatile__ (
141 1.8.2.2 skrll TRAP_INSTR
142 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
143 1.8.2.6 skrll : "0" (__HYPERVISOR_set_gdt), "1" (frame_list), "2" (entries)
144 1.8.2.6 skrll : "memory" );
145 1.8.2.2 skrll
146 1.8.2.2 skrll return ret;
147 1.8.2.2 skrll }
148 1.8.2.2 skrll
149 1.8.2.6 skrll static inline int
150 1.8.2.6 skrll HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp)
151 1.8.2.2 skrll {
152 1.8.2.2 skrll int ret;
153 1.8.2.6 skrll unsigned long ign1, ign2;
154 1.8.2.6 skrll
155 1.8.2.2 skrll __asm__ __volatile__ (
156 1.8.2.2 skrll TRAP_INSTR
157 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
158 1.8.2.6 skrll : "0" (__HYPERVISOR_stack_switch), "1" (ss), "2" (esp)
159 1.8.2.6 skrll : "memory" );
160 1.8.2.2 skrll
161 1.8.2.6 skrll return ret;
162 1.8.2.6 skrll }
163 1.8.2.6 skrll
164 1.8.2.6 skrll static inline int
165 1.8.2.6 skrll HYPERVISOR_set_callbacks(
166 1.8.2.6 skrll unsigned long event_selector, unsigned long event_address,
167 1.8.2.6 skrll unsigned long failsafe_selector, unsigned long failsafe_address)
168 1.8.2.6 skrll {
169 1.8.2.6 skrll int ret;
170 1.8.2.6 skrll unsigned long ign1, ign2, ign3, ign4;
171 1.8.2.6 skrll
172 1.8.2.6 skrll __asm__ __volatile__ (
173 1.8.2.6 skrll TRAP_INSTR
174 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
175 1.8.2.6 skrll : "0" (__HYPERVISOR_set_callbacks), "1" (event_selector),
176 1.8.2.6 skrll "2" (event_address), "3" (failsafe_selector), "4" (failsafe_address)
177 1.8.2.6 skrll : "memory" );
178 1.8.2.2 skrll
179 1.8.2.2 skrll return ret;
180 1.8.2.2 skrll }
181 1.8.2.2 skrll
182 1.8.2.6 skrll static inline int
183 1.8.2.6 skrll HYPERVISOR_fpu_taskswitch(void)
184 1.8.2.2 skrll {
185 1.8.2.2 skrll int ret;
186 1.8.2.2 skrll __asm__ __volatile__ (
187 1.8.2.2 skrll TRAP_INSTR
188 1.8.2.6 skrll : "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) : "memory" );
189 1.8.2.2 skrll
190 1.8.2.6 skrll return ret;
191 1.8.2.6 skrll }
192 1.8.2.6 skrll
193 1.8.2.6 skrll static inline int
194 1.8.2.6 skrll HYPERVISOR_yield(void)
195 1.8.2.6 skrll {
196 1.8.2.6 skrll int ret;
197 1.8.2.6 skrll unsigned long ign1;
198 1.8.2.6 skrll
199 1.8.2.6 skrll __asm__ __volatile__ (
200 1.8.2.6 skrll TRAP_INSTR
201 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
202 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_yield)
203 1.8.2.6 skrll : "memory" );
204 1.8.2.2 skrll
205 1.8.2.2 skrll return ret;
206 1.8.2.2 skrll }
207 1.8.2.2 skrll
208 1.8.2.6 skrll static inline int
209 1.8.2.6 skrll HYPERVISOR_block(void)
210 1.8.2.2 skrll {
211 1.8.2.2 skrll int ret;
212 1.8.2.6 skrll unsigned long ign1;
213 1.8.2.6 skrll
214 1.8.2.2 skrll __asm__ __volatile__ (
215 1.8.2.2 skrll TRAP_INSTR
216 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
217 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_block)
218 1.8.2.6 skrll : "memory" );
219 1.8.2.2 skrll
220 1.8.2.2 skrll return ret;
221 1.8.2.2 skrll }
222 1.8.2.2 skrll
223 1.8.2.6 skrll static inline int
224 1.8.2.6 skrll HYPERVISOR_shutdown(void)
225 1.8.2.2 skrll {
226 1.8.2.2 skrll int ret;
227 1.8.2.6 skrll unsigned long ign1;
228 1.8.2.6 skrll
229 1.8.2.2 skrll __asm__ __volatile__ (
230 1.8.2.2 skrll TRAP_INSTR
231 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
232 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op),
233 1.8.2.6 skrll "1" (SCHEDOP_shutdown | (SHUTDOWN_poweroff << SCHEDOP_reasonshift))
234 1.8.2.6 skrll : "memory" );
235 1.8.2.2 skrll
236 1.8.2.2 skrll return ret;
237 1.8.2.2 skrll }
238 1.8.2.2 skrll
239 1.8.2.6 skrll static inline int
240 1.8.2.6 skrll HYPERVISOR_reboot(void)
241 1.8.2.2 skrll {
242 1.8.2.2 skrll int ret;
243 1.8.2.6 skrll unsigned long ign1;
244 1.8.2.6 skrll
245 1.8.2.2 skrll __asm__ __volatile__ (
246 1.8.2.2 skrll TRAP_INSTR
247 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
248 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op),
249 1.8.2.6 skrll "1" (SCHEDOP_shutdown | (SHUTDOWN_reboot << SCHEDOP_reasonshift))
250 1.8.2.6 skrll : "memory" );
251 1.8.2.2 skrll
252 1.8.2.2 skrll return ret;
253 1.8.2.2 skrll }
254 1.8.2.2 skrll
255 1.8.2.6 skrll static inline int
256 1.8.2.6 skrll HYPERVISOR_suspend(unsigned long srec)
257 1.8.2.2 skrll {
258 1.8.2.2 skrll int ret;
259 1.8.2.6 skrll unsigned long ign1, ign2;
260 1.8.2.6 skrll
261 1.8.2.6 skrll /* NB. On suspend, control software expects a suspend record in %esi. */
262 1.8.2.2 skrll __asm__ __volatile__ (
263 1.8.2.2 skrll TRAP_INSTR
264 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=S" (ign2)
265 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op),
266 1.8.2.6 skrll "b" (SCHEDOP_shutdown | (SHUTDOWN_suspend << SCHEDOP_reasonshift)),
267 1.8.2.6 skrll "S" (srec) : "memory");
268 1.8.2.2 skrll
269 1.8.2.2 skrll return ret;
270 1.8.2.2 skrll }
271 1.8.2.2 skrll
272 1.8.2.6 skrll static inline long
273 1.8.2.6 skrll HYPERVISOR_set_timer_op(uint64_t timeout)
274 1.8.2.2 skrll {
275 1.8.2.2 skrll int ret;
276 1.8.2.6 skrll unsigned long timeout_hi = (unsigned long)(timeout>>32);
277 1.8.2.6 skrll unsigned long timeout_lo = (unsigned long)timeout;
278 1.8.2.6 skrll unsigned long ign1, ign2;
279 1.8.2.6 skrll
280 1.8.2.2 skrll __asm__ __volatile__ (
281 1.8.2.2 skrll TRAP_INSTR
282 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
283 1.8.2.6 skrll : "0" (__HYPERVISOR_set_timer_op), "b" (timeout_hi), "c" (timeout_lo)
284 1.8.2.6 skrll : "memory");
285 1.8.2.2 skrll
286 1.8.2.2 skrll return ret;
287 1.8.2.2 skrll }
288 1.8.2.2 skrll
289 1.8.2.6 skrll static inline int
290 1.8.2.6 skrll HYPERVISOR_dom0_op(dom0_op_t *dom0_op)
291 1.8.2.2 skrll {
292 1.8.2.2 skrll int ret;
293 1.8.2.6 skrll unsigned long ign1;
294 1.8.2.6 skrll
295 1.8.2.6 skrll dom0_op->interface_version = DOM0_INTERFACE_VERSION;
296 1.8.2.2 skrll __asm__ __volatile__ (
297 1.8.2.2 skrll TRAP_INSTR
298 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
299 1.8.2.6 skrll : "0" (__HYPERVISOR_dom0_op), "1" (dom0_op)
300 1.8.2.6 skrll : "memory");
301 1.8.2.2 skrll
302 1.8.2.2 skrll return ret;
303 1.8.2.2 skrll }
304 1.8.2.2 skrll
305 1.8.2.6 skrll static inline int
306 1.8.2.6 skrll HYPERVISOR_set_debugreg(int reg, unsigned long value)
307 1.8.2.2 skrll {
308 1.8.2.2 skrll int ret;
309 1.8.2.6 skrll unsigned long ign1, ign2;
310 1.8.2.6 skrll
311 1.8.2.2 skrll __asm__ __volatile__ (
312 1.8.2.2 skrll TRAP_INSTR
313 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
314 1.8.2.6 skrll : "0" (__HYPERVISOR_set_debugreg), "1" (reg), "2" (value)
315 1.8.2.6 skrll : "memory" );
316 1.8.2.2 skrll
317 1.8.2.2 skrll return ret;
318 1.8.2.2 skrll }
319 1.8.2.2 skrll
320 1.8.2.6 skrll static inline unsigned long
321 1.8.2.6 skrll HYPERVISOR_get_debugreg(int reg)
322 1.8.2.6 skrll {
323 1.8.2.6 skrll unsigned long ret;
324 1.8.2.6 skrll unsigned long ign1;
325 1.8.2.6 skrll
326 1.8.2.6 skrll __asm__ __volatile__ (
327 1.8.2.6 skrll TRAP_INSTR
328 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
329 1.8.2.6 skrll : "0" (__HYPERVISOR_get_debugreg), "1" (reg)
330 1.8.2.6 skrll : "memory" );
331 1.8.2.6 skrll
332 1.8.2.6 skrll return ret;
333 1.8.2.6 skrll }
334 1.8.2.6 skrll
335 1.8.2.6 skrll static inline int
336 1.8.2.6 skrll HYPERVISOR_update_descriptor(unsigned long pa, unsigned long word1,
337 1.8.2.6 skrll unsigned long word2)
338 1.8.2.2 skrll {
339 1.8.2.2 skrll int ret;
340 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
341 1.8.2.6 skrll
342 1.8.2.2 skrll __asm__ __volatile__ (
343 1.8.2.2 skrll TRAP_INSTR
344 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
345 1.8.2.6 skrll : "0" (__HYPERVISOR_update_descriptor), "1" (pa), "2" (word1),
346 1.8.2.6 skrll "3" (word2)
347 1.8.2.6 skrll : "memory" );
348 1.8.2.2 skrll
349 1.8.2.2 skrll return ret;
350 1.8.2.2 skrll }
351 1.8.2.2 skrll
352 1.8.2.6 skrll static inline int
353 1.8.2.6 skrll HYPERVISOR_set_fast_trap(int idx)
354 1.8.2.2 skrll {
355 1.8.2.2 skrll int ret;
356 1.8.2.6 skrll unsigned long ign1;
357 1.8.2.6 skrll
358 1.8.2.2 skrll __asm__ __volatile__ (
359 1.8.2.2 skrll TRAP_INSTR
360 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
361 1.8.2.6 skrll : "0" (__HYPERVISOR_set_fast_trap), "1" (idx)
362 1.8.2.6 skrll : "memory" );
363 1.8.2.2 skrll
364 1.8.2.2 skrll return ret;
365 1.8.2.2 skrll }
366 1.8.2.2 skrll
367 1.8.2.6 skrll static inline int
368 1.8.2.6 skrll HYPERVISOR_dom_mem_op(unsigned int op, unsigned long *extent_list,
369 1.8.2.6 skrll unsigned long nr_extents, unsigned int extent_order)
370 1.8.2.2 skrll {
371 1.8.2.2 skrll int ret;
372 1.8.2.6 skrll unsigned long ign1, ign2, ign3, ign4, ign5;
373 1.8.2.6 skrll
374 1.8.2.2 skrll __asm__ __volatile__ (
375 1.8.2.2 skrll TRAP_INSTR
376 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4),
377 1.8.2.6 skrll "=D" (ign5)
378 1.8.2.6 skrll : "0" (__HYPERVISOR_dom_mem_op), "1" (op), "2" (extent_list),
379 1.8.2.6 skrll "3" (nr_extents), "4" (extent_order), "5" (DOMID_SELF)
380 1.8.2.6 skrll : "memory" );
381 1.8.2.2 skrll
382 1.8.2.2 skrll return ret;
383 1.8.2.2 skrll }
384 1.8.2.2 skrll
385 1.8.2.6 skrll static inline int
386 1.8.2.6 skrll HYPERVISOR_multicall(void *call_list, int nr_calls)
387 1.8.2.2 skrll {
388 1.8.2.2 skrll int ret;
389 1.8.2.6 skrll unsigned long ign1, ign2;
390 1.8.2.6 skrll
391 1.8.2.2 skrll __asm__ __volatile__ (
392 1.8.2.2 skrll TRAP_INSTR
393 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
394 1.8.2.6 skrll : "0" (__HYPERVISOR_multicall), "1" (call_list), "2" (nr_calls)
395 1.8.2.6 skrll : "memory" );
396 1.8.2.2 skrll
397 1.8.2.2 skrll return ret;
398 1.8.2.2 skrll }
399 1.8.2.2 skrll
400 1.8.2.6 skrll static inline int
401 1.8.2.6 skrll HYPERVISOR_update_va_mapping(unsigned long page_nr, unsigned long new_val,
402 1.8.2.6 skrll unsigned long flags)
403 1.8.2.2 skrll {
404 1.8.2.6 skrll int ret;
405 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
406 1.8.2.6 skrll
407 1.8.2.2 skrll __asm__ __volatile__ (
408 1.8.2.2 skrll TRAP_INSTR
409 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
410 1.8.2.6 skrll : "0" (__HYPERVISOR_update_va_mapping),
411 1.8.2.6 skrll "1" (page_nr), "2" (new_val), "3" (flags)
412 1.8.2.6 skrll : "memory" );
413 1.8.2.6 skrll
414 1.8.2.6 skrll #ifdef notdef
415 1.8.2.6 skrll if (__predict_false(ret < 0))
416 1.8.2.6 skrll panic("Failed update VA mapping: %08lx, %08lx, %08lx",
417 1.8.2.6 skrll page_nr, new_val, flags);
418 1.8.2.6 skrll #endif
419 1.8.2.2 skrll
420 1.8.2.2 skrll return ret;
421 1.8.2.2 skrll }
422 1.8.2.2 skrll
423 1.8.2.6 skrll static inline int
424 1.8.2.6 skrll HYPERVISOR_event_channel_op(void *op)
425 1.8.2.2 skrll {
426 1.8.2.2 skrll int ret;
427 1.8.2.6 skrll unsigned long ign1;
428 1.8.2.6 skrll
429 1.8.2.2 skrll __asm__ __volatile__ (
430 1.8.2.2 skrll TRAP_INSTR
431 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
432 1.8.2.6 skrll : "0" (__HYPERVISOR_event_channel_op), "1" (op)
433 1.8.2.6 skrll : "memory" );
434 1.8.2.2 skrll
435 1.8.2.2 skrll return ret;
436 1.8.2.2 skrll }
437 1.8.2.2 skrll
438 1.8.2.6 skrll static inline int
439 1.8.2.6 skrll HYPERVISOR_xen_version(int cmd)
440 1.8.2.2 skrll {
441 1.8.2.2 skrll int ret;
442 1.8.2.6 skrll unsigned long ign1;
443 1.8.2.6 skrll
444 1.8.2.2 skrll __asm__ __volatile__ (
445 1.8.2.2 skrll TRAP_INSTR
446 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
447 1.8.2.6 skrll : "0" (__HYPERVISOR_xen_version), "1" (cmd)
448 1.8.2.6 skrll : "memory" );
449 1.8.2.2 skrll
450 1.8.2.2 skrll return ret;
451 1.8.2.2 skrll }
452 1.8.2.2 skrll
453 1.8.2.6 skrll static inline int
454 1.8.2.6 skrll HYPERVISOR_console_io(int cmd, int count, char *str)
455 1.8.2.2 skrll {
456 1.8.2.2 skrll int ret;
457 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
458 1.8.2.6 skrll
459 1.8.2.2 skrll __asm__ __volatile__ (
460 1.8.2.2 skrll TRAP_INSTR
461 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
462 1.8.2.6 skrll : "0" (__HYPERVISOR_console_io), "1" (cmd), "2" (count), "3" (str)
463 1.8.2.6 skrll : "memory" );
464 1.8.2.2 skrll
465 1.8.2.2 skrll return ret;
466 1.8.2.2 skrll }
467 1.8.2.2 skrll
468 1.8.2.6 skrll static inline int
469 1.8.2.6 skrll HYPERVISOR_physdev_op(void *physdev_op)
470 1.8.2.2 skrll {
471 1.8.2.2 skrll int ret;
472 1.8.2.6 skrll unsigned long ign1;
473 1.8.2.6 skrll
474 1.8.2.2 skrll __asm__ __volatile__ (
475 1.8.2.2 skrll TRAP_INSTR
476 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
477 1.8.2.6 skrll : "0" (__HYPERVISOR_physdev_op), "1" (physdev_op)
478 1.8.2.6 skrll : "memory" );
479 1.8.2.2 skrll
480 1.8.2.2 skrll return ret;
481 1.8.2.2 skrll }
482 1.8.2.2 skrll
483 1.8.2.6 skrll static inline int
484 1.8.2.6 skrll HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count)
485 1.8.2.2 skrll {
486 1.8.2.2 skrll int ret;
487 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
488 1.8.2.6 skrll
489 1.8.2.2 skrll __asm__ __volatile__ (
490 1.8.2.2 skrll TRAP_INSTR
491 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
492 1.8.2.6 skrll : "0" (__HYPERVISOR_grant_table_op), "1" (cmd), "2" (count), "3" (uop)
493 1.8.2.6 skrll : "memory" );
494 1.8.2.2 skrll
495 1.8.2.2 skrll return ret;
496 1.8.2.2 skrll }
497 1.8.2.2 skrll
498 1.8.2.6 skrll static inline int
499 1.8.2.6 skrll HYPERVISOR_update_va_mapping_otherdomain(unsigned long page_nr,
500 1.8.2.6 skrll unsigned long new_val, unsigned long flags, domid_t domid)
501 1.8.2.2 skrll {
502 1.8.2.2 skrll int ret;
503 1.8.2.6 skrll unsigned long ign1, ign2, ign3, ign4;
504 1.8.2.6 skrll
505 1.8.2.2 skrll __asm__ __volatile__ (
506 1.8.2.2 skrll TRAP_INSTR
507 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
508 1.8.2.6 skrll : "0" (__HYPERVISOR_update_va_mapping_otherdomain),
509 1.8.2.6 skrll "1" (page_nr), "2" (new_val), "3" (flags), "4" (domid) :
510 1.8.2.6 skrll "memory" );
511 1.8.2.6 skrll
512 1.8.2.6 skrll return ret;
513 1.8.2.6 skrll }
514 1.8.2.2 skrll
515 1.8.2.6 skrll static inline int
516 1.8.2.6 skrll HYPERVISOR_vm_assist(unsigned int cmd, unsigned int type)
517 1.8.2.6 skrll {
518 1.8.2.6 skrll int ret;
519 1.8.2.6 skrll unsigned long ign1, ign2;
520 1.8.2.6 skrll
521 1.8.2.6 skrll __asm__ __volatile__ (
522 1.8.2.6 skrll TRAP_INSTR
523 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
524 1.8.2.6 skrll : "0" (__HYPERVISOR_vm_assist), "1" (cmd), "2" (type)
525 1.8.2.6 skrll : "memory" );
526 1.8.2.2 skrll
527 1.8.2.2 skrll return ret;
528 1.8.2.2 skrll }
529 1.8.2.2 skrll
530 1.8.2.2 skrll #endif /* _XEN_HYPERVISOR_H_ */
531