hypervisor.h revision 1.8.2.7 1 1.8.2.7 skrll /* $NetBSD: hypervisor.h,v 1.8.2.7 2005/11/10 14:00:34 skrll Exp $ */
2 1.8.2.2 skrll
3 1.8.2.2 skrll /*
4 1.8.2.2 skrll *
5 1.8.2.2 skrll * Communication to/from hypervisor.
6 1.8.2.2 skrll *
7 1.8.2.6 skrll * Copyright (c) 2002-2004, K A Fraser
8 1.8.2.2 skrll *
9 1.8.2.2 skrll * Permission is hereby granted, free of charge, to any person obtaining a copy
10 1.8.2.6 skrll * of this source file (the "Software"), to deal in the Software without
11 1.8.2.6 skrll * restriction, including without limitation the rights to use, copy, modify,
12 1.8.2.6 skrll * merge, publish, distribute, sublicense, and/or sell copies of the Software,
13 1.8.2.6 skrll * and to permit persons to whom the Software is furnished to do so, subject to
14 1.8.2.6 skrll * the following conditions:
15 1.8.2.2 skrll *
16 1.8.2.2 skrll * The above copyright notice and this permission notice shall be included in
17 1.8.2.2 skrll * all copies or substantial portions of the Software.
18 1.8.2.2 skrll *
19 1.8.2.6 skrll * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 1.8.2.6 skrll * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 1.8.2.6 skrll * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22 1.8.2.6 skrll * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 1.8.2.6 skrll * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 1.8.2.6 skrll * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 1.8.2.6 skrll * IN THE SOFTWARE.
26 1.8.2.2 skrll */
27 1.8.2.2 skrll
28 1.8.2.2 skrll
29 1.8.2.2 skrll #ifndef _XEN_HYPERVISOR_H_
30 1.8.2.2 skrll #define _XEN_HYPERVISOR_H_
31 1.8.2.2 skrll
32 1.8.2.2 skrll
33 1.8.2.2 skrll struct hypervisor_attach_args {
34 1.8.2.2 skrll const char *haa_busname;
35 1.8.2.2 skrll };
36 1.8.2.2 skrll
37 1.8.2.2 skrll struct xencons_attach_args {
38 1.8.2.2 skrll const char *xa_device;
39 1.8.2.2 skrll };
40 1.8.2.2 skrll
41 1.8.2.2 skrll struct xen_npx_attach_args {
42 1.8.2.2 skrll const char *xa_device;
43 1.8.2.2 skrll };
44 1.8.2.2 skrll
45 1.8.2.2 skrll
46 1.8.2.6 skrll #define u8 uint8_t
47 1.8.2.2 skrll #define u16 uint16_t
48 1.8.2.2 skrll #define u32 uint32_t
49 1.8.2.2 skrll #define u64 uint64_t
50 1.8.2.6 skrll #define s8 int8_t
51 1.8.2.6 skrll #define s16 int16_t
52 1.8.2.6 skrll #define s32 int32_t
53 1.8.2.6 skrll #define s64 int64_t
54 1.8.2.6 skrll
55 1.8.2.6 skrll #include <machine/xen-public/xen.h>
56 1.8.2.6 skrll #include <machine/xen-public/dom0_ops.h>
57 1.8.2.6 skrll #include <machine/xen-public/event_channel.h>
58 1.8.2.6 skrll #include <machine/xen-public/physdev.h>
59 1.8.2.6 skrll #include <machine/xen-public/io/domain_controller.h>
60 1.8.2.6 skrll #include <machine/xen-public/io/netif.h>
61 1.8.2.6 skrll #include <machine/xen-public/io/blkif.h>
62 1.8.2.2 skrll
63 1.8.2.6 skrll #undef u8
64 1.8.2.2 skrll #undef u16
65 1.8.2.2 skrll #undef u32
66 1.8.2.2 skrll #undef u64
67 1.8.2.6 skrll #undef s8
68 1.8.2.6 skrll #undef s16
69 1.8.2.6 skrll #undef s32
70 1.8.2.6 skrll #undef s64
71 1.8.2.2 skrll
72 1.8.2.2 skrll
73 1.8.2.2 skrll /*
74 1.8.2.2 skrll * a placeholder for the start of day information passed up from the hypervisor
75 1.8.2.2 skrll */
76 1.8.2.2 skrll union start_info_union
77 1.8.2.2 skrll {
78 1.8.2.2 skrll start_info_t start_info;
79 1.8.2.2 skrll char padding[512];
80 1.8.2.2 skrll };
81 1.8.2.2 skrll extern union start_info_union start_info_union;
82 1.8.2.2 skrll #define xen_start_info (start_info_union.start_info)
83 1.8.2.2 skrll
84 1.8.2.2 skrll
85 1.8.2.2 skrll /* hypervisor.c */
86 1.8.2.6 skrll struct intrframe;
87 1.8.2.6 skrll void do_hypervisor_callback(struct intrframe *regs);
88 1.8.2.7 skrll void hypervisor_enable_event(unsigned int);
89 1.8.2.6 skrll
90 1.8.2.6 skrll /* hypervisor_machdep.c */
91 1.8.2.6 skrll void hypervisor_unmask_event(unsigned int);
92 1.8.2.6 skrll void hypervisor_mask_event(unsigned int);
93 1.8.2.6 skrll void hypervisor_clear_event(unsigned int);
94 1.8.2.7 skrll void hypervisor_enable_ipl(unsigned int);
95 1.8.2.7 skrll void hypervisor_set_ipending(u_int32_t, int, int);
96 1.8.2.2 skrll
97 1.8.2.2 skrll /*
98 1.8.2.2 skrll * Assembler stubs for hyper-calls.
99 1.8.2.2 skrll */
100 1.8.2.2 skrll
101 1.8.2.6 skrll static inline int
102 1.8.2.6 skrll HYPERVISOR_set_trap_table(trap_info_t *table)
103 1.8.2.2 skrll {
104 1.8.2.2 skrll int ret;
105 1.8.2.6 skrll unsigned long ign1;
106 1.8.2.6 skrll
107 1.8.2.2 skrll __asm__ __volatile__ (
108 1.8.2.2 skrll TRAP_INSTR
109 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
110 1.8.2.6 skrll : "0" (__HYPERVISOR_set_trap_table), "1" (table)
111 1.8.2.6 skrll : "memory" );
112 1.8.2.2 skrll
113 1.8.2.2 skrll return ret;
114 1.8.2.2 skrll }
115 1.8.2.2 skrll
116 1.8.2.6 skrll static inline int
117 1.8.2.6 skrll HYPERVISOR_mmu_update(mmu_update_t *req, int count, int *success_count)
118 1.8.2.2 skrll {
119 1.8.2.2 skrll int ret;
120 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
121 1.8.2.6 skrll
122 1.8.2.2 skrll __asm__ __volatile__ (
123 1.8.2.2 skrll TRAP_INSTR
124 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
125 1.8.2.6 skrll : "0" (__HYPERVISOR_mmu_update), "1" (req), "2" (count),
126 1.8.2.6 skrll "3" (success_count)
127 1.8.2.6 skrll : "memory" );
128 1.8.2.2 skrll
129 1.8.2.2 skrll return ret;
130 1.8.2.2 skrll }
131 1.8.2.2 skrll
132 1.8.2.6 skrll static inline int
133 1.8.2.6 skrll HYPERVISOR_set_gdt(unsigned long *frame_list, int entries)
134 1.8.2.2 skrll {
135 1.8.2.2 skrll int ret;
136 1.8.2.6 skrll unsigned long ign1, ign2;
137 1.8.2.6 skrll
138 1.8.2.2 skrll __asm__ __volatile__ (
139 1.8.2.2 skrll TRAP_INSTR
140 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
141 1.8.2.6 skrll : "0" (__HYPERVISOR_set_gdt), "1" (frame_list), "2" (entries)
142 1.8.2.6 skrll : "memory" );
143 1.8.2.2 skrll
144 1.8.2.2 skrll return ret;
145 1.8.2.2 skrll }
146 1.8.2.2 skrll
147 1.8.2.6 skrll static inline int
148 1.8.2.6 skrll HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp)
149 1.8.2.2 skrll {
150 1.8.2.2 skrll int ret;
151 1.8.2.6 skrll unsigned long ign1, ign2;
152 1.8.2.6 skrll
153 1.8.2.2 skrll __asm__ __volatile__ (
154 1.8.2.2 skrll TRAP_INSTR
155 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
156 1.8.2.6 skrll : "0" (__HYPERVISOR_stack_switch), "1" (ss), "2" (esp)
157 1.8.2.6 skrll : "memory" );
158 1.8.2.2 skrll
159 1.8.2.6 skrll return ret;
160 1.8.2.6 skrll }
161 1.8.2.6 skrll
162 1.8.2.6 skrll static inline int
163 1.8.2.6 skrll HYPERVISOR_set_callbacks(
164 1.8.2.6 skrll unsigned long event_selector, unsigned long event_address,
165 1.8.2.6 skrll unsigned long failsafe_selector, unsigned long failsafe_address)
166 1.8.2.6 skrll {
167 1.8.2.6 skrll int ret;
168 1.8.2.6 skrll unsigned long ign1, ign2, ign3, ign4;
169 1.8.2.6 skrll
170 1.8.2.6 skrll __asm__ __volatile__ (
171 1.8.2.6 skrll TRAP_INSTR
172 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
173 1.8.2.6 skrll : "0" (__HYPERVISOR_set_callbacks), "1" (event_selector),
174 1.8.2.6 skrll "2" (event_address), "3" (failsafe_selector), "4" (failsafe_address)
175 1.8.2.6 skrll : "memory" );
176 1.8.2.2 skrll
177 1.8.2.2 skrll return ret;
178 1.8.2.2 skrll }
179 1.8.2.2 skrll
180 1.8.2.6 skrll static inline int
181 1.8.2.6 skrll HYPERVISOR_fpu_taskswitch(void)
182 1.8.2.2 skrll {
183 1.8.2.2 skrll int ret;
184 1.8.2.2 skrll __asm__ __volatile__ (
185 1.8.2.2 skrll TRAP_INSTR
186 1.8.2.6 skrll : "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) : "memory" );
187 1.8.2.2 skrll
188 1.8.2.6 skrll return ret;
189 1.8.2.6 skrll }
190 1.8.2.6 skrll
191 1.8.2.6 skrll static inline int
192 1.8.2.6 skrll HYPERVISOR_yield(void)
193 1.8.2.6 skrll {
194 1.8.2.6 skrll int ret;
195 1.8.2.6 skrll unsigned long ign1;
196 1.8.2.6 skrll
197 1.8.2.6 skrll __asm__ __volatile__ (
198 1.8.2.6 skrll TRAP_INSTR
199 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
200 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_yield)
201 1.8.2.6 skrll : "memory" );
202 1.8.2.2 skrll
203 1.8.2.2 skrll return ret;
204 1.8.2.2 skrll }
205 1.8.2.2 skrll
206 1.8.2.6 skrll static inline int
207 1.8.2.6 skrll HYPERVISOR_block(void)
208 1.8.2.2 skrll {
209 1.8.2.2 skrll int ret;
210 1.8.2.6 skrll unsigned long ign1;
211 1.8.2.6 skrll
212 1.8.2.2 skrll __asm__ __volatile__ (
213 1.8.2.2 skrll TRAP_INSTR
214 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
215 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_block)
216 1.8.2.6 skrll : "memory" );
217 1.8.2.2 skrll
218 1.8.2.2 skrll return ret;
219 1.8.2.2 skrll }
220 1.8.2.2 skrll
221 1.8.2.6 skrll static inline int
222 1.8.2.6 skrll HYPERVISOR_shutdown(void)
223 1.8.2.2 skrll {
224 1.8.2.2 skrll int ret;
225 1.8.2.6 skrll unsigned long ign1;
226 1.8.2.6 skrll
227 1.8.2.2 skrll __asm__ __volatile__ (
228 1.8.2.2 skrll TRAP_INSTR
229 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
230 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op),
231 1.8.2.6 skrll "1" (SCHEDOP_shutdown | (SHUTDOWN_poweroff << SCHEDOP_reasonshift))
232 1.8.2.6 skrll : "memory" );
233 1.8.2.2 skrll
234 1.8.2.2 skrll return ret;
235 1.8.2.2 skrll }
236 1.8.2.2 skrll
237 1.8.2.6 skrll static inline int
238 1.8.2.6 skrll HYPERVISOR_reboot(void)
239 1.8.2.2 skrll {
240 1.8.2.2 skrll int ret;
241 1.8.2.6 skrll unsigned long ign1;
242 1.8.2.6 skrll
243 1.8.2.2 skrll __asm__ __volatile__ (
244 1.8.2.2 skrll TRAP_INSTR
245 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
246 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op),
247 1.8.2.6 skrll "1" (SCHEDOP_shutdown | (SHUTDOWN_reboot << SCHEDOP_reasonshift))
248 1.8.2.6 skrll : "memory" );
249 1.8.2.2 skrll
250 1.8.2.2 skrll return ret;
251 1.8.2.2 skrll }
252 1.8.2.2 skrll
253 1.8.2.6 skrll static inline int
254 1.8.2.6 skrll HYPERVISOR_suspend(unsigned long srec)
255 1.8.2.2 skrll {
256 1.8.2.2 skrll int ret;
257 1.8.2.6 skrll unsigned long ign1, ign2;
258 1.8.2.6 skrll
259 1.8.2.6 skrll /* NB. On suspend, control software expects a suspend record in %esi. */
260 1.8.2.2 skrll __asm__ __volatile__ (
261 1.8.2.2 skrll TRAP_INSTR
262 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=S" (ign2)
263 1.8.2.6 skrll : "0" (__HYPERVISOR_sched_op),
264 1.8.2.6 skrll "b" (SCHEDOP_shutdown | (SHUTDOWN_suspend << SCHEDOP_reasonshift)),
265 1.8.2.6 skrll "S" (srec) : "memory");
266 1.8.2.2 skrll
267 1.8.2.2 skrll return ret;
268 1.8.2.2 skrll }
269 1.8.2.2 skrll
270 1.8.2.6 skrll static inline long
271 1.8.2.6 skrll HYPERVISOR_set_timer_op(uint64_t timeout)
272 1.8.2.2 skrll {
273 1.8.2.2 skrll int ret;
274 1.8.2.6 skrll unsigned long timeout_hi = (unsigned long)(timeout>>32);
275 1.8.2.6 skrll unsigned long timeout_lo = (unsigned long)timeout;
276 1.8.2.6 skrll unsigned long ign1, ign2;
277 1.8.2.6 skrll
278 1.8.2.2 skrll __asm__ __volatile__ (
279 1.8.2.2 skrll TRAP_INSTR
280 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
281 1.8.2.6 skrll : "0" (__HYPERVISOR_set_timer_op), "b" (timeout_hi), "c" (timeout_lo)
282 1.8.2.6 skrll : "memory");
283 1.8.2.2 skrll
284 1.8.2.2 skrll return ret;
285 1.8.2.2 skrll }
286 1.8.2.2 skrll
287 1.8.2.6 skrll static inline int
288 1.8.2.6 skrll HYPERVISOR_dom0_op(dom0_op_t *dom0_op)
289 1.8.2.2 skrll {
290 1.8.2.2 skrll int ret;
291 1.8.2.6 skrll unsigned long ign1;
292 1.8.2.6 skrll
293 1.8.2.6 skrll dom0_op->interface_version = DOM0_INTERFACE_VERSION;
294 1.8.2.2 skrll __asm__ __volatile__ (
295 1.8.2.2 skrll TRAP_INSTR
296 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
297 1.8.2.6 skrll : "0" (__HYPERVISOR_dom0_op), "1" (dom0_op)
298 1.8.2.6 skrll : "memory");
299 1.8.2.2 skrll
300 1.8.2.2 skrll return ret;
301 1.8.2.2 skrll }
302 1.8.2.2 skrll
303 1.8.2.6 skrll static inline int
304 1.8.2.6 skrll HYPERVISOR_set_debugreg(int reg, unsigned long value)
305 1.8.2.2 skrll {
306 1.8.2.2 skrll int ret;
307 1.8.2.6 skrll unsigned long ign1, ign2;
308 1.8.2.6 skrll
309 1.8.2.2 skrll __asm__ __volatile__ (
310 1.8.2.2 skrll TRAP_INSTR
311 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
312 1.8.2.6 skrll : "0" (__HYPERVISOR_set_debugreg), "1" (reg), "2" (value)
313 1.8.2.6 skrll : "memory" );
314 1.8.2.2 skrll
315 1.8.2.2 skrll return ret;
316 1.8.2.2 skrll }
317 1.8.2.2 skrll
318 1.8.2.6 skrll static inline unsigned long
319 1.8.2.6 skrll HYPERVISOR_get_debugreg(int reg)
320 1.8.2.6 skrll {
321 1.8.2.6 skrll unsigned long ret;
322 1.8.2.6 skrll unsigned long ign1;
323 1.8.2.6 skrll
324 1.8.2.6 skrll __asm__ __volatile__ (
325 1.8.2.6 skrll TRAP_INSTR
326 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
327 1.8.2.6 skrll : "0" (__HYPERVISOR_get_debugreg), "1" (reg)
328 1.8.2.6 skrll : "memory" );
329 1.8.2.6 skrll
330 1.8.2.6 skrll return ret;
331 1.8.2.6 skrll }
332 1.8.2.6 skrll
333 1.8.2.6 skrll static inline int
334 1.8.2.6 skrll HYPERVISOR_update_descriptor(unsigned long pa, unsigned long word1,
335 1.8.2.6 skrll unsigned long word2)
336 1.8.2.2 skrll {
337 1.8.2.2 skrll int ret;
338 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
339 1.8.2.6 skrll
340 1.8.2.2 skrll __asm__ __volatile__ (
341 1.8.2.2 skrll TRAP_INSTR
342 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
343 1.8.2.6 skrll : "0" (__HYPERVISOR_update_descriptor), "1" (pa), "2" (word1),
344 1.8.2.6 skrll "3" (word2)
345 1.8.2.6 skrll : "memory" );
346 1.8.2.2 skrll
347 1.8.2.2 skrll return ret;
348 1.8.2.2 skrll }
349 1.8.2.2 skrll
350 1.8.2.6 skrll static inline int
351 1.8.2.6 skrll HYPERVISOR_set_fast_trap(int idx)
352 1.8.2.2 skrll {
353 1.8.2.2 skrll int ret;
354 1.8.2.6 skrll unsigned long ign1;
355 1.8.2.6 skrll
356 1.8.2.2 skrll __asm__ __volatile__ (
357 1.8.2.2 skrll TRAP_INSTR
358 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
359 1.8.2.6 skrll : "0" (__HYPERVISOR_set_fast_trap), "1" (idx)
360 1.8.2.6 skrll : "memory" );
361 1.8.2.2 skrll
362 1.8.2.2 skrll return ret;
363 1.8.2.2 skrll }
364 1.8.2.2 skrll
365 1.8.2.6 skrll static inline int
366 1.8.2.6 skrll HYPERVISOR_dom_mem_op(unsigned int op, unsigned long *extent_list,
367 1.8.2.6 skrll unsigned long nr_extents, unsigned int extent_order)
368 1.8.2.2 skrll {
369 1.8.2.2 skrll int ret;
370 1.8.2.6 skrll unsigned long ign1, ign2, ign3, ign4, ign5;
371 1.8.2.6 skrll
372 1.8.2.2 skrll __asm__ __volatile__ (
373 1.8.2.2 skrll TRAP_INSTR
374 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4),
375 1.8.2.6 skrll "=D" (ign5)
376 1.8.2.6 skrll : "0" (__HYPERVISOR_dom_mem_op), "1" (op), "2" (extent_list),
377 1.8.2.6 skrll "3" (nr_extents), "4" (extent_order), "5" (DOMID_SELF)
378 1.8.2.6 skrll : "memory" );
379 1.8.2.2 skrll
380 1.8.2.2 skrll return ret;
381 1.8.2.2 skrll }
382 1.8.2.2 skrll
383 1.8.2.6 skrll static inline int
384 1.8.2.6 skrll HYPERVISOR_multicall(void *call_list, int nr_calls)
385 1.8.2.2 skrll {
386 1.8.2.2 skrll int ret;
387 1.8.2.6 skrll unsigned long ign1, ign2;
388 1.8.2.6 skrll
389 1.8.2.2 skrll __asm__ __volatile__ (
390 1.8.2.2 skrll TRAP_INSTR
391 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
392 1.8.2.6 skrll : "0" (__HYPERVISOR_multicall), "1" (call_list), "2" (nr_calls)
393 1.8.2.6 skrll : "memory" );
394 1.8.2.2 skrll
395 1.8.2.2 skrll return ret;
396 1.8.2.2 skrll }
397 1.8.2.2 skrll
398 1.8.2.6 skrll static inline int
399 1.8.2.6 skrll HYPERVISOR_update_va_mapping(unsigned long page_nr, unsigned long new_val,
400 1.8.2.6 skrll unsigned long flags)
401 1.8.2.2 skrll {
402 1.8.2.6 skrll int ret;
403 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
404 1.8.2.6 skrll
405 1.8.2.2 skrll __asm__ __volatile__ (
406 1.8.2.2 skrll TRAP_INSTR
407 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
408 1.8.2.6 skrll : "0" (__HYPERVISOR_update_va_mapping),
409 1.8.2.6 skrll "1" (page_nr), "2" (new_val), "3" (flags)
410 1.8.2.6 skrll : "memory" );
411 1.8.2.6 skrll
412 1.8.2.6 skrll #ifdef notdef
413 1.8.2.6 skrll if (__predict_false(ret < 0))
414 1.8.2.6 skrll panic("Failed update VA mapping: %08lx, %08lx, %08lx",
415 1.8.2.6 skrll page_nr, new_val, flags);
416 1.8.2.6 skrll #endif
417 1.8.2.2 skrll
418 1.8.2.2 skrll return ret;
419 1.8.2.2 skrll }
420 1.8.2.2 skrll
421 1.8.2.6 skrll static inline int
422 1.8.2.6 skrll HYPERVISOR_event_channel_op(void *op)
423 1.8.2.2 skrll {
424 1.8.2.2 skrll int ret;
425 1.8.2.6 skrll unsigned long ign1;
426 1.8.2.6 skrll
427 1.8.2.2 skrll __asm__ __volatile__ (
428 1.8.2.2 skrll TRAP_INSTR
429 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
430 1.8.2.6 skrll : "0" (__HYPERVISOR_event_channel_op), "1" (op)
431 1.8.2.6 skrll : "memory" );
432 1.8.2.2 skrll
433 1.8.2.2 skrll return ret;
434 1.8.2.2 skrll }
435 1.8.2.2 skrll
436 1.8.2.6 skrll static inline int
437 1.8.2.6 skrll HYPERVISOR_xen_version(int cmd)
438 1.8.2.2 skrll {
439 1.8.2.2 skrll int ret;
440 1.8.2.6 skrll unsigned long ign1;
441 1.8.2.6 skrll
442 1.8.2.2 skrll __asm__ __volatile__ (
443 1.8.2.2 skrll TRAP_INSTR
444 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
445 1.8.2.6 skrll : "0" (__HYPERVISOR_xen_version), "1" (cmd)
446 1.8.2.6 skrll : "memory" );
447 1.8.2.2 skrll
448 1.8.2.2 skrll return ret;
449 1.8.2.2 skrll }
450 1.8.2.2 skrll
451 1.8.2.6 skrll static inline int
452 1.8.2.6 skrll HYPERVISOR_console_io(int cmd, int count, char *str)
453 1.8.2.2 skrll {
454 1.8.2.2 skrll int ret;
455 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
456 1.8.2.6 skrll
457 1.8.2.2 skrll __asm__ __volatile__ (
458 1.8.2.2 skrll TRAP_INSTR
459 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
460 1.8.2.6 skrll : "0" (__HYPERVISOR_console_io), "1" (cmd), "2" (count), "3" (str)
461 1.8.2.6 skrll : "memory" );
462 1.8.2.2 skrll
463 1.8.2.2 skrll return ret;
464 1.8.2.2 skrll }
465 1.8.2.2 skrll
466 1.8.2.6 skrll static inline int
467 1.8.2.6 skrll HYPERVISOR_physdev_op(void *physdev_op)
468 1.8.2.2 skrll {
469 1.8.2.2 skrll int ret;
470 1.8.2.6 skrll unsigned long ign1;
471 1.8.2.6 skrll
472 1.8.2.2 skrll __asm__ __volatile__ (
473 1.8.2.2 skrll TRAP_INSTR
474 1.8.2.6 skrll : "=a" (ret), "=b" (ign1)
475 1.8.2.6 skrll : "0" (__HYPERVISOR_physdev_op), "1" (physdev_op)
476 1.8.2.6 skrll : "memory" );
477 1.8.2.2 skrll
478 1.8.2.2 skrll return ret;
479 1.8.2.2 skrll }
480 1.8.2.2 skrll
481 1.8.2.6 skrll static inline int
482 1.8.2.6 skrll HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count)
483 1.8.2.2 skrll {
484 1.8.2.2 skrll int ret;
485 1.8.2.6 skrll unsigned long ign1, ign2, ign3;
486 1.8.2.6 skrll
487 1.8.2.2 skrll __asm__ __volatile__ (
488 1.8.2.2 skrll TRAP_INSTR
489 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
490 1.8.2.6 skrll : "0" (__HYPERVISOR_grant_table_op), "1" (cmd), "2" (count), "3" (uop)
491 1.8.2.6 skrll : "memory" );
492 1.8.2.2 skrll
493 1.8.2.2 skrll return ret;
494 1.8.2.2 skrll }
495 1.8.2.2 skrll
496 1.8.2.6 skrll static inline int
497 1.8.2.6 skrll HYPERVISOR_update_va_mapping_otherdomain(unsigned long page_nr,
498 1.8.2.6 skrll unsigned long new_val, unsigned long flags, domid_t domid)
499 1.8.2.2 skrll {
500 1.8.2.2 skrll int ret;
501 1.8.2.6 skrll unsigned long ign1, ign2, ign3, ign4;
502 1.8.2.6 skrll
503 1.8.2.2 skrll __asm__ __volatile__ (
504 1.8.2.2 skrll TRAP_INSTR
505 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
506 1.8.2.6 skrll : "0" (__HYPERVISOR_update_va_mapping_otherdomain),
507 1.8.2.6 skrll "1" (page_nr), "2" (new_val), "3" (flags), "4" (domid) :
508 1.8.2.6 skrll "memory" );
509 1.8.2.6 skrll
510 1.8.2.6 skrll return ret;
511 1.8.2.6 skrll }
512 1.8.2.2 skrll
513 1.8.2.6 skrll static inline int
514 1.8.2.6 skrll HYPERVISOR_vm_assist(unsigned int cmd, unsigned int type)
515 1.8.2.6 skrll {
516 1.8.2.6 skrll int ret;
517 1.8.2.6 skrll unsigned long ign1, ign2;
518 1.8.2.6 skrll
519 1.8.2.6 skrll __asm__ __volatile__ (
520 1.8.2.6 skrll TRAP_INSTR
521 1.8.2.6 skrll : "=a" (ret), "=b" (ign1), "=c" (ign2)
522 1.8.2.6 skrll : "0" (__HYPERVISOR_vm_assist), "1" (cmd), "2" (type)
523 1.8.2.6 skrll : "memory" );
524 1.8.2.2 skrll
525 1.8.2.2 skrll return ret;
526 1.8.2.2 skrll }
527 1.8.2.2 skrll
528 1.8.2.7 skrll /*
529 1.8.2.7 skrll * Force a proper event-channel callback from Xen after clearing the
530 1.8.2.7 skrll * callback mask. We do this in a very simple manner, by making a call
531 1.8.2.7 skrll * down into Xen. The pending flag will be checked by Xen on return.
532 1.8.2.7 skrll */
533 1.8.2.7 skrll static inline void hypervisor_force_callback(void)
534 1.8.2.7 skrll {
535 1.8.2.7 skrll (void)HYPERVISOR_xen_version(0);
536 1.8.2.7 skrll } __attribute__((no_instrument_function)) /* used by mcount */
537 1.8.2.7 skrll
538 1.8.2.7 skrll static inline void
539 1.8.2.7 skrll hypervisor_notify_via_evtchn(unsigned int port)
540 1.8.2.7 skrll {
541 1.8.2.7 skrll evtchn_op_t op;
542 1.8.2.7 skrll
543 1.8.2.7 skrll op.cmd = EVTCHNOP_send;
544 1.8.2.7 skrll op.u.send.local_port = port;
545 1.8.2.7 skrll (void)HYPERVISOR_event_channel_op(&op);
546 1.8.2.7 skrll }
547 1.8.2.7 skrll
548 1.8.2.2 skrll #endif /* _XEN_HYPERVISOR_H_ */
549