hypervisor_machdep.c revision 1.31 1 /* $NetBSD: hypervisor_machdep.c,v 1.31 2018/11/18 10:24:09 cherry Exp $ */
2
3 /*
4 *
5 * Copyright (c) 2004 Christian Limpach.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /******************************************************************************
30 * hypervisor.c
31 *
32 * Communication to/from hypervisor.
33 *
34 * Copyright (c) 2002-2004, K A Fraser
35 *
36 * Permission is hereby granted, free of charge, to any person obtaining a copy
37 * of this software and associated documentation files (the "Software"), to
38 * deal in the Software without restriction, including without limitation the
39 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
40 * sell copies of the Software, and to permit persons to whom the Software is
41 * furnished to do so, subject to the following conditions:
42 *
43 * The above copyright notice and this permission notice shall be included in
44 * all copies or substantial portions of the Software.
45 *
46 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
47 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
48 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
49 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
50 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
51 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
52 * DEALINGS IN THE SOFTWARE.
53 */
54
55
56 #include <sys/cdefs.h>
57 __KERNEL_RCSID(0, "$NetBSD: hypervisor_machdep.c,v 1.31 2018/11/18 10:24:09 cherry Exp $");
58
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/kmem.h>
62
63 #include <uvm/uvm_extern.h>
64
65 #include <machine/vmparam.h>
66 #include <machine/pmap.h>
67
68 #include <xen/xen.h>
69 #include <xen/hypervisor.h>
70 #include <xen/evtchn.h>
71 #include <xen/xenpmap.h>
72
73 #include "opt_xen.h"
74 #include "isa.h"
75 #include "pci.h"
76
77 /*
78 * arch-dependent p2m frame lists list (L3 and L2)
79 * used by Xen for save/restore mappings
80 */
81 static unsigned long * l3_p2m_page;
82 static unsigned long * l2_p2m_page;
83 static int l2_p2m_page_size; /* size of L2 page, in pages */
84
85 static void build_p2m_frame_list_list(void);
86 static void update_p2m_frame_list_list(void);
87
88 // #define PORT_DEBUG 4
89 // #define EARLY_DEBUG_EVENT
90
91 /* callback function type */
92 typedef void (*iterate_func_t)(unsigned int, unsigned int,
93 unsigned int, void *);
94
95 static inline void
96 evt_iterate_bits(volatile unsigned long *pendingl1,
97 volatile unsigned long *pendingl2,
98 volatile unsigned long *mask,
99 iterate_func_t iterate_pending, void *iterate_args)
100 {
101
102 KASSERT(pendingl1 != NULL);
103 KASSERT(pendingl2 != NULL);
104
105 unsigned long l1, l2;
106 unsigned int l1i, l2i, port;
107
108 l1 = xen_atomic_xchg(pendingl1, 0);
109 while ((l1i = xen_ffs(l1)) != 0) {
110 l1i--;
111 l1 &= ~(1UL << l1i);
112
113 l2 = pendingl2[l1i] & (mask != NULL ? ~mask[l1i] : -1UL);
114 l2 &= curcpu()->ci_evtmask[l1i];
115
116 if (mask != NULL) xen_atomic_setbits_l(&mask[l1i], l2);
117 xen_atomic_clearbits_l(&pendingl2[l1i], l2);
118
119 while ((l2i = xen_ffs(l2)) != 0) {
120 l2i--;
121 l2 &= ~(1UL << l2i);
122
123 port = (l1i << LONG_SHIFT) + l2i;
124
125 iterate_pending(port, l1i, l2i, iterate_args);
126 }
127 }
128 }
129
130 /*
131 * Set per-cpu "pending" information for outstanding events that
132 * cannot be processed now.
133 */
134
135 static inline void
136 evt_set_pending(unsigned int port, unsigned int l1i,
137 unsigned int l2i, void *args)
138 {
139
140 KASSERT(args != NULL);
141
142 int *ret = args;
143
144 if (evtsource[port]) {
145 hypervisor_set_ipending(evtsource[port]->ev_imask, l1i, l2i);
146 evtsource[port]->ev_evcnt.ev_count++;
147 if (*ret == 0 && curcpu()->ci_ilevel <
148 evtsource[port]->ev_maxlevel)
149 *ret = 1;
150 }
151 #ifdef DOM0OPS
152 else {
153 /* set pending event */
154 xenevt_setipending(l1i, l2i);
155 }
156 #endif
157 }
158
159 int stipending(void);
160 int
161 stipending(void)
162 {
163 volatile shared_info_t *s = HYPERVISOR_shared_info;
164 struct cpu_info *ci;
165 volatile struct vcpu_info *vci;
166 int ret;
167
168 ret = 0;
169 ci = curcpu();
170 vci = ci->ci_vcpu;
171
172 #if 0
173 if (HYPERVISOR_shared_info->events)
174 printf("stipending events %08lx mask %08lx ilevel %d\n",
175 HYPERVISOR_shared_info->events,
176 HYPERVISOR_shared_info->events_mask, ci->ci_ilevel);
177 #endif
178
179 #ifdef EARLY_DEBUG_EVENT
180 if (xen_atomic_test_bit(&s->evtchn_pending[0], debug_port)) {
181 xen_debug_handler(NULL);
182 xen_atomic_clear_bit(&s->evtchn_pending[0], debug_port);
183 }
184 #endif
185
186 /*
187 * we're only called after STIC, so we know that we'll have to
188 * STI at the end
189 */
190
191 while (vci->evtchn_upcall_pending) {
192 cli();
193
194 vci->evtchn_upcall_pending = 0;
195
196 evt_iterate_bits(&vci->evtchn_pending_sel,
197 s->evtchn_pending, s->evtchn_mask,
198 evt_set_pending, &ret);
199
200 sti();
201 }
202
203 #if 0
204 if (ci->ci_ipending & 0x1)
205 printf("stipending events %08lx mask %08lx ilevel %d ipending %08x\n",
206 HYPERVISOR_shared_info->events,
207 HYPERVISOR_shared_info->events_mask, ci->ci_ilevel,
208 ci->ci_ipending);
209 #endif
210
211 return (ret);
212 }
213
214 /* Iterate through pending events and call the event handler */
215
216 static inline void
217 evt_do_hypervisor_callback(unsigned int port, unsigned int l1i,
218 unsigned int l2i, void *args)
219 {
220 KASSERT(args != NULL);
221
222 struct cpu_info *ci = curcpu();
223 struct intrframe *regs = args;
224
225 #ifdef PORT_DEBUG
226 if (port == PORT_DEBUG)
227 printf("do_hypervisor_callback event %d\n", port);
228 #endif
229 if (evtsource[port]) {
230 ci->ci_idepth++;
231 evtchn_do_event(port, regs);
232 ci->ci_idepth--;
233 }
234 #ifdef DOM0OPS
235 else {
236 if (ci->ci_ilevel < IPL_HIGH) {
237 /* fast path */
238 int oipl = ci->ci_ilevel;
239 ci->ci_ilevel = IPL_HIGH;
240 ci->ci_idepth++;
241 xenevt_event(port);
242 ci->ci_idepth--;
243 ci->ci_ilevel = oipl;
244 } else {
245 /* set pending event */
246 xenevt_setipending(l1i, l2i);
247 }
248 }
249 #endif
250 }
251
252 void
253 do_hypervisor_callback(struct intrframe *regs)
254 {
255 volatile shared_info_t *s = HYPERVISOR_shared_info;
256 struct cpu_info *ci;
257 volatile struct vcpu_info *vci;
258 int level __diagused;
259
260 ci = curcpu();
261 vci = ci->ci_vcpu;
262 level = ci->ci_ilevel;
263
264 /* Save trapframe for clock handler */
265 KASSERT(regs != NULL);
266 ci->ci_event_clockframe.cf_if = *regs;
267
268 // DDD printf("do_hypervisor_callback\n");
269
270 #ifdef EARLY_DEBUG_EVENT
271 if (xen_atomic_test_bit(&s->evtchn_pending[0], debug_port)) {
272 xen_debug_handler(NULL);
273 xen_atomic_clear_bit(&s->evtchn_pending[0], debug_port);
274 }
275 #endif
276
277 while (vci->evtchn_upcall_pending) {
278 vci->evtchn_upcall_pending = 0;
279
280 evt_iterate_bits(&vci->evtchn_pending_sel,
281 s->evtchn_pending, s->evtchn_mask,
282 evt_do_hypervisor_callback, regs);
283 }
284
285 #ifdef DIAGNOSTIC
286 if (level != ci->ci_ilevel)
287 printf("hypervisor done %08x level %d/%d ipending %08x\n",
288 (uint)vci->evtchn_pending_sel,
289 level, ci->ci_ilevel, ci->ci_ipending);
290 #endif
291 }
292
293 void
294 hypervisor_send_event(struct cpu_info *ci, unsigned int ev)
295 {
296 KASSERT(ci != NULL);
297
298 volatile shared_info_t *s = HYPERVISOR_shared_info;
299 volatile struct vcpu_info *vci = ci->ci_vcpu;
300
301 #ifdef PORT_DEBUG
302 if (ev == PORT_DEBUG)
303 printf("hypervisor_send_event %d\n", ev);
304 #endif
305
306 xen_atomic_set_bit(&s->evtchn_pending[0], ev);
307
308 if (__predict_false(ci == curcpu())) {
309 xen_atomic_set_bit(&vci->evtchn_pending_sel,
310 ev >> LONG_SHIFT);
311 xen_atomic_set_bit(&vci->evtchn_upcall_pending, 0);
312 }
313
314 xen_atomic_clear_bit(&s->evtchn_mask[0], ev);
315
316 if (__predict_true(ci == curcpu())) {
317 hypervisor_force_callback();
318 } else {
319 if (__predict_false(xen_send_ipi(ci, XEN_IPI_HVCB))) {
320 panic("xen_send_ipi(cpu%d, XEN_IPI_HVCB) failed\n",
321 (int) ci->ci_cpuid);
322 }
323 }
324 }
325
326 void
327 hypervisor_unmask_event(unsigned int ev)
328 {
329
330 KASSERT(ev > 0 && ev < NR_EVENT_CHANNELS);
331
332 #ifdef PORT_DEBUG
333 if (ev == PORT_DEBUG)
334 printf("hypervisor_unmask_event %d\n", ev);
335 #endif
336
337 /* Xen unmasks the evtchn_mask[0]:ev bit for us. */
338 evtchn_op_t op;
339 op.cmd = EVTCHNOP_unmask;
340 op.u.unmask.port = ev;
341 if (HYPERVISOR_event_channel_op(&op) != 0)
342 panic("Failed to unmask event %d\n", ev);
343
344 return;
345 }
346
347 void
348 hypervisor_mask_event(unsigned int ev)
349 {
350 volatile shared_info_t *s = HYPERVISOR_shared_info;
351 #ifdef PORT_DEBUG
352 if (ev == PORT_DEBUG)
353 printf("hypervisor_mask_event %d\n", ev);
354 #endif
355
356 xen_atomic_set_bit(&s->evtchn_mask[0], ev);
357 }
358
359 void
360 hypervisor_clear_event(unsigned int ev)
361 {
362 volatile shared_info_t *s = HYPERVISOR_shared_info;
363 #ifdef PORT_DEBUG
364 if (ev == PORT_DEBUG)
365 printf("hypervisor_clear_event %d\n", ev);
366 #endif
367
368 xen_atomic_clear_bit(&s->evtchn_pending[0], ev);
369 }
370
371 static inline void
372 evt_enable_event(unsigned int port, unsigned int l1i,
373 unsigned int l2i, void *args)
374 {
375 KASSERT(args == NULL);
376 hypervisor_unmask_event(port);
377 #if NPCI > 0 || NISA > 0
378 hypervisor_ack_pirq_event(port);
379 #endif /* NPCI > 0 || NISA > 0 */
380 }
381
382 void
383 hypervisor_enable_ipl(unsigned int ipl)
384 {
385 struct cpu_info *ci = curcpu();
386
387 /*
388 * enable all events for ipl. As we only set an event in ipl_evt_mask
389 * for its lowest IPL, and pending IPLs are processed high to low,
390 * we know that all callback for this event have been processed.
391 */
392
393 evt_iterate_bits(&ci->ci_isources[ipl]->ipl_evt_mask1,
394 ci->ci_isources[ipl]->ipl_evt_mask2, NULL,
395 evt_enable_event, NULL);
396
397 }
398
399 void
400 hypervisor_set_ipending(uint32_t iplmask, int l1, int l2)
401 {
402
403 /* This function is not re-entrant */
404 KASSERT(x86_read_psl() != 0);
405
406 int ipl;
407 struct cpu_info *ci = curcpu();
408
409 /* set pending bit for the appropriate IPLs */
410 ci->ci_ipending |= iplmask;
411
412 /*
413 * And set event pending bit for the lowest IPL. As IPL are handled
414 * from high to low, this ensure that all callbacks will have been
415 * called when we ack the event
416 */
417 ipl = ffs(iplmask);
418 KASSERT(ipl > 0);
419 ipl--;
420 KASSERT(ipl < NIPL);
421 KASSERT(ci->ci_isources[ipl] != NULL);
422 ci->ci_isources[ipl]->ipl_evt_mask1 |= 1UL << l1;
423 ci->ci_isources[ipl]->ipl_evt_mask2[l1] |= 1UL << l2;
424 if (__predict_false(ci != curcpu())) {
425 if (xen_send_ipi(ci, XEN_IPI_HVCB)) {
426 panic("hypervisor_set_ipending: "
427 "xen_send_ipi(cpu%d, XEN_IPI_HVCB) failed\n",
428 (int) ci->ci_cpuid);
429 }
430 }
431 }
432
433 void
434 hypervisor_machdep_attach(void)
435 {
436 /* dom0 does not require the arch-dependent P2M translation table */
437 if (!xendomain_is_dom0()) {
438 build_p2m_frame_list_list();
439 sysctl_xen_suspend_setup();
440 }
441 }
442
443 void
444 hypervisor_machdep_resume(void)
445 {
446 /* dom0 does not require the arch-dependent P2M translation table */
447 if (!xendomain_is_dom0())
448 update_p2m_frame_list_list();
449 }
450
451 /*
452 * Generate the p2m_frame_list_list table,
453 * needed for guest save/restore
454 */
455 static void
456 build_p2m_frame_list_list(void)
457 {
458 int fpp; /* number of page (frame) pointer per page */
459 unsigned long max_pfn;
460 /*
461 * The p2m list is composed of three levels of indirection,
462 * each layer containing MFNs pointing to lower level pages
463 * The indirection is used to convert a given PFN to its MFN
464 * Each N level page can point to @fpp (N-1) level pages
465 * For example, for x86 32bit, we have:
466 * - PAGE_SIZE: 4096 bytes
467 * - fpp: 1024 (one L3 page can address 1024 L2 pages)
468 * A L1 page contains the list of MFN we are looking for
469 */
470 max_pfn = xen_start_info.nr_pages;
471 fpp = PAGE_SIZE / sizeof(xen_pfn_t);
472
473 /* we only need one L3 page */
474 l3_p2m_page = (vaddr_t *)uvm_km_alloc(kernel_map, PAGE_SIZE,
475 PAGE_SIZE, UVM_KMF_WIRED | UVM_KMF_NOWAIT);
476 if (l3_p2m_page == NULL)
477 panic("could not allocate memory for l3_p2m_page");
478
479 /*
480 * Determine how many L2 pages we need for the mapping
481 * Each L2 can map a total of @fpp L1 pages
482 */
483 l2_p2m_page_size = howmany(max_pfn, fpp);
484
485 l2_p2m_page = (vaddr_t *)uvm_km_alloc(kernel_map,
486 l2_p2m_page_size * PAGE_SIZE,
487 PAGE_SIZE, UVM_KMF_WIRED | UVM_KMF_NOWAIT);
488 if (l2_p2m_page == NULL)
489 panic("could not allocate memory for l2_p2m_page");
490
491 /* We now have L3 and L2 pages ready, update L1 mapping */
492 update_p2m_frame_list_list();
493
494 }
495
496 /*
497 * Update the L1 p2m_frame_list_list mapping (during guest boot or resume)
498 */
499 static void
500 update_p2m_frame_list_list(void)
501 {
502 int i;
503 int fpp; /* number of page (frame) pointer per page */
504 unsigned long max_pfn;
505
506 max_pfn = xen_start_info.nr_pages;
507 fpp = PAGE_SIZE / sizeof(xen_pfn_t);
508
509 for (i = 0; i < l2_p2m_page_size; i++) {
510 /*
511 * Each time we start a new L2 page,
512 * store its MFN in the L3 page
513 */
514 if ((i % fpp) == 0) {
515 l3_p2m_page[i/fpp] = vtomfn(
516 (vaddr_t)&l2_p2m_page[i]);
517 }
518 /*
519 * we use a shortcut
520 * since @xpmap_phys_to_machine_mapping array
521 * already contains PFN to MFN mapping, we just
522 * set the l2_p2m_page MFN pointer to the MFN of the
523 * according frame of @xpmap_phys_to_machine_mapping
524 */
525 l2_p2m_page[i] = vtomfn((vaddr_t)
526 &xpmap_phys_to_machine_mapping[i*fpp]);
527 }
528
529 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
530 vtomfn((vaddr_t)l3_p2m_page);
531 HYPERVISOR_shared_info->arch.max_pfn = max_pfn;
532
533 }
534