hypervisor_machdep.c revision 1.36.8.2 1 /* $NetBSD: hypervisor_machdep.c,v 1.36.8.2 2020/04/16 08:46:35 bouyer Exp $ */
2
3 /*
4 *
5 * Copyright (c) 2004 Christian Limpach.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /******************************************************************************
30 * hypervisor.c
31 *
32 * Communication to/from hypervisor.
33 *
34 * Copyright (c) 2002-2004, K A Fraser
35 *
36 * Permission is hereby granted, free of charge, to any person obtaining a copy
37 * of this software and associated documentation files (the "Software"), to
38 * deal in the Software without restriction, including without limitation the
39 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
40 * sell copies of the Software, and to permit persons to whom the Software is
41 * furnished to do so, subject to the following conditions:
42 *
43 * The above copyright notice and this permission notice shall be included in
44 * all copies or substantial portions of the Software.
45 *
46 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
47 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
48 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
49 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
50 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
51 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
52 * DEALINGS IN THE SOFTWARE.
53 */
54
55
56 #include <sys/cdefs.h>
57 __KERNEL_RCSID(0, "$NetBSD: hypervisor_machdep.c,v 1.36.8.2 2020/04/16 08:46:35 bouyer Exp $");
58
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/kmem.h>
62
63 #include <uvm/uvm_extern.h>
64
65 #include <machine/vmparam.h>
66 #include <machine/pmap.h>
67
68 #include <xen/xen.h>
69 #include <xen/intr.h>
70 #include <xen/hypervisor.h>
71 #include <xen/evtchn.h>
72 #include <xen/xenpmap.h>
73
74 #include "opt_xen.h"
75 #include "isa.h"
76 #include "pci.h"
77
78 #ifdef XENPV
79 /*
80 * arch-dependent p2m frame lists list (L3 and L2)
81 * used by Xen for save/restore mappings
82 */
83 static unsigned long * l3_p2m_page;
84 static unsigned long * l2_p2m_page;
85 static int l2_p2m_page_size; /* size of L2 page, in pages */
86
87 static void build_p2m_frame_list_list(void);
88 static void update_p2m_frame_list_list(void);
89
90 #endif
91
92 // #define PORT_DEBUG 4
93 // #define EARLY_DEBUG_EVENT
94
95 /* callback function type */
96 typedef void (*iterate_func_t)(unsigned int, unsigned int,
97 unsigned int, void *);
98
99 static inline void
100 evt_iterate_bits(volatile unsigned long *pendingl1,
101 volatile unsigned long *pendingl2,
102 volatile unsigned long *mask,
103 iterate_func_t iterate_pending, void *iterate_args)
104 {
105
106 KASSERT(pendingl1 != NULL);
107 KASSERT(pendingl2 != NULL);
108
109 unsigned long l1, l2;
110 unsigned int l1i, l2i, port;
111
112 l1 = xen_atomic_xchg(pendingl1, 0);
113 while ((l1i = xen_ffs(l1)) != 0) {
114 l1i--;
115 l1 &= ~(1UL << l1i);
116
117 l2 = pendingl2[l1i] & (mask != NULL ? ~mask[l1i] : -1UL);
118 l2 &= curcpu()->ci_evtmask[l1i];
119
120 if (mask != NULL) xen_atomic_setbits_l(&mask[l1i], l2);
121 xen_atomic_clearbits_l(&pendingl2[l1i], l2);
122
123 while ((l2i = xen_ffs(l2)) != 0) {
124 l2i--;
125 l2 &= ~(1UL << l2i);
126
127 port = (l1i << LONG_SHIFT) + l2i;
128
129 iterate_pending(port, l1i, l2i, iterate_args);
130 }
131 }
132 }
133
134 /*
135 * Set per-cpu "pending" information for outstanding events that
136 * cannot be processed now.
137 */
138
139 static inline void
140 evt_set_pending(unsigned int port, unsigned int l1i,
141 unsigned int l2i, void *args)
142 {
143
144 KASSERT(args != NULL);
145
146 int *ret = args;
147
148 if (evtsource[port]) {
149 hypervisor_set_ipending(evtsource[port]->ev_imask, l1i, l2i);
150 evtsource[port]->ev_evcnt.ev_count++;
151 if (*ret == 0 && curcpu()->ci_ilevel <
152 evtsource[port]->ev_maxlevel)
153 *ret = 1;
154 }
155 #ifdef DOM0OPS
156 else {
157 /* set pending event */
158 xenevt_setipending(l1i, l2i);
159 }
160 #endif
161 }
162
163 int stipending(void);
164 int
165 stipending(void)
166 {
167 volatile shared_info_t *s = HYPERVISOR_shared_info;
168 struct cpu_info *ci;
169 volatile struct vcpu_info *vci;
170 int ret;
171
172 ret = 0;
173 ci = curcpu();
174 vci = ci->ci_vcpu;
175
176 #if 0
177 if (HYPERVISOR_shared_info->events)
178 printf("stipending events %08lx mask %08lx ilevel %d\n",
179 HYPERVISOR_shared_info->events,
180 HYPERVISOR_shared_info->events_mask, ci->ci_ilevel);
181 #endif
182
183 #ifdef EARLY_DEBUG_EVENT
184 if (xen_atomic_test_bit(&s->evtchn_pending[0], debug_port)) {
185 xen_debug_handler(NULL);
186 xen_atomic_clear_bit(&s->evtchn_pending[0], debug_port);
187 }
188 #endif
189
190 /*
191 * we're only called after STIC, so we know that we'll have to
192 * STI at the end
193 */
194
195 while (vci->evtchn_upcall_pending) {
196 x86_disable_intr();
197
198 vci->evtchn_upcall_pending = 0;
199
200 evt_iterate_bits(&vci->evtchn_pending_sel,
201 s->evtchn_pending, s->evtchn_mask,
202 evt_set_pending, &ret);
203
204 x86_enable_intr();
205 }
206
207 return (ret);
208 }
209
210 /* Iterate through pending events and call the event handler */
211
212 static inline void
213 evt_do_hypervisor_callback(unsigned int port, unsigned int l1i,
214 unsigned int l2i, void *args)
215 {
216 KASSERT(args != NULL);
217
218 struct cpu_info *ci = curcpu();
219 struct intrframe *regs = args;
220
221 #ifdef PORT_DEBUG
222 if (port == PORT_DEBUG)
223 printf("do_hypervisor_callback event %d\n", port);
224 #endif
225 if (evtsource[port]) {
226 ci->ci_idepth++;
227 evtchn_do_event(port, regs);
228 ci->ci_idepth--;
229 }
230 #ifdef DOM0OPS
231 else {
232 if (ci->ci_ilevel < IPL_HIGH) {
233 /* fast path */
234 int oipl = ci->ci_ilevel;
235 ci->ci_ilevel = IPL_HIGH;
236 ci->ci_idepth++;
237 xenevt_event(port);
238 ci->ci_idepth--;
239 ci->ci_ilevel = oipl;
240 } else {
241 /* set pending event */
242 xenevt_setipending(l1i, l2i);
243 }
244 }
245 #endif
246 }
247
248 void
249 do_hypervisor_callback(struct intrframe *regs)
250 {
251 volatile shared_info_t *s = HYPERVISOR_shared_info;
252 struct cpu_info *ci;
253 volatile struct vcpu_info *vci;
254 int level __diagused;
255
256 ci = curcpu();
257 vci = ci->ci_vcpu;
258 level = ci->ci_ilevel;
259
260 /* Save trapframe for clock handler */
261 KASSERT(regs != NULL);
262 ci->ci_xen_clockf_usermode = USERMODE(regs->_INTRFRAME_CS);
263 ci->ci_xen_clockf_pc = regs->_INTRFRAME_IP;
264
265 // DDD printf("do_hypervisor_callback\n");
266
267 #ifdef EARLY_DEBUG_EVENT
268 if (xen_atomic_test_bit(&s->evtchn_pending[0], debug_port)) {
269 xen_debug_handler(NULL);
270 xen_atomic_clear_bit(&s->evtchn_pending[0], debug_port);
271 }
272 #endif
273
274 while (vci->evtchn_upcall_pending) {
275 vci->evtchn_upcall_pending = 0;
276
277 evt_iterate_bits(&vci->evtchn_pending_sel,
278 s->evtchn_pending, s->evtchn_mask,
279 evt_do_hypervisor_callback, regs);
280 }
281
282 #ifdef DIAGNOSTIC
283 if (level != ci->ci_ilevel)
284 printf("hypervisor done %08x level %d/%d ipending %08x\n",
285 (uint)vci->evtchn_pending_sel,
286 level, ci->ci_ilevel, ci->ci_ipending);
287 #endif
288 }
289
290 void
291 hypervisor_send_event(struct cpu_info *ci, unsigned int ev)
292 {
293 KASSERT(ci != NULL);
294
295 volatile shared_info_t *s = HYPERVISOR_shared_info;
296 volatile struct vcpu_info *vci = ci->ci_vcpu;
297
298 #ifdef PORT_DEBUG
299 if (ev == PORT_DEBUG)
300 printf("hypervisor_send_event %d\n", ev);
301 #endif
302
303 xen_atomic_set_bit(&s->evtchn_pending[0], ev);
304
305 if (__predict_false(ci == curcpu())) {
306 xen_atomic_set_bit(&vci->evtchn_pending_sel,
307 ev >> LONG_SHIFT);
308 xen_atomic_set_bit(&vci->evtchn_upcall_pending, 0);
309 }
310
311 xen_atomic_clear_bit(&s->evtchn_mask[0], ev);
312
313 if (__predict_true(ci == curcpu())) {
314 hypervisor_force_callback();
315 } else {
316 if (__predict_false(xen_send_ipi(ci, XEN_IPI_HVCB))) {
317 panic("xen_send_ipi(cpu%d, XEN_IPI_HVCB) failed\n",
318 (int) ci->ci_cpuid);
319 }
320 }
321 }
322
323 void
324 hypervisor_unmask_event(unsigned int ev)
325 {
326
327 KASSERT(ev > 0 && ev < NR_EVENT_CHANNELS);
328
329 #ifdef PORT_DEBUG
330 if (ev == PORT_DEBUG)
331 printf("hypervisor_unmask_event %d\n", ev);
332 #endif
333
334 /* Xen unmasks the evtchn_mask[0]:ev bit for us. */
335 evtchn_op_t op;
336 op.cmd = EVTCHNOP_unmask;
337 op.u.unmask.port = ev;
338 if (HYPERVISOR_event_channel_op(&op) != 0)
339 panic("Failed to unmask event %d\n", ev);
340
341 return;
342 }
343
344 void
345 hypervisor_mask_event(unsigned int ev)
346 {
347 volatile shared_info_t *s = HYPERVISOR_shared_info;
348 #ifdef PORT_DEBUG
349 if (ev == PORT_DEBUG)
350 printf("hypervisor_mask_event %d\n", ev);
351 #endif
352
353 xen_atomic_set_bit(&s->evtchn_mask[0], ev);
354 }
355
356 void
357 hypervisor_clear_event(unsigned int ev)
358 {
359 volatile shared_info_t *s = HYPERVISOR_shared_info;
360 #ifdef PORT_DEBUG
361 if (ev == PORT_DEBUG)
362 printf("hypervisor_clear_event %d\n", ev);
363 #endif
364
365 xen_atomic_clear_bit(&s->evtchn_pending[0], ev);
366 }
367
368 static inline void
369 evt_enable_event(unsigned int port, unsigned int l1i,
370 unsigned int l2i, void *args)
371 {
372 KASSERT(args == NULL);
373 hypervisor_unmask_event(port);
374 #if NPCI > 0 || NISA > 0
375 hypervisor_ack_pirq_event(port);
376 #endif /* NPCI > 0 || NISA > 0 */
377 }
378
379 void
380 hypervisor_enable_sir(unsigned int sir)
381 {
382 struct cpu_info *ci = curcpu();
383
384 /*
385 * enable all events for ipl. As we only set an event in ipl_evt_mask
386 * for its lowest IPL, and pending IPLs are processed high to low,
387 * we know that all callback for this event have been processed.
388 */
389
390 evt_iterate_bits(&ci->ci_isources[sir]->ipl_evt_mask1,
391 ci->ci_isources[sir]->ipl_evt_mask2, NULL,
392 evt_enable_event, NULL);
393
394 }
395
396 void
397 hypervisor_set_ipending(uint32_t imask, int l1, int l2)
398 {
399
400 /* This function is not re-entrant */
401 KASSERT(x86_read_psl() != 0);
402
403 int sir;
404 struct cpu_info *ci = curcpu();
405
406 /* set pending bit for the appropriate IPLs */
407 ci->ci_ipending |= imask;
408
409 /*
410 * And set event pending bit for the lowest IPL. As IPL are handled
411 * from high to low, this ensure that all callbacks will have been
412 * called when we ack the event
413 */
414 sir = ffs(imask);
415 KASSERT(sir > SIR_XENIPL_VM);
416 sir--;
417 KASSERT(sir <= SIR_XENIPL_HIGH);
418 KASSERT(ci->ci_isources[sir] != NULL);
419 ci->ci_isources[sir]->ipl_evt_mask1 |= 1UL << l1;
420 ci->ci_isources[sir]->ipl_evt_mask2[l1] |= 1UL << l2;
421 if (__predict_false(ci != curcpu())) {
422 if (xen_send_ipi(ci, XEN_IPI_HVCB)) {
423 panic("hypervisor_set_ipending: "
424 "xen_send_ipi(cpu%d, XEN_IPI_HVCB) failed\n",
425 (int) ci->ci_cpuid);
426 }
427 }
428 }
429
430 void
431 hypervisor_machdep_attach(void)
432 {
433 #ifdef XENPV
434 /* dom0 does not require the arch-dependent P2M translation table */
435 if (!xendomain_is_dom0()) {
436 build_p2m_frame_list_list();
437 sysctl_xen_suspend_setup();
438 }
439 #endif
440 }
441
442 void
443 hypervisor_machdep_resume(void)
444 {
445 #ifdef XENPV
446 /* dom0 does not require the arch-dependent P2M translation table */
447 if (!xendomain_is_dom0())
448 update_p2m_frame_list_list();
449 #endif
450 }
451
452 #ifdef XENPV
453 /*
454 * Generate the p2m_frame_list_list table,
455 * needed for guest save/restore
456 */
457 static void
458 build_p2m_frame_list_list(void)
459 {
460 int fpp; /* number of page (frame) pointer per page */
461 unsigned long max_pfn;
462 /*
463 * The p2m list is composed of three levels of indirection,
464 * each layer containing MFNs pointing to lower level pages
465 * The indirection is used to convert a given PFN to its MFN
466 * Each N level page can point to @fpp (N-1) level pages
467 * For example, for x86 32bit, we have:
468 * - PAGE_SIZE: 4096 bytes
469 * - fpp: 1024 (one L3 page can address 1024 L2 pages)
470 * A L1 page contains the list of MFN we are looking for
471 */
472 max_pfn = xen_start_info.nr_pages;
473 fpp = PAGE_SIZE / sizeof(xen_pfn_t);
474
475 /* we only need one L3 page */
476 l3_p2m_page = (vaddr_t *)uvm_km_alloc(kernel_map, PAGE_SIZE,
477 PAGE_SIZE, UVM_KMF_WIRED | UVM_KMF_NOWAIT);
478 if (l3_p2m_page == NULL)
479 panic("could not allocate memory for l3_p2m_page");
480
481 /*
482 * Determine how many L2 pages we need for the mapping
483 * Each L2 can map a total of @fpp L1 pages
484 */
485 l2_p2m_page_size = howmany(max_pfn, fpp);
486
487 l2_p2m_page = (vaddr_t *)uvm_km_alloc(kernel_map,
488 l2_p2m_page_size * PAGE_SIZE,
489 PAGE_SIZE, UVM_KMF_WIRED | UVM_KMF_NOWAIT);
490 if (l2_p2m_page == NULL)
491 panic("could not allocate memory for l2_p2m_page");
492
493 /* We now have L3 and L2 pages ready, update L1 mapping */
494 update_p2m_frame_list_list();
495
496 }
497
498 /*
499 * Update the L1 p2m_frame_list_list mapping (during guest boot or resume)
500 */
501 static void
502 update_p2m_frame_list_list(void)
503 {
504 int i;
505 int fpp; /* number of page (frame) pointer per page */
506 unsigned long max_pfn;
507
508 max_pfn = xen_start_info.nr_pages;
509 fpp = PAGE_SIZE / sizeof(xen_pfn_t);
510
511 for (i = 0; i < l2_p2m_page_size; i++) {
512 /*
513 * Each time we start a new L2 page,
514 * store its MFN in the L3 page
515 */
516 if ((i % fpp) == 0) {
517 l3_p2m_page[i/fpp] = vtomfn(
518 (vaddr_t)&l2_p2m_page[i]);
519 }
520 /*
521 * we use a shortcut
522 * since @xpmap_phys_to_machine_mapping array
523 * already contains PFN to MFN mapping, we just
524 * set the l2_p2m_page MFN pointer to the MFN of the
525 * according frame of @xpmap_phys_to_machine_mapping
526 */
527 l2_p2m_page[i] = vtomfn((vaddr_t)
528 &xpmap_phys_to_machine_mapping[i*fpp]);
529 }
530
531 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
532 vtomfn((vaddr_t)l3_p2m_page);
533 HYPERVISOR_shared_info->arch.max_pfn = max_pfn;
534
535 }
536 #endif /* XENPV */
537