x86_xpmap.c revision 1.5 1 /* $NetBSD: x86_xpmap.c,v 1.5 2008/01/15 19:55:53 bouyer Exp $ */
2
3 /*
4 * Copyright (c) 2006 Mathieu Ropert <mro (at) adviseo.fr>
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 /*
20 * Copyright (c) 2006, 2007 Manuel Bouyer.
21 *
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
24 * are met:
25 * 1. Redistributions of source code must retain the above copyright
26 * notice, this list of conditions and the following disclaimer.
27 * 2. Redistributions in binary form must reproduce the above copyright
28 * notice, this list of conditions and the following disclaimer in the
29 * documentation and/or other materials provided with the distribution.
30 * 3. All advertising materials mentioning features or use of this software
31 * must display the following acknowledgement:
32 * This product includes software developed by Manuel Bouyer.
33 * 4. The name of the author may not be used to endorse or promote products
34 * derived from this software without specific prior written permission.
35 *
36 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
37 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
38 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
39 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
40 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
41 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
45 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46 *
47 */
48
49 /*
50 *
51 * Copyright (c) 2004 Christian Limpach.
52 * All rights reserved.
53 *
54 * Redistribution and use in source and binary forms, with or without
55 * modification, are permitted provided that the following conditions
56 * are met:
57 * 1. Redistributions of source code must retain the above copyright
58 * notice, this list of conditions and the following disclaimer.
59 * 2. Redistributions in binary form must reproduce the above copyright
60 * notice, this list of conditions and the following disclaimer in the
61 * documentation and/or other materials provided with the distribution.
62 * 3. All advertising materials mentioning features or use of this software
63 * must display the following acknowledgement:
64 * This product includes software developed by Christian Limpach.
65 * 4. The name of the author may not be used to endorse or promote products
66 * derived from this software without specific prior written permission.
67 *
68 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
69 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
70 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
71 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
72 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
73 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
74 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
75 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
76 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
77 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
78 */
79
80
81 #include <sys/cdefs.h>
82 __KERNEL_RCSID(0, "$NetBSD: x86_xpmap.c,v 1.5 2008/01/15 19:55:53 bouyer Exp $");
83
84 #include "opt_xen.h"
85 #include "opt_ddb.h"
86 #include "ksyms.h"
87
88 #include <sys/param.h>
89 #include <sys/systm.h>
90
91 #include <uvm/uvm.h>
92
93 #include <machine/pmap.h>
94 #include <machine/gdt.h>
95 #include <xen/xenfunc.h>
96
97 #include <dev/isa/isareg.h>
98 #include <machine/isa_machdep.h>
99
100 #undef XENDEBUG
101 /* #define XENDEBUG_SYNC */
102 /* #define XENDEBUG_LOW */
103
104 #ifdef XENDEBUG
105 #define XENPRINTF(x) printf x
106 #define XENPRINTK(x) printk x
107 #define XENPRINTK2(x) /* printk x */
108
109 static char XBUF[256];
110 #else
111 #define XENPRINTF(x)
112 #define XENPRINTK(x)
113 #define XENPRINTK2(x)
114 #endif
115 #define PRINTF(x) printf x
116 #define PRINTK(x) printk x
117
118 /* on x86_64 kernel runs in ring 3 */
119 #ifdef __x86_64__
120 #define PG_k PG_u
121 #else
122 #define PG_k 0
123 #endif
124
125 volatile shared_info_t *HYPERVISOR_shared_info;
126 union start_info_union start_info_union;
127 paddr_t *xpmap_phys_to_machine_mapping;
128
129 void xen_failsafe_handler(void);
130
131 #ifdef XEN3
132 #define HYPERVISOR_mmu_update_self(req, count, success_count) \
133 HYPERVISOR_mmu_update((req), (count), (success_count), DOMID_SELF)
134 #else
135 #define HYPERVISOR_mmu_update_self(req, count, success_count) \
136 HYPERVISOR_mmu_update((req), (count), (success_count))
137 #endif
138
139 void
140 xen_failsafe_handler(void)
141 {
142
143 panic("xen_failsafe_handler called!\n");
144 }
145
146
147 void
148 xen_set_ldt(vaddr_t base, uint32_t entries)
149 {
150 vaddr_t va;
151 vaddr_t end;
152 pt_entry_t *ptp;
153 int s;
154
155 #ifdef __x86_64__
156 end = base + (entries << 3);
157 #else
158 end = base + entries * sizeof(union descriptor);
159 #endif
160
161 for (va = base; va < end; va += PAGE_SIZE) {
162 KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
163 ptp = kvtopte(va);
164 XENPRINTF(("xen_set_ldt %p %d %p\n", (void *)base,
165 entries, ptp));
166 pmap_pte_clearbits(ptp, PG_RW);
167 }
168 s = splvm();
169 xpq_queue_set_ldt(base, entries);
170 xpq_flush_queue();
171 splx(s);
172 }
173
174 #ifdef XENDEBUG
175 void xpq_debug_dump(void);
176 #endif
177
178 #define XPQUEUE_SIZE 2048
179 static mmu_update_t xpq_queue[XPQUEUE_SIZE];
180 static int xpq_idx = 0;
181
182 void
183 xpq_flush_queue()
184 {
185 int i, ok;
186
187 XENPRINTK2(("flush queue %p entries %d\n", xpq_queue, xpq_idx));
188 for (i = 0; i < xpq_idx; i++)
189 XENPRINTK2(("%d: %p %08x\n", i, (u_int)xpq_queue[i].ptr,
190 (u_int)xpq_queue[i].val));
191 if (xpq_idx != 0 &&
192 HYPERVISOR_mmu_update_self(xpq_queue, xpq_idx, &ok) < 0) {
193 printf("xpq_flush_queue: %d entries \n", xpq_idx);
194 for (i = 0; i < xpq_idx; i++)
195 printf("0x%016" PRIx64 ": 0x%016" PRIx64 "\n",
196 (u_int64_t)xpq_queue[i].ptr,
197 (u_int64_t)xpq_queue[i].val);
198 panic("HYPERVISOR_mmu_update failed\n");
199 }
200 xpq_idx = 0;
201 }
202
203 static inline void
204 xpq_increment_idx(void)
205 {
206
207 xpq_idx++;
208 if (__predict_false(xpq_idx == XPQUEUE_SIZE))
209 xpq_flush_queue();
210 }
211
212 void
213 xpq_queue_machphys_update(paddr_t ma, paddr_t pa)
214 {
215 XENPRINTK2(("xpq_queue_machphys_update ma=%p pa=%p\n", (void *)ma, (void *)pa));
216 xpq_queue[xpq_idx].ptr = ma | MMU_MACHPHYS_UPDATE;
217 xpq_queue[xpq_idx].val = (pa - XPMAP_OFFSET) >> PAGE_SHIFT;
218 xpq_increment_idx();
219 #ifdef XENDEBUG_SYNC
220 xpq_flush_queue();
221 #endif
222 }
223
224 void
225 xpq_queue_pde_update(pd_entry_t *ptr, pd_entry_t val)
226 {
227
228 KASSERT(((paddr_t)ptr & 3) == 0);
229 xpq_queue[xpq_idx].ptr = (paddr_t)ptr | MMU_NORMAL_PT_UPDATE;
230 xpq_queue[xpq_idx].val = val;
231 xpq_increment_idx();
232 #ifdef XENDEBUG_SYNC
233 xpq_flush_queue();
234 #endif
235 }
236
237 void
238 xpq_queue_pte_update(pt_entry_t *ptr, pt_entry_t val)
239 {
240
241 KASSERT(((paddr_t)ptr & 3) == 0);
242 xpq_queue[xpq_idx].ptr = (paddr_t)ptr | MMU_NORMAL_PT_UPDATE;
243 xpq_queue[xpq_idx].val = val;
244 xpq_increment_idx();
245 #ifdef XENDEBUG_SYNC
246 xpq_flush_queue();
247 #endif
248 }
249
250 #ifdef XEN3
251 void
252 xpq_queue_pt_switch(paddr_t pa)
253 {
254 struct mmuext_op op;
255 xpq_flush_queue();
256
257 XENPRINTK2(("xpq_queue_pt_switch: %p %p\n", (void *)pa, (void *)pa));
258 op.cmd = MMUEXT_NEW_BASEPTR;
259 op.arg1.mfn = pa >> PAGE_SHIFT;
260 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
261 panic("xpq_queue_pt_switch");
262 }
263
264 void
265 xpq_queue_pin_table(paddr_t pa)
266 {
267 struct mmuext_op op;
268 xpq_flush_queue();
269
270 XENPRINTK2(("xpq_queue_pin_table: %p %p\n", (void *)pa, (void *)pa));
271 op.arg1.mfn = pa >> PAGE_SHIFT;
272
273 #ifdef __x86_64__
274 op.cmd = MMUEXT_PIN_L4_TABLE;
275 #else
276 op.cmd = MMUEXT_PIN_L2_TABLE;
277 #endif
278 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
279 panic("xpq_queue_pin_table");
280 }
281
282 void
283 xpq_queue_unpin_table(paddr_t pa)
284 {
285 struct mmuext_op op;
286 xpq_flush_queue();
287
288 XENPRINTK2(("xpq_queue_unpin_table: %p %p\n", (void *)pa, (void *)pa));
289 op.arg1.mfn = pa >> PAGE_SHIFT;
290 op.cmd = MMUEXT_UNPIN_TABLE;
291 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
292 panic("xpq_queue_unpin_table");
293 }
294
295 void
296 xpq_queue_set_ldt(vaddr_t va, uint32_t entries)
297 {
298 struct mmuext_op op;
299 xpq_flush_queue();
300
301 XENPRINTK2(("xpq_queue_set_ldt\n"));
302 KASSERT(va == (va & ~PAGE_MASK));
303 op.cmd = MMUEXT_SET_LDT;
304 op.arg1.linear_addr = va;
305 op.arg2.nr_ents = entries;
306 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
307 panic("xpq_queue_set_ldt");
308 }
309
310 void
311 xpq_queue_tlb_flush()
312 {
313 struct mmuext_op op;
314 xpq_flush_queue();
315
316 XENPRINTK2(("xpq_queue_tlb_flush\n"));
317 op.cmd = MMUEXT_TLB_FLUSH_LOCAL;
318 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
319 panic("xpq_queue_tlb_flush");
320 }
321
322 void
323 xpq_flush_cache()
324 {
325 struct mmuext_op op;
326 int s = splvm();
327 xpq_flush_queue();
328
329 XENPRINTK2(("xpq_queue_flush_cache\n"));
330 op.cmd = MMUEXT_FLUSH_CACHE;
331 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
332 panic("xpq_flush_cache");
333 splx(s);
334 }
335
336 void
337 xpq_queue_invlpg(vaddr_t va)
338 {
339 struct mmuext_op op;
340 xpq_flush_queue();
341
342 XENPRINTK2(("xpq_queue_invlpg %p\n", (void *)va));
343 op.cmd = MMUEXT_INVLPG_LOCAL;
344 op.arg1.linear_addr = (va & ~PAGE_MASK);
345 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
346 panic("xpq_queue_invlpg");
347 }
348
349 int
350 xpq_update_foreign(pt_entry_t *ptr, pt_entry_t val, int dom)
351 {
352 mmu_update_t op;
353 int ok;
354 xpq_flush_queue();
355
356 op.ptr = (paddr_t)ptr;
357 op.val = val;
358 if (HYPERVISOR_mmu_update(&op, 1, &ok, dom) < 0)
359 return EFAULT;
360 return (0);
361 }
362 #else /* XEN3 */
363 void
364 xpq_queue_pt_switch(paddr_t pa)
365 {
366
367 XENPRINTK2(("xpq_queue_pt_switch: %p %p\n", (void *)pa, (void *)pa));
368 xpq_queue[xpq_idx].ptr = pa | MMU_EXTENDED_COMMAND;
369 xpq_queue[xpq_idx].val = MMUEXT_NEW_BASEPTR;
370 xpq_increment_idx();
371 }
372
373 void
374 xpq_queue_pin_table(paddr_t pa)
375 {
376
377 XENPRINTK2(("xpq_queue_pin_table: %p %p\n", (void *)pa, (void *)pa));
378 xpq_queue[xpq_idx].ptr = pa | MMU_EXTENDED_COMMAND;
379 xpq_queue[xpq_idx].val = MMUEXT_PIN_L2_TABLE;
380 xpq_increment_idx();
381 }
382
383 void
384 xpq_queue_unpin_table(paddr_t pa)
385 {
386
387 XENPRINTK2(("xpq_queue_unpin_table: %p %p\n", (void *)pa, (void *)pa));
388 xpq_queue[xpq_idx].ptr = pa | MMU_EXTENDED_COMMAND;
389 xpq_queue[xpq_idx].val = MMUEXT_UNPIN_TABLE;
390 xpq_increment_idx();
391 }
392
393 void
394 xpq_queue_set_ldt(vaddr_t va, uint32_t entries)
395 {
396
397 XENPRINTK2(("xpq_queue_set_ldt\n"));
398 KASSERT(va == (va & ~PAGE_MASK));
399 xpq_queue[xpq_idx].ptr = MMU_EXTENDED_COMMAND | va;
400 xpq_queue[xpq_idx].val = MMUEXT_SET_LDT | (entries << MMUEXT_CMD_SHIFT);
401 xpq_increment_idx();
402 }
403
404 void
405 xpq_queue_tlb_flush()
406 {
407
408 XENPRINTK2(("xpq_queue_tlb_flush\n"));
409 xpq_queue[xpq_idx].ptr = MMU_EXTENDED_COMMAND;
410 xpq_queue[xpq_idx].val = MMUEXT_TLB_FLUSH;
411 xpq_increment_idx();
412 }
413
414 void
415 xpq_flush_cache()
416 {
417 int s = splvm();
418
419 XENPRINTK2(("xpq_queue_flush_cache\n"));
420 xpq_queue[xpq_idx].ptr = MMU_EXTENDED_COMMAND;
421 xpq_queue[xpq_idx].val = MMUEXT_FLUSH_CACHE;
422 xpq_increment_idx();
423 xpq_flush_queue();
424 splx(s);
425 }
426
427 void
428 xpq_queue_invlpg(vaddr_t va)
429 {
430
431 XENPRINTK2(("xpq_queue_invlpg %p\n", (void *)va));
432 xpq_queue[xpq_idx].ptr = (va & ~PAGE_MASK) | MMU_EXTENDED_COMMAND;
433 xpq_queue[xpq_idx].val = MMUEXT_INVLPG;
434 xpq_increment_idx();
435 }
436
437 int
438 xpq_update_foreign(pt_entry_t *ptr, pt_entry_t val, int dom)
439 {
440 mmu_update_t xpq_up[3];
441
442 xpq_up[0].ptr = MMU_EXTENDED_COMMAND;
443 xpq_up[0].val = MMUEXT_SET_FOREIGNDOM | (dom << 16);
444 xpq_up[1].ptr = (paddr_t)ptr;
445 xpq_up[1].val = val;
446 if (HYPERVISOR_mmu_update_self(xpq_up, 2, NULL) < 0)
447 return EFAULT;
448 return (0);
449 }
450 #endif /* XEN3 */
451
452 #ifdef XENDEBUG
453 void
454 xpq_debug_dump()
455 {
456 int i;
457
458 XENPRINTK2(("idx: %d\n", xpq_idx));
459 for (i = 0; i < xpq_idx; i++) {
460 sprintf(XBUF, "%x %08x ", (u_int)xpq_queue[i].ptr,
461 (u_int)xpq_queue[i].val);
462 if (++i < xpq_idx)
463 sprintf(XBUF + strlen(XBUF), "%x %08x ",
464 (u_int)xpq_queue[i].ptr, (u_int)xpq_queue[i].val);
465 if (++i < xpq_idx)
466 sprintf(XBUF + strlen(XBUF), "%x %08x ",
467 (u_int)xpq_queue[i].ptr, (u_int)xpq_queue[i].val);
468 if (++i < xpq_idx)
469 sprintf(XBUF + strlen(XBUF), "%x %08x ",
470 (u_int)xpq_queue[i].ptr, (u_int)xpq_queue[i].val);
471 XENPRINTK2(("%d: %s\n", xpq_idx, XBUF));
472 }
473 }
474 #endif
475
476
477 extern volatile struct xencons_interface *xencons_interface; /* XXX */
478 extern struct xenstore_domain_interface *xenstore_interface; /* XXX */
479
480 static void xen_bt_set_readonly (vaddr_t);
481 static void xen_bootstrap_tables (vaddr_t, vaddr_t, int, int, int);
482
483 /* How many PDEs ? */
484 #if L2_SLOT_KERNBASE > 0
485 #define TABLE_L2_ENTRIES (2 * (NKL2_KIMG_ENTRIES + 1))
486 #else
487 #define TABLE_L2_ENTRIES (NKL2_KIMG_ENTRIES + 1)
488 #endif
489
490 /*
491 * Construct and switch to new pagetables
492 * first_avail is the first vaddr we can use after
493 * we get rid of Xen pagetables
494 */
495
496 vaddr_t xen_pmap_bootstrap (void);
497
498 /*
499 * Function to get rid of Xen bootstrap tables
500 */
501
502 vaddr_t
503 xen_pmap_bootstrap()
504 {
505 int count, oldcount;
506 long mapsize;
507 const int l2_4_count = PTP_LEVELS - 1;
508 vaddr_t bootstrap_tables, init_tables;
509
510 xpmap_phys_to_machine_mapping = (paddr_t *) xen_start_info.mfn_list;
511 init_tables = xen_start_info.pt_base;
512 __PRINTK(("xen_arch_pmap_bootstrap init_tables=0x%lx\n", init_tables));
513
514 /* Space after Xen boostrap tables should be free */
515 bootstrap_tables = xen_start_info.pt_base +
516 (xen_start_info.nr_pt_frames * PAGE_SIZE);
517
518 /*
519 * Calculate how many space we need
520 * first everything mapped before the Xen bootstrap tables
521 */
522 mapsize = init_tables - KERNTEXTOFF;
523 /* after the tables we'll have:
524 * - UAREA
525 * - dummy user PGD (x86_64)
526 * - HYPERVISOR_shared_info
527 * - ISA I/O mem (if needed)
528 */
529 mapsize += UPAGES * NBPG;
530 #ifdef __x86_64__
531 mapsize += NBPG;
532 #endif
533 mapsize += NBPG;
534
535 #ifdef DOM0OPS
536 if (xen_start_info.flags & SIF_INITDOMAIN) {
537 /* space for ISA I/O mem */
538 mapsize += IOM_SIZE;
539 }
540 #endif
541 /* at this point mapsize doens't include the table size */
542
543 #ifdef __x86_64__
544 count = TABLE_L2_ENTRIES;
545 #else
546 count = (mapsize + (NBPD_L2 -1)) >> L2_SHIFT;
547 #endif /* __x86_64__ */
548
549 /* now compute how many L2 pages we need exactly */
550 XENPRINTK(("bootstrap_final mapsize 0x%lx count %d\n", mapsize, count));
551 while (mapsize + (count + l2_4_count) * PAGE_SIZE + KERNTEXTOFF >
552 ((long)count << L2_SHIFT) + KERNBASE) {
553 count++;
554 }
555 #ifndef __x86_64__
556 /*
557 * one more L2 page: we'll alocate several pages after kva_start
558 * in pmap_bootstrap() before pmap_growkernel(), which have not been
559 * counted here. It's not a big issue to allocate one more L2 as
560 * pmap_growkernel() will be called anyway.
561 */
562 count++;
563 nkptp[1] = count;
564 #endif
565
566 /*
567 * install bootstrap pages. We may need more L2 pages than will
568 * have the final table here, as it's installed after the final table
569 */
570 oldcount = count;
571
572 bootstrap_again:
573 XENPRINTK(("bootstrap_again oldcount %d\n", oldcount));
574 /*
575 * Xen space we'll reclaim may not be enough for our new page tables,
576 * move bootstrap tables if necessary
577 */
578 if (bootstrap_tables < init_tables + ((count + l2_4_count) * PAGE_SIZE))
579 bootstrap_tables = init_tables +
580 ((count + l2_4_count) * PAGE_SIZE);
581 /* make sure we have enough to map the bootstrap_tables */
582 if (bootstrap_tables + ((oldcount + l2_4_count) * PAGE_SIZE) >
583 ((long)oldcount << L2_SHIFT) + KERNBASE) {
584 oldcount++;
585 goto bootstrap_again;
586 }
587
588 /* Create temporary tables */
589 xen_bootstrap_tables(xen_start_info.pt_base, bootstrap_tables,
590 xen_start_info.nr_pt_frames, oldcount, 0);
591
592 /* Create final tables */
593 xen_bootstrap_tables(bootstrap_tables, init_tables,
594 oldcount + l2_4_count, count, 1);
595
596 /* zero out free space after tables */
597 memset((void *)(init_tables + ((count + l2_4_count) * PAGE_SIZE)), 0,
598 (UPAGES + 1) * NBPG);
599 return (init_tables + ((count + l2_4_count) * PAGE_SIZE));
600 }
601
602
603 /*
604 * Build a new table and switch to it
605 * old_count is # of old tables (including PGD, PDTPE and PDE)
606 * new_count is # of new tables (PTE only)
607 * we assume areas don't overlap
608 */
609
610
611 static void
612 xen_bootstrap_tables (vaddr_t old_pgd, vaddr_t new_pgd,
613 int old_count, int new_count, int final)
614 {
615 pd_entry_t *pdtpe, *pde, *pte;
616 pd_entry_t *cur_pgd, *bt_pgd;
617 paddr_t addr, page;
618 vaddr_t avail, text_end, map_end;
619 int i;
620 extern char __data_start;
621
622 __PRINTK(("xen_bootstrap_tables(0x%lx, 0x%lx, %d, %d)\n",
623 old_pgd, new_pgd, old_count, new_count));
624 text_end = ((vaddr_t)&__data_start) & ~PAGE_MASK;
625 /*
626 * size of R/W area after kernel text:
627 * xencons_interface (if present)
628 * xenstore_interface (if present)
629 * table pages (new_count + (PTP_LEVELS - 1) entries)
630 * extra mappings (only when final is true):
631 * UAREA
632 * dummy user PGD (x86_64 only)/gdt page (i386 only)
633 * HYPERVISOR_shared_info
634 * ISA I/O mem (if needed)
635 */
636 map_end = new_pgd + ((new_count + PTP_LEVELS - 1) * NBPG);
637 if (final) {
638 map_end += (UPAGES + 1) * NBPG;
639 HYPERVISOR_shared_info = (shared_info_t *)map_end;
640 map_end += NBPG;
641 }
642 /*
643 * we always set atdevbase, as it's used by init386 to find the first
644 * available VA. map_end is updated only if we are dom0, so
645 * atdevbase -> atdevbase + IOM_SIZE will be mapped only in
646 * this case.
647 */
648 if (final)
649 atdevbase = map_end;
650 #ifdef DOM0OPS
651 if (final && (xen_start_info.flags & SIF_INITDOMAIN)) {
652 /* ISA I/O mem */
653 map_end += IOM_SIZE;
654 }
655 #endif /* DOM0OPS */
656
657 __PRINTK(("xen_bootstrap_tables text_end 0x%lx map_end 0x%lx\n",
658 text_end, map_end));
659
660 /*
661 * Create bootstrap page tables
662 * What we need:
663 * - a PGD (level 4)
664 * - a PDTPE (level 3)
665 * - a PDE (level2)
666 * - some PTEs (level 1)
667 */
668
669 cur_pgd = (pd_entry_t *) old_pgd;
670 bt_pgd = (pd_entry_t *) new_pgd;
671 memset (bt_pgd, 0, PAGE_SIZE);
672 avail = new_pgd + PAGE_SIZE;
673 #if PTP_LEVELS > 3
674 /* Install level 3 */
675 pdtpe = (pd_entry_t *) avail;
676 memset (pdtpe, 0, PAGE_SIZE);
677 avail += PAGE_SIZE;
678
679 addr = ((paddr_t) pdtpe) - KERNBASE;
680 bt_pgd[pl4_pi(KERNTEXTOFF)] =
681 xpmap_ptom_masked(addr) | PG_k | PG_RW | PG_V;
682
683 __PRINTK(("L3 va 0x%lx pa 0x%lx entry 0x%lx -> L4[0x%x]\n",
684 pdtpe, addr, bt_pgd[pl4_pi(KERNTEXTOFF)], pl4_pi(KERNTEXTOFF)));
685 #else
686 pdtpe = bt_pgd;
687 #endif /* PTP_LEVELS > 3 */
688
689 #if PTP_LEVELS > 2
690 /* Level 2 */
691 pde = (pd_entry_t *) avail;
692 memset(pde, 0, PAGE_SIZE);
693 avail += PAGE_SIZE;
694
695 addr = ((paddr_t) pde) - KERNBASE;
696 pdtpe[pl3_pi(KERNTEXTOFF)] =
697 xpmap_ptom_masked(addr) | PG_k | PG_RW | PG_V;
698 __PRINTK(("L2 va 0x%lx pa 0x%lx entry 0x%lx -> L3[0x%x]\n",
699 pde, addr, pdtpe[pl3_pi(KERNTEXTOFF)], pl3_pi(KERNTEXTOFF)));
700 #else
701 pde = bt_pgd;
702 #endif /* PTP_LEVELS > 3 */
703
704 /* Level 1 */
705 page = KERNTEXTOFF;
706 for (i = 0; i < new_count; i ++) {
707 paddr_t cur_page = page;
708
709 pte = (pd_entry_t *) avail;
710 avail += PAGE_SIZE;
711
712 memset(pte, 0, PAGE_SIZE);
713 while (pl2_pi(page) == pl2_pi (cur_page)) {
714 if (page >= map_end) {
715 /* not mapped at all */
716 pte[pl1_pi(page)] = 0;
717 page += PAGE_SIZE;
718 continue;
719 }
720 pte[pl1_pi(page)] = xpmap_ptom_masked(page - KERNBASE);
721 if (page == (vaddr_t)HYPERVISOR_shared_info) {
722 pte[pl1_pi(page)] = xen_start_info.shared_info;
723 __PRINTK(("HYPERVISOR_shared_info "
724 "va 0x%lx pte 0x%lx\n",
725 HYPERVISOR_shared_info, pte[pl1_pi(page)]));
726 }
727 #ifdef XEN3
728 if (xpmap_ptom_masked(page - KERNBASE) ==
729 (xen_start_info.console_mfn << PAGE_SHIFT)) {
730 xencons_interface = (void *)page;
731 pte[pl1_pi(page)] =
732 (xen_start_info.console_mfn << PAGE_SHIFT);
733 __PRINTK(("xencons_interface "
734 "va 0x%lx pte 0x%lx\n",
735 xencons_interface, pte[pl1_pi(page)]));
736 }
737 if (xpmap_ptom_masked(page - KERNBASE) ==
738 (xen_start_info.store_mfn << PAGE_SHIFT)) {
739 xenstore_interface = (void *)page;
740 pte[pl1_pi(page)] =
741 (xen_start_info.store_mfn << PAGE_SHIFT);
742 __PRINTK(("xenstore_interface "
743 "va 0x%lx pte 0x%lx\n",
744 xenstore_interface, pte[pl1_pi(page)]));
745 }
746 #endif /* XEN3 */
747 #ifdef DOM0OPS
748 if (page >= (vaddr_t)atdevbase &&
749 page < (vaddr_t)atdevbase + IOM_SIZE) {
750 pte[pl1_pi(page)] =
751 IOM_BEGIN + (page - (vaddr_t)atdevbase);
752 }
753 #endif
754 pte[pl1_pi(page)] |= PG_k | PG_V;
755 if (page < text_end) {
756 /* map kernel text RO */
757 pte[pl1_pi(page)] |= 0;
758 } else if (page >= old_pgd
759 && page < old_pgd + (old_count * PAGE_SIZE)) {
760 /* map old page tables RO */
761 pte[pl1_pi(page)] |= 0;
762 } else if (page >= new_pgd &&
763 page < new_pgd + ((new_count + PTP_LEVELS - 1) * PAGE_SIZE)) {
764 /* map new page tables RO */
765 pte[pl1_pi(page)] |= 0;
766 } else {
767 /* map page RW */
768 pte[pl1_pi(page)] |= PG_RW;
769 }
770 if (page == old_pgd || page >= new_pgd)
771 __PRINTK(("va 0x%lx pa 0x%lx "
772 "entry 0x%lx -> L1[0x%x]\n",
773 page, page - KERNBASE,
774 pte[pl1_pi(page)], pl1_pi(page)));
775 page += PAGE_SIZE;
776 }
777
778 addr = ((paddr_t) pte) - KERNBASE;
779 pde[pl2_pi(cur_page)] =
780 xpmap_ptom_masked(addr) | PG_k | PG_RW | PG_V;
781 __PRINTK(("L1 va 0x%lx pa 0x%lx entry 0x%lx -> L2[0x%x]\n",
782 pte, addr, pde[pl2_pi(cur_page)], pl2_pi(cur_page)));
783 /* Mark readonly */
784 xen_bt_set_readonly((vaddr_t) pte);
785 }
786
787 /* Install recursive page tables mapping */
788 bt_pgd[PDIR_SLOT_PTE] =
789 xpmap_ptom_masked(new_pgd - KERNBASE) | PG_k | PG_V;
790 __PRINTK(("bt_pgd[PDIR_SLOT_PTE] va 0x%lx pa 0x%lx entry 0x%lx\n",
791 new_pgd, new_pgd - KERNBASE, bt_pgd[PDIR_SLOT_PTE]));
792
793 /* Mark tables RO */
794 xen_bt_set_readonly((vaddr_t) pde);
795 #if PTP_LEVELS > 2
796 xen_bt_set_readonly((vaddr_t) pdtpe);
797 #endif
798 #if PTP_LEVELS > 3
799 xen_bt_set_readonly(new_pgd);
800 #endif
801 /* Pin the PGD */
802 __PRINTK(("pin PDG\n"));
803 xpq_queue_pin_table(xpmap_ptom_masked(new_pgd - KERNBASE));
804 #ifdef __i386__
805 /* Save phys. addr of PDP, for libkvm. */
806 PDPpaddr = new_pgd;
807 #endif
808 /* Switch to new tables */
809 __PRINTK(("switch to PDG\n"));
810 xpq_queue_pt_switch(xpmap_ptom_masked(new_pgd - KERNBASE));
811 __PRINTK(("bt_pgd[PDIR_SLOT_PTE] now entry 0x%lx\n",
812 bt_pgd[PDIR_SLOT_PTE]));
813
814 /* Now we can safely reclaim space taken by old tables */
815
816 __PRINTK(("unpin old PDG\n"));
817 /* Unpin old PGD */
818 xpq_queue_unpin_table(xpmap_ptom_masked(old_pgd - KERNBASE));
819 /* Mark old tables RW */
820 page = old_pgd;
821 addr = (paddr_t) pde[pl2_pi(page)] & PG_FRAME;
822 addr = xpmap_mtop(addr);
823 pte = (pd_entry_t *) (addr + KERNBASE);
824 pte += pl1_pi(page);
825 __PRINTK(("*pde 0x%lx addr 0x%lx pte 0x%lx\n",
826 pde[pl2_pi(page)], addr, pte));
827 while (page < old_pgd + (old_count * PAGE_SIZE) && page < map_end) {
828 addr = xpmap_ptom(((paddr_t) pte) - KERNBASE);
829 XENPRINTK(("addr 0x%lx pte 0x%lx *pte 0x%lx\n",
830 addr, pte, *pte));
831 xpq_queue_pte_update((pt_entry_t *) addr, *pte | PG_RW);
832 page += PAGE_SIZE;
833 /*
834 * Our ptes are contiguous
835 * so it's safe to just "++" here
836 */
837 pte++;
838 }
839 xpq_flush_queue();
840 }
841
842
843 /*
844 * Bootstrap helper functions
845 */
846
847 /*
848 * Mark a page readonly
849 * XXX: assuming vaddr = paddr + KERNBASE
850 */
851
852 static void
853 xen_bt_set_readonly (vaddr_t page)
854 {
855 pt_entry_t entry;
856
857 entry = xpmap_ptom_masked(page - KERNBASE);
858 entry |= PG_k | PG_V;
859
860 HYPERVISOR_update_va_mapping (page, entry, UVMF_INVLPG);
861 }
862
863 #ifdef __x86_64__
864 void
865 xen_set_user_pgd(paddr_t page)
866 {
867 struct mmuext_op op;
868 int s = splvm();
869
870 xpq_flush_queue();
871 op.cmd = MMUEXT_NEW_USER_BASEPTR;
872 op.arg1.mfn = xpmap_phys_to_machine_mapping[page >> PAGE_SHIFT];
873 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF) < 0)
874 panic("xen_set_user_pgd: failed to install new user page"
875 " directory %lx", page);
876 splx(s);
877 }
878 #endif /* __x86_64__ */
879