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xen_intr.c revision 1.15
      1 /*	$NetBSD: xen_intr.c,v 1.15 2019/02/14 08:18:26 cherry Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Charles M. Hannum, and by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: xen_intr.c,v 1.15 2019/02/14 08:18:26 cherry Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/kernel.h>
     37 #include <sys/kmem.h>
     38 
     39 #include <sys/cpu.h>
     40 
     41 #include <xen/evtchn.h>
     42 #include <xen/xenfunc.h>
     43 
     44 #include <uvm/uvm.h>
     45 
     46 #include <machine/cpu.h>
     47 #include <machine/intr.h>
     48 
     49 #include "acpica.h"
     50 #include "ioapic.h"
     51 #include "lapic.h"
     52 #include "pci.h"
     53 
     54 #if NACPICA > 0
     55 #include <dev/acpi/acpivar.h>
     56 #endif
     57 
     58 #if NIOAPIC > 0 || NACPICA > 0
     59 #include <machine/i82093var.h>
     60 #endif
     61 
     62 #if NLAPIC > 0
     63 #include <machine/i82489var.h>
     64 #endif
     65 
     66 #if NPCI > 0
     67 #include <dev/pci/ppbreg.h>
     68 #endif
     69 
     70 /*
     71  * Restore a value to cpl (unmasking interrupts).  If any unmasked
     72  * interrupts are pending, call Xspllower() to process them.
     73  */
     74 void xen_spllower(int nlevel);
     75 
     76 void
     77 xen_spllower(int nlevel)
     78 {
     79 	struct cpu_info *ci = curcpu();
     80 	uint32_t xmask;
     81 	u_long psl;
     82 
     83 	if (ci->ci_ilevel <= nlevel)
     84 		return;
     85 
     86 	__insn_barrier();
     87 
     88 	xmask = XUNMASK(ci, nlevel);
     89 	psl = xen_read_psl();
     90 	xen_disable_intr();
     91 	if (ci->ci_xpending & xmask) {
     92 		KASSERT(psl == 0);
     93 		Xspllower(nlevel);
     94 		/* Xspllower does enable_intr() */
     95 	} else {
     96 		ci->ci_ilevel = nlevel;
     97 		xen_write_psl(psl);
     98 	}
     99 }
    100 
    101 void
    102 xen_disable_intr(void)
    103 {
    104 	__cli();
    105 }
    106 
    107 void
    108 xen_enable_intr(void)
    109 {
    110 	__sti();
    111 }
    112 
    113 u_long
    114 xen_read_psl(void)
    115 {
    116 
    117 	return (curcpu()->ci_vcpu->evtchn_upcall_mask);
    118 }
    119 
    120 void
    121 xen_write_psl(u_long psl)
    122 {
    123 	struct cpu_info *ci = curcpu();
    124 
    125 	ci->ci_vcpu->evtchn_upcall_mask = psl;
    126 	xen_rmb();
    127 	if (ci->ci_vcpu->evtchn_upcall_pending && psl == 0) {
    128 	    	hypervisor_force_callback();
    129 	}
    130 }
    131 
    132 void *
    133 xen_intr_establish(int legacy_irq, struct pic *pic, int pin,
    134     int type, int level, int (*handler)(void *), void *arg,
    135     bool known_mpsafe)
    136 {
    137 
    138 	return xen_intr_establish_xname(legacy_irq, pic, pin, type, level,
    139 	    handler, arg, known_mpsafe, "XEN");
    140 }
    141 
    142 void *
    143 xen_intr_establish_xname(int legacy_irq, struct pic *pic, int pin,
    144     int type, int level, int (*handler)(void *), void *arg,
    145     bool known_mpsafe, const char *xname)
    146 {
    147 	const char *intrstr;
    148 	char intrstr_buf[INTRIDBUF];
    149 
    150 	if (pic->pic_type == PIC_XEN) {
    151 		struct intrhand *rih;
    152 
    153 		/*
    154 		 * event_set_handler interprets `level != IPL_VM' to
    155 		 * mean MP-safe, so we require the caller to match that
    156 		 * for the moment.
    157 		 */
    158 		KASSERT(known_mpsafe == (level != IPL_VM));
    159 
    160 		intrstr = intr_create_intrid(legacy_irq, pic, pin, intrstr_buf,
    161 		    sizeof(intrstr_buf));
    162 
    163 		event_set_handler(pin, handler, arg, level, intrstr, xname);
    164 
    165 		rih = kmem_zalloc(sizeof(*rih), cold ? KM_NOSLEEP : KM_SLEEP);
    166 		if (rih == NULL) {
    167 			printf("%s: can't allocate handler info\n", __func__);
    168 			return NULL;
    169 		}
    170 
    171 		/*
    172 		 * XXX:
    173 		 * This is just a copy for API conformance.
    174 		 * The real ih is lost in the innards of
    175 		 * event_set_handler(); where the details of
    176 		 * biglock_wrapper etc are taken care of.
    177 		 * All that goes away when we nuke event_set_handler()
    178 		 * et. al. and unify with x86/intr.c
    179 		 */
    180 		rih->ih_pin = pin; /* port */
    181 		rih->ih_fun = rih->ih_realfun = handler;
    182 		rih->ih_arg = rih->ih_realarg = arg;
    183 		rih->pic_type = pic->pic_type;
    184 		return rih;
    185 	} 	/* Else we assume pintr */
    186 
    187 #if (NPCI > 0 || NISA > 0) && defined(XENPV) /* XXX: support PVHVM pirq */
    188 	struct pintrhand *pih;
    189 	int gsi;
    190 	int vector, evtchn;
    191 
    192 	KASSERTMSG(legacy_irq == -1 || (0 <= legacy_irq && legacy_irq < NUM_XEN_IRQS),
    193 	    "bad legacy IRQ value: %d", legacy_irq);
    194 	KASSERTMSG(!(legacy_irq == -1 && pic == &i8259_pic),
    195 	    "non-legacy IRQon i8259 ");
    196 
    197 	gsi = xen_pic_to_gsi(pic, pin);
    198 
    199 	intrstr = intr_create_intrid(gsi, pic, pin, intrstr_buf,
    200 	    sizeof(intrstr_buf));
    201 
    202 	vector = xen_vec_alloc(gsi);
    203 
    204 	if (irq2port[gsi] == 0) {
    205 		extern struct cpu_info phycpu_info_primary; /* XXX */
    206 		struct cpu_info *ci = &phycpu_info_primary;
    207 
    208 		pic->pic_addroute(pic, ci, pin, vector, type);
    209 
    210 		evtchn = bind_pirq_to_evtch(gsi);
    211 		KASSERT(evtchn > 0);
    212 		KASSERT(evtchn < NR_EVENT_CHANNELS);
    213 		irq2port[gsi] = evtchn + 1;
    214 		xen_atomic_set_bit(&ci->ci_evtmask[0], evtchn);
    215 	} else {
    216 		/*
    217 		 * Shared interrupt - we can't rebind.
    218 		 * The port is shared instead.
    219 		 */
    220 		evtchn = irq2port[gsi] - 1;
    221 	}
    222 
    223 	pih = pirq_establish(gsi, evtchn, handler, arg, level,
    224 			     intrstr, xname);
    225 	pih->pic_type = pic->pic_type;
    226 	return pih;
    227 #endif /* NPCI > 0 || NISA > 0 */
    228 
    229 	/* FALLTHROUGH */
    230 	return NULL;
    231 }
    232 
    233 /*
    234  * Deregister an interrupt handler.
    235  */
    236 void
    237 xen_intr_disestablish(struct intrhand *ih)
    238 {
    239 
    240 	if (ih->pic_type == PIC_XEN) {
    241 		event_remove_handler(ih->ih_pin, ih->ih_realfun,
    242 		    ih->ih_realarg);
    243 		kmem_free(ih, sizeof(*ih));
    244 		return;
    245 	}
    246 #if defined(DOM0OPS)
    247 	/*
    248 	 * Cache state, to prevent a use after free situation with
    249 	 * ih.
    250 	 */
    251 
    252 	struct pintrhand *pih = (struct pintrhand *)ih;
    253 
    254 	int pirq = pih->pirq;
    255 	int port = pih->evtch;
    256 	KASSERT(irq2port[pirq] != 0);
    257 
    258 	pirq_disestablish(pih);
    259 
    260 	if (evtsource[port] == NULL) {
    261 			/*
    262 			 * Last handler was removed by
    263 			 * event_remove_handler().
    264 			 *
    265 			 * We can safely unbind the pirq now.
    266 			 */
    267 
    268 			port = unbind_pirq_from_evtch(pirq);
    269 			KASSERT(port == pih->evtch);
    270 			irq2port[pirq] = 0;
    271 	}
    272 #endif
    273 	return;
    274 }
    275 
    276 /* MI interface for kern_cpu.c */
    277 void xen_cpu_intr_redistribute(void);
    278 
    279 void
    280 xen_cpu_intr_redistribute(void)
    281 {
    282 	KASSERT(mutex_owned(&cpu_lock));
    283 	KASSERT(mp_online);
    284 
    285 	return;
    286 }
    287 
    288 /* MD - called by x86/cpu.c */
    289 #if defined(INTRSTACKSIZE)
    290 static inline bool
    291 redzone_const_or_false(bool x)
    292 {
    293 #ifdef DIAGNOSTIC
    294 	return x;
    295 #else
    296 	return false;
    297 #endif /* !DIAGNOSTIC */
    298 }
    299 
    300 static inline int
    301 redzone_const_or_zero(int x)
    302 {
    303 	return redzone_const_or_false(true) ? x : 0;
    304 }
    305 #endif
    306 
    307 void xen_cpu_intr_init(struct cpu_info *);
    308 void
    309 xen_cpu_intr_init(struct cpu_info *ci)
    310 {
    311 	int i; /* XXX: duplicate */
    312 
    313 	ci->ci_xunmask[0] = 0xfffffffe;
    314 	for (i = 1; i < NIPL; i++)
    315 		ci->ci_xunmask[i] = ci->ci_xunmask[i - 1] & ~(1 << i);
    316 
    317 #if defined(INTRSTACKSIZE)
    318 	vaddr_t istack;
    319 
    320 	/*
    321 	 * If the red zone is activated, protect both the top and
    322 	 * the bottom of the stack with an unmapped page.
    323 	 */
    324 	istack = uvm_km_alloc(kernel_map,
    325 	    INTRSTACKSIZE + redzone_const_or_zero(2 * PAGE_SIZE), 0,
    326 	    UVM_KMF_WIRED|UVM_KMF_ZERO);
    327 	if (redzone_const_or_false(true)) {
    328 		pmap_kremove(istack, PAGE_SIZE);
    329 		pmap_kremove(istack + INTRSTACKSIZE + PAGE_SIZE, PAGE_SIZE);
    330 		pmap_update(pmap_kernel());
    331 	}
    332 
    333 	/*
    334 	 * 33 used to be 1.  Arbitrarily reserve 32 more register_t's
    335 	 * of space for ddb(4) to examine some subroutine arguments
    336 	 * and to hunt for the next stack frame.
    337 	 */
    338 	ci->ci_intrstack = (char *)istack + redzone_const_or_zero(PAGE_SIZE) +
    339 	    INTRSTACKSIZE - 33 * sizeof(register_t);
    340 #endif
    341 
    342 	ci->ci_idepth = -1;
    343 }
    344 
    345 /*
    346  * Everything below from here is duplicated from x86/intr.c
    347  * When intr.c and xen_intr.c are unified, these will need to be
    348  * merged.
    349  */
    350 
    351 u_int xen_cpu_intr_count(struct cpu_info *ci);
    352 
    353 u_int
    354 xen_cpu_intr_count(struct cpu_info *ci)
    355 {
    356 
    357 	KASSERT(ci->ci_nintrhand >= 0);
    358 
    359 	return ci->ci_nintrhand;
    360 }
    361 
    362 static const char *
    363 xen_intr_string(int port, char *buf, size_t len, struct pic *pic)
    364 {
    365 	KASSERT(pic->pic_type == PIC_XEN);
    366 
    367 	KASSERT(port >= 0);
    368 	KASSERT(port < NR_EVENT_CHANNELS);
    369 
    370 	snprintf(buf, len, "%s channel %d", pic->pic_name, port);
    371 
    372 	return buf;
    373 }
    374 
    375 static const char *
    376 legacy_intr_string(int ih, char *buf, size_t len, struct pic *pic)
    377 {
    378 	int legacy_irq;
    379 
    380 	KASSERT(pic->pic_type == PIC_I8259);
    381 #if NLAPIC > 0
    382 	KASSERT(APIC_IRQ_ISLEGACY(ih));
    383 
    384 	legacy_irq = APIC_IRQ_LEGACY_IRQ(ih);
    385 #else
    386 	legacy_irq = ih;
    387 #endif
    388 	KASSERT(legacy_irq >= 0 && legacy_irq < 16);
    389 
    390 	snprintf(buf, len, "%s pin %d", pic->pic_name, legacy_irq);
    391 
    392 	return buf;
    393 }
    394 
    395 const char * xintr_string(intr_handle_t ih, char *buf, size_t len);
    396 
    397 const char *
    398 xintr_string(intr_handle_t ih, char *buf, size_t len)
    399 {
    400 #if NIOAPIC > 0
    401 	struct ioapic_softc *pic;
    402 #endif
    403 
    404 	if (ih == 0)
    405 		panic("%s: bogus handle 0x%" PRIx64, __func__, ih);
    406 
    407 #if NIOAPIC > 0
    408 	if (ih & APIC_INT_VIA_APIC) {
    409 		pic = ioapic_find(APIC_IRQ_APIC(ih));
    410 		if (pic != NULL) {
    411 			snprintf(buf, len, "%s pin %d",
    412 			    device_xname(pic->sc_dev), APIC_IRQ_PIN(ih));
    413 		} else {
    414 			snprintf(buf, len,
    415 			    "apic %d int %d (irq %d)",
    416 			    APIC_IRQ_APIC(ih),
    417 			    APIC_IRQ_PIN(ih),
    418 			    APIC_IRQ_LEGACY_IRQ(ih));
    419 		}
    420 	} else
    421 		snprintf(buf, len, "irq %d", APIC_IRQ_LEGACY_IRQ(ih));
    422 
    423 #elif NLAPIC > 0
    424 	snprintf(buf, len, "irq %d", APIC_IRQ_LEGACY_IRQ(ih));
    425 #else
    426 	snprintf(buf, len, "irq %d", (int) ih);
    427 #endif
    428 	return buf;
    429 
    430 }
    431 
    432 /*
    433  * Create an interrupt id such as "ioapic0 pin 9". This interrupt id is used
    434  * by MI code and intrctl(8).
    435  */
    436 const char * xen_intr_create_intrid(int legacy_irq, struct pic *pic,
    437     int pin, char *buf, size_t len);
    438 
    439 const char *
    440 xen_intr_create_intrid(int legacy_irq, struct pic *pic, int pin, char *buf, size_t len)
    441 {
    442 	int ih = 0;
    443 
    444 #if NPCI > 0
    445 #if defined(__HAVE_PCI_MSI_MSIX)
    446 	if ((pic->pic_type == PIC_MSI) || (pic->pic_type == PIC_MSIX)) {
    447 		uint64_t pih;
    448 		int dev, vec;
    449 
    450 		dev = msipic_get_devid(pic);
    451 		vec = pin;
    452 		pih = __SHIFTIN((uint64_t)dev, MSI_INT_DEV_MASK)
    453 			| __SHIFTIN((uint64_t)vec, MSI_INT_VEC_MASK)
    454 			| APIC_INT_VIA_MSI;
    455 		if (pic->pic_type == PIC_MSI)
    456 			MSI_INT_MAKE_MSI(pih);
    457 		else if (pic->pic_type == PIC_MSIX)
    458 			MSI_INT_MAKE_MSIX(pih);
    459 
    460 		return x86_pci_msi_string(NULL, pih, buf, len);
    461 	}
    462 #endif /* __HAVE_PCI_MSI_MSIX */
    463 #endif
    464 
    465 	if (pic->pic_type == PIC_XEN) {
    466 		ih = pin;	/* Port == pin */
    467 		return xen_intr_string(pin, buf, len, pic);
    468 	}
    469 
    470 	/*
    471 	 * If the device is pci, "legacy_irq" is alway -1. Least 8 bit of "ih"
    472 	 * is only used in intr_string() to show the irq number.
    473 	 * If the device is "legacy"(such as floppy), it should not use
    474 	 * intr_string().
    475 	 */
    476 	if (pic->pic_type == PIC_I8259) {
    477 		ih = legacy_irq;
    478 		return legacy_intr_string(ih, buf, len, pic);
    479 	}
    480 
    481 #if NIOAPIC > 0 || NACPICA > 0
    482 	ih = ((pic->pic_apicid << APIC_INT_APIC_SHIFT) & APIC_INT_APIC_MASK)
    483 	    | ((pin << APIC_INT_PIN_SHIFT) & APIC_INT_PIN_MASK);
    484 	if (pic->pic_type == PIC_IOAPIC) {
    485 		ih |= APIC_INT_VIA_APIC;
    486 	}
    487 	ih |= pin;
    488 	return intr_string(ih, buf, len);
    489 #endif
    490 
    491 	return NULL; /* No pic found! */
    492 }
    493 
    494 #if !defined(XENPVHVM)
    495 __strong_alias(spllower, xen_spllower);
    496 __strong_alias(x86_disable_intr, xen_disable_intr);
    497 __strong_alias(x86_enable_intr, xen_enable_intr);
    498 __strong_alias(x86_read_psl, xen_read_psl);
    499 __strong_alias(x86_write_psl, xen_write_psl);
    500 
    501 __strong_alias(intr_string, xintr_string);
    502 __strong_alias(intr_create_intrid, xen_intr_create_intrid);
    503 __strong_alias(intr_establish, xen_intr_establish);
    504 __strong_alias(intr_establish_xname, xen_intr_establish_xname);
    505 __strong_alias(intr_disestablish, xen_intr_disestablish);
    506 __strong_alias(cpu_intr_redistribute, xen_cpu_intr_redistribute);
    507 __strong_alias(cpu_intr_count, xen_cpu_intr_count);
    508 __strong_alias(cpu_intr_init, xen_cpu_intr_init);
    509 #endif /* !XENPVHVM */
    510