Home | History | Annotate | Line # | Download | only in x86
xen_intr.c revision 1.17.2.1 
      1 /*	$NetBSD: xen_intr.c,v 1.17.2.1 2023/07/31 14:56:19 martin Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Charles M. Hannum, and by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: xen_intr.c,v 1.17.2.1 2023/07/31 14:56:19 martin Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/kernel.h>
     37 #include <sys/kmem.h>
     38 
     39 #include <sys/cpu.h>
     40 
     41 #include <xen/evtchn.h>
     42 #include <xen/xenfunc.h>
     43 
     44 #include <uvm/uvm.h>
     45 
     46 #include <machine/cpu.h>
     47 #include <machine/intr.h>
     48 
     49 #include "acpica.h"
     50 #include "ioapic.h"
     51 #include "lapic.h"
     52 #include "pci.h"
     53 
     54 #if NACPICA > 0
     55 #include <dev/acpi/acpivar.h>
     56 #endif
     57 
     58 #if NIOAPIC > 0 || NACPICA > 0
     59 #include <machine/i82093var.h>
     60 #endif
     61 
     62 #if NLAPIC > 0
     63 #include <machine/i82489var.h>
     64 #endif
     65 
     66 #if NPCI > 0
     67 #include <dev/pci/ppbreg.h>
     68 #endif
     69 
     70 /*
     71  * Restore a value to cpl (unmasking interrupts).  If any unmasked
     72  * interrupts are pending, call Xspllower() to process them.
     73  */
     74 void xen_spllower(int nlevel);
     75 
     76 void
     77 xen_spllower(int nlevel)
     78 {
     79 	struct cpu_info *ci = curcpu();
     80 	uint32_t xmask;
     81 	u_long psl;
     82 
     83 	if (ci->ci_ilevel <= nlevel)
     84 		return;
     85 
     86 	__insn_barrier();
     87 
     88 	xmask = XUNMASK(ci, nlevel);
     89 	psl = xen_read_psl();
     90 	x86_disable_intr();
     91 	if (ci->ci_xpending & xmask) {
     92 		KASSERT(psl == 0);
     93 		Xspllower(nlevel);
     94 		/* Xspllower does enable_intr() */
     95 	} else {
     96 		ci->ci_ilevel = nlevel;
     97 		xen_write_psl(psl);
     98 	}
     99 }
    100 
    101 
    102 #if !defined(XENPVHVM)
    103 void
    104 x86_disable_intr(void)
    105 {
    106 
    107 	kpreempt_disable();
    108 	curcpu()->ci_vcpu->evtchn_upcall_mask = 1;
    109 	kpreempt_enable();
    110 
    111 	__insn_barrier();
    112 }
    113 
    114 void
    115 x86_enable_intr(void)
    116 {
    117 	struct cpu_info *ci;
    118 
    119 	__insn_barrier();
    120 
    121 	kpreempt_disable();
    122 	ci = curcpu();
    123 	ci->ci_vcpu->evtchn_upcall_mask = 0;
    124 	__insn_barrier();
    125 	if (__predict_false(ci->ci_vcpu->evtchn_upcall_pending))
    126 		hypervisor_force_callback();
    127 	kpreempt_enable();
    128 }
    129 
    130 #endif /* !XENPVHVM */
    131 
    132 u_long
    133 xen_read_psl(void)
    134 {
    135 	u_long psl;
    136 
    137 	kpreempt_disable();
    138 	psl = curcpu()->ci_vcpu->evtchn_upcall_mask;
    139 	kpreempt_enable();
    140 
    141 	return psl;
    142 }
    143 
    144 void
    145 xen_write_psl(u_long psl)
    146 {
    147 	struct cpu_info *ci;
    148 
    149 	kpreempt_disable();
    150 	ci = curcpu();
    151 	ci->ci_vcpu->evtchn_upcall_mask = psl;
    152 	__insn_barrier();
    153 	if (__predict_false(ci->ci_vcpu->evtchn_upcall_pending) && psl == 0)
    154 	    	hypervisor_force_callback();
    155 	kpreempt_enable();
    156 }
    157 
    158 void *
    159 xen_intr_establish(int legacy_irq, struct pic *pic, int pin,
    160     int type, int level, int (*handler)(void *), void *arg,
    161     bool known_mpsafe)
    162 {
    163 
    164 	return xen_intr_establish_xname(legacy_irq, pic, pin, type, level,
    165 	    handler, arg, known_mpsafe, "XEN");
    166 }
    167 
    168 void *
    169 xen_intr_establish_xname(int legacy_irq, struct pic *pic, int pin,
    170     int type, int level, int (*handler)(void *), void *arg,
    171     bool known_mpsafe, const char *xname)
    172 {
    173 	const char *intrstr;
    174 	char intrstr_buf[INTRIDBUF];
    175 
    176 	if (pic->pic_type == PIC_XEN) {
    177 		struct intrhand *rih;
    178 
    179 		/*
    180 		 * event_set_handler interprets `level != IPL_VM' to
    181 		 * mean MP-safe, so we require the caller to match that
    182 		 * for the moment.
    183 		 */
    184 		KASSERT(known_mpsafe == (level != IPL_VM));
    185 
    186 		intrstr = intr_create_intrid(legacy_irq, pic, pin, intrstr_buf,
    187 		    sizeof(intrstr_buf));
    188 
    189 		event_set_handler(pin, handler, arg, level, intrstr, xname);
    190 
    191 		rih = kmem_zalloc(sizeof(*rih), cold ? KM_NOSLEEP : KM_SLEEP);
    192 		if (rih == NULL) {
    193 			printf("%s: can't allocate handler info\n", __func__);
    194 			return NULL;
    195 		}
    196 
    197 		/*
    198 		 * XXX:
    199 		 * This is just a copy for API conformance.
    200 		 * The real ih is lost in the innards of
    201 		 * event_set_handler(); where the details of
    202 		 * biglock_wrapper etc are taken care of.
    203 		 * All that goes away when we nuke event_set_handler()
    204 		 * et. al. and unify with x86/intr.c
    205 		 */
    206 		rih->ih_pin = pin; /* port */
    207 		rih->ih_fun = rih->ih_realfun = handler;
    208 		rih->ih_arg = rih->ih_realarg = arg;
    209 		rih->pic_type = pic->pic_type;
    210 		return rih;
    211 	} 	/* Else we assume pintr */
    212 
    213 #if (NPCI > 0 || NISA > 0) && defined(XENPV) /* XXX: support PVHVM pirq */
    214 	struct pintrhand *pih;
    215 	int gsi;
    216 	int vector, evtchn;
    217 
    218 	KASSERTMSG(legacy_irq == -1 || (0 <= legacy_irq && legacy_irq < NUM_XEN_IRQS),
    219 	    "bad legacy IRQ value: %d", legacy_irq);
    220 	KASSERTMSG(!(legacy_irq == -1 && pic == &i8259_pic),
    221 	    "non-legacy IRQon i8259 ");
    222 
    223 	gsi = xen_pic_to_gsi(pic, pin);
    224 
    225 	intrstr = intr_create_intrid(gsi, pic, pin, intrstr_buf,
    226 	    sizeof(intrstr_buf));
    227 
    228 	vector = xen_vec_alloc(gsi);
    229 
    230 	if (irq2port[gsi] == 0) {
    231 		extern struct cpu_info phycpu_info_primary; /* XXX */
    232 		struct cpu_info *ci = &phycpu_info_primary;
    233 
    234 		pic->pic_addroute(pic, ci, pin, vector, type);
    235 
    236 		evtchn = bind_pirq_to_evtch(gsi);
    237 		KASSERT(evtchn > 0);
    238 		KASSERT(evtchn < NR_EVENT_CHANNELS);
    239 		irq2port[gsi] = evtchn + 1;
    240 		xen_atomic_set_bit(&ci->ci_evtmask[0], evtchn);
    241 	} else {
    242 		/*
    243 		 * Shared interrupt - we can't rebind.
    244 		 * The port is shared instead.
    245 		 */
    246 		evtchn = irq2port[gsi] - 1;
    247 	}
    248 
    249 	pih = pirq_establish(gsi, evtchn, handler, arg, level,
    250 			     intrstr, xname);
    251 	pih->pic_type = pic->pic_type;
    252 	return pih;
    253 #endif /* NPCI > 0 || NISA > 0 */
    254 
    255 	/* FALLTHROUGH */
    256 	return NULL;
    257 }
    258 
    259 /*
    260  * Deregister an interrupt handler.
    261  */
    262 void
    263 xen_intr_disestablish(struct intrhand *ih)
    264 {
    265 
    266 	if (ih->pic_type == PIC_XEN) {
    267 		event_remove_handler(ih->ih_pin, ih->ih_realfun,
    268 		    ih->ih_realarg);
    269 		kmem_free(ih, sizeof(*ih));
    270 		return;
    271 	}
    272 #if defined(DOM0OPS)
    273 	/*
    274 	 * Cache state, to prevent a use after free situation with
    275 	 * ih.
    276 	 */
    277 
    278 	struct pintrhand *pih = (struct pintrhand *)ih;
    279 
    280 	int pirq = pih->pirq;
    281 	int port = pih->evtch;
    282 	KASSERT(irq2port[pirq] != 0);
    283 
    284 	pirq_disestablish(pih);
    285 
    286 	if (evtsource[port] == NULL) {
    287 			/*
    288 			 * Last handler was removed by
    289 			 * event_remove_handler().
    290 			 *
    291 			 * We can safely unbind the pirq now.
    292 			 */
    293 
    294 			port = unbind_pirq_from_evtch(pirq);
    295 			KASSERT(port == pih->evtch);
    296 			irq2port[pirq] = 0;
    297 	}
    298 #endif
    299 	return;
    300 }
    301 
    302 /* MI interface for kern_cpu.c */
    303 void xen_cpu_intr_redistribute(void);
    304 
    305 void
    306 xen_cpu_intr_redistribute(void)
    307 {
    308 	KASSERT(mutex_owned(&cpu_lock));
    309 	KASSERT(mp_online);
    310 
    311 	return;
    312 }
    313 
    314 /* MD - called by x86/cpu.c */
    315 #if defined(INTRSTACKSIZE)
    316 static inline bool
    317 redzone_const_or_false(bool x)
    318 {
    319 #ifdef DIAGNOSTIC
    320 	return x;
    321 #else
    322 	return false;
    323 #endif /* !DIAGNOSTIC */
    324 }
    325 
    326 static inline int
    327 redzone_const_or_zero(int x)
    328 {
    329 	return redzone_const_or_false(true) ? x : 0;
    330 }
    331 #endif
    332 
    333 void xen_cpu_intr_init(struct cpu_info *);
    334 void
    335 xen_cpu_intr_init(struct cpu_info *ci)
    336 {
    337 	int i; /* XXX: duplicate */
    338 
    339 	ci->ci_xunmask[0] = 0xfffffffe;
    340 	for (i = 1; i < NIPL; i++)
    341 		ci->ci_xunmask[i] = ci->ci_xunmask[i - 1] & ~(1 << i);
    342 
    343 #if defined(INTRSTACKSIZE)
    344 	vaddr_t istack;
    345 
    346 	/*
    347 	 * If the red zone is activated, protect both the top and
    348 	 * the bottom of the stack with an unmapped page.
    349 	 */
    350 	istack = uvm_km_alloc(kernel_map,
    351 	    INTRSTACKSIZE + redzone_const_or_zero(2 * PAGE_SIZE), 0,
    352 	    UVM_KMF_WIRED|UVM_KMF_ZERO);
    353 	if (redzone_const_or_false(true)) {
    354 		pmap_kremove(istack, PAGE_SIZE);
    355 		pmap_kremove(istack + INTRSTACKSIZE + PAGE_SIZE, PAGE_SIZE);
    356 		pmap_update(pmap_kernel());
    357 	}
    358 
    359 	/*
    360 	 * 33 used to be 1.  Arbitrarily reserve 32 more register_t's
    361 	 * of space for ddb(4) to examine some subroutine arguments
    362 	 * and to hunt for the next stack frame.
    363 	 */
    364 	ci->ci_intrstack = (char *)istack + redzone_const_or_zero(PAGE_SIZE) +
    365 	    INTRSTACKSIZE - 33 * sizeof(register_t);
    366 #endif
    367 
    368 	ci->ci_idepth = -1;
    369 }
    370 
    371 /*
    372  * Everything below from here is duplicated from x86/intr.c
    373  * When intr.c and xen_intr.c are unified, these will need to be
    374  * merged.
    375  */
    376 
    377 u_int xen_cpu_intr_count(struct cpu_info *ci);
    378 
    379 u_int
    380 xen_cpu_intr_count(struct cpu_info *ci)
    381 {
    382 
    383 	KASSERT(ci->ci_nintrhand >= 0);
    384 
    385 	return ci->ci_nintrhand;
    386 }
    387 
    388 static const char *
    389 xen_intr_string(int port, char *buf, size_t len, struct pic *pic)
    390 {
    391 	KASSERT(pic->pic_type == PIC_XEN);
    392 
    393 	KASSERT(port >= 0);
    394 	KASSERT(port < NR_EVENT_CHANNELS);
    395 
    396 	snprintf(buf, len, "%s channel %d", pic->pic_name, port);
    397 
    398 	return buf;
    399 }
    400 
    401 static const char *
    402 legacy_intr_string(int ih, char *buf, size_t len, struct pic *pic)
    403 {
    404 	int legacy_irq;
    405 
    406 	KASSERT(pic->pic_type == PIC_I8259);
    407 #if NLAPIC > 0
    408 	KASSERT(APIC_IRQ_ISLEGACY(ih));
    409 
    410 	legacy_irq = APIC_IRQ_LEGACY_IRQ(ih);
    411 #else
    412 	legacy_irq = ih;
    413 #endif
    414 	KASSERT(legacy_irq >= 0 && legacy_irq < 16);
    415 
    416 	snprintf(buf, len, "%s pin %d", pic->pic_name, legacy_irq);
    417 
    418 	return buf;
    419 }
    420 
    421 const char * xintr_string(intr_handle_t ih, char *buf, size_t len);
    422 
    423 const char *
    424 xintr_string(intr_handle_t ih, char *buf, size_t len)
    425 {
    426 #if NIOAPIC > 0
    427 	struct ioapic_softc *pic;
    428 #endif
    429 
    430 	if (ih == 0)
    431 		panic("%s: bogus handle 0x%" PRIx64, __func__, ih);
    432 
    433 #if NIOAPIC > 0
    434 	if (ih & APIC_INT_VIA_APIC) {
    435 		pic = ioapic_find(APIC_IRQ_APIC(ih));
    436 		if (pic != NULL) {
    437 			snprintf(buf, len, "%s pin %d",
    438 			    device_xname(pic->sc_dev), APIC_IRQ_PIN(ih));
    439 		} else {
    440 			snprintf(buf, len,
    441 			    "apic %d int %d (irq %d)",
    442 			    APIC_IRQ_APIC(ih),
    443 			    APIC_IRQ_PIN(ih),
    444 			    APIC_IRQ_LEGACY_IRQ(ih));
    445 		}
    446 	} else
    447 		snprintf(buf, len, "irq %d", APIC_IRQ_LEGACY_IRQ(ih));
    448 
    449 #elif NLAPIC > 0
    450 	snprintf(buf, len, "irq %d", APIC_IRQ_LEGACY_IRQ(ih));
    451 #else
    452 	snprintf(buf, len, "irq %d", (int) ih);
    453 #endif
    454 	return buf;
    455 
    456 }
    457 
    458 /*
    459  * Create an interrupt id such as "ioapic0 pin 9". This interrupt id is used
    460  * by MI code and intrctl(8).
    461  */
    462 const char * xen_intr_create_intrid(int legacy_irq, struct pic *pic,
    463     int pin, char *buf, size_t len);
    464 
    465 const char *
    466 xen_intr_create_intrid(int legacy_irq, struct pic *pic, int pin, char *buf, size_t len)
    467 {
    468 	int ih = 0;
    469 
    470 #if NPCI > 0
    471 #if defined(__HAVE_PCI_MSI_MSIX)
    472 	if ((pic->pic_type == PIC_MSI) || (pic->pic_type == PIC_MSIX)) {
    473 		uint64_t pih;
    474 		int dev, vec;
    475 
    476 		dev = msipic_get_devid(pic);
    477 		vec = pin;
    478 		pih = __SHIFTIN((uint64_t)dev, MSI_INT_DEV_MASK)
    479 			| __SHIFTIN((uint64_t)vec, MSI_INT_VEC_MASK)
    480 			| APIC_INT_VIA_MSI;
    481 		if (pic->pic_type == PIC_MSI)
    482 			MSI_INT_MAKE_MSI(pih);
    483 		else if (pic->pic_type == PIC_MSIX)
    484 			MSI_INT_MAKE_MSIX(pih);
    485 
    486 		return x86_pci_msi_string(NULL, pih, buf, len);
    487 	}
    488 #endif /* __HAVE_PCI_MSI_MSIX */
    489 #endif
    490 
    491 	if (pic->pic_type == PIC_XEN) {
    492 		ih = pin;	/* Port == pin */
    493 		return xen_intr_string(pin, buf, len, pic);
    494 	}
    495 
    496 	/*
    497 	 * If the device is pci, "legacy_irq" is alway -1. Least 8 bit of "ih"
    498 	 * is only used in intr_string() to show the irq number.
    499 	 * If the device is "legacy"(such as floppy), it should not use
    500 	 * intr_string().
    501 	 */
    502 	if (pic->pic_type == PIC_I8259) {
    503 		ih = legacy_irq;
    504 		return legacy_intr_string(ih, buf, len, pic);
    505 	}
    506 
    507 #if NIOAPIC > 0 || NACPICA > 0
    508 	ih = ((pic->pic_apicid << APIC_INT_APIC_SHIFT) & APIC_INT_APIC_MASK)
    509 	    | ((pin << APIC_INT_PIN_SHIFT) & APIC_INT_PIN_MASK);
    510 	if (pic->pic_type == PIC_IOAPIC) {
    511 		ih |= APIC_INT_VIA_APIC;
    512 	}
    513 	ih |= pin;
    514 	return intr_string(ih, buf, len);
    515 #endif
    516 
    517 	return NULL; /* No pic found! */
    518 }
    519 
    520 #if !defined(XENPVHVM)
    521 __strong_alias(spllower, xen_spllower);
    522 __strong_alias(x86_read_psl, xen_read_psl);
    523 __strong_alias(x86_write_psl, xen_write_psl);
    524 
    525 __strong_alias(intr_string, xintr_string);
    526 __strong_alias(intr_create_intrid, xen_intr_create_intrid);
    527 __strong_alias(intr_establish, xen_intr_establish);
    528 __strong_alias(intr_establish_xname, xen_intr_establish_xname);
    529 __strong_alias(intr_disestablish, xen_intr_disestablish);
    530 __strong_alias(cpu_intr_redistribute, xen_cpu_intr_redistribute);
    531 __strong_alias(cpu_intr_count, xen_cpu_intr_count);
    532 __strong_alias(cpu_intr_init, xen_cpu_intr_init);
    533 #endif /* !XENPVHVM */
    534