scoop_pcic.c revision 1.1 1 1.1 ober /* $NetBSD: scoop_pcic.c,v 1.1 2006/12/16 05:17:30 ober Exp $ */
2 1.1 ober /* $OpenBSD: scoop_pcic.c,v 1.1 2005/07/01 23:51:55 uwe Exp $ */
3 1.1 ober
4 1.1 ober /*
5 1.1 ober * Copyright (c) 2005 Uwe Stuehler <uwe (at) bsdx.de>
6 1.1 ober *
7 1.1 ober * Permission to use, copy, modify, and distribute this software for any
8 1.1 ober * purpose with or without fee is hereby granted, provided that the above
9 1.1 ober * copyright notice and this permission notice appear in all copies.
10 1.1 ober *
11 1.1 ober * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 ober * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 ober * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 ober * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 ober * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 ober * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 ober * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 ober */
19 1.1 ober
20 1.1 ober #include <sys/cdefs.h>
21 1.1 ober __KERNEL_RCSID(0, "$NetBSD: scoop_pcic.c,v 1.1 2006/12/16 05:17:30 ober Exp $");
22 1.1 ober
23 1.1 ober #include <sys/param.h>
24 1.1 ober #include <sys/systm.h>
25 1.1 ober #include <sys/device.h>
26 1.1 ober
27 1.1 ober #include <uvm/uvm.h>
28 1.1 ober
29 1.1 ober #include <arch/arm/xscale/pxa2x0var.h>
30 1.1 ober #include <arch/arm/xscale/pxa2x0_pcicvar.h>
31 1.1 ober
32 1.1 ober #include <zaurus/zaurus/zaurus_reg.h>
33 1.1 ober #include <zaurus/zaurus/zaurus_var.h>
34 1.1 ober
35 1.1 ober #include <zaurus/dev/scoopreg.h>
36 1.1 ober
37 1.1 ober static int scoop_pcic_match(struct device *, struct cfdata *, void *);
38 1.1 ober static void scoop_pcic_attach(struct device *, struct device *, void *);
39 1.1 ober
40 1.1 ober CFATTACH_DECL(pxapcic_scoop, sizeof(struct pxapcic_softc),
41 1.1 ober scoop_pcic_match, scoop_pcic_attach, NULL, NULL);
42 1.1 ober
43 1.1 ober static void scoop_pcic_socket_setup(struct pxapcic_socket *);
44 1.1 ober static u_int scoop_pcic_read(struct pxapcic_socket *, int);
45 1.1 ober static void scoop_pcic_write(struct pxapcic_socket *, int, u_int);
46 1.1 ober static void scoop_pcic_set_power(struct pxapcic_socket *, int);
47 1.1 ober static void scoop_pcic_clear_intr(struct pxapcic_socket *);
48 1.1 ober
49 1.1 ober struct pxapcic_tag scoop_pcic_functions = {
50 1.1 ober scoop_pcic_read,
51 1.1 ober scoop_pcic_write,
52 1.1 ober scoop_pcic_set_power,
53 1.1 ober scoop_pcic_clear_intr,
54 1.1 ober 0, /* intr_establish */
55 1.1 ober 0, /* intr_disestablish */
56 1.1 ober 0 /* intr_string */
57 1.1 ober };
58 1.1 ober
59 1.1 ober static int
60 1.1 ober scoop_pcic_match(struct device *parent, struct cfdata *cf, void *aux)
61 1.1 ober {
62 1.1 ober
63 1.1 ober return (ZAURUS_ISC860 || ZAURUS_ISC3000);
64 1.1 ober }
65 1.1 ober
66 1.1 ober static void
67 1.1 ober scoop_pcic_attach(struct device *parent, struct device *self, void *aux)
68 1.1 ober {
69 1.1 ober struct pxapcic_softc *sc = (struct pxapcic_softc *)self;
70 1.1 ober struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux;
71 1.1 ober
72 1.1 ober sc->sc_iot = pxa->pxa_iot;
73 1.1 ober
74 1.1 ober if (ZAURUS_ISC860) {
75 1.1 ober sc->sc_nslots = 1;
76 1.1 ober sc->sc_irqpin[0] = C860_CF0_IRQ;
77 1.1 ober sc->sc_irqcfpin[0] = C860_CF0_IRQ_PIN;
78 1.1 ober } else if (ZAURUS_ISC3000) {
79 1.1 ober sc->sc_nslots = 2;
80 1.1 ober sc->sc_irqpin[0] = C3000_CF0_IRQ;
81 1.1 ober sc->sc_irqcfpin[0] = C3000_CF0_IRQ_PIN;
82 1.1 ober sc->sc_irqpin[1] = C3000_CF1_IRQ;
83 1.1 ober sc->sc_irqcfpin[1] = C3000_CF1_IRQ_PIN;
84 1.1 ober }
85 1.1 ober sc->sc_flags |= PXAPCIC_FLAG_REVERSE_ATTACH;
86 1.1 ober
87 1.1 ober pxapcic_attach(sc, &scoop_pcic_socket_setup);
88 1.1 ober }
89 1.1 ober
90 1.1 ober static void
91 1.1 ober scoop_pcic_socket_setup(struct pxapcic_socket *so)
92 1.1 ober {
93 1.1 ober struct pxapcic_softc *sc;
94 1.1 ober bus_addr_t pa;
95 1.1 ober bus_size_t size = SCOOP_SIZE;
96 1.1 ober bus_space_tag_t iot;
97 1.1 ober bus_space_handle_t scooph;
98 1.1 ober int error;
99 1.1 ober
100 1.1 ober sc = so->sc;
101 1.1 ober iot = sc->sc_iot;
102 1.1 ober
103 1.1 ober if (so->socket == 0) {
104 1.1 ober pa = C3000_SCOOP0_BASE;
105 1.1 ober } else if (so->socket == 1) {
106 1.1 ober pa = C3000_SCOOP1_BASE;
107 1.1 ober } else {
108 1.1 ober panic("%s: invalid CF slot %d", sc->sc_dev.dv_xname,
109 1.1 ober so->socket);
110 1.1 ober }
111 1.1 ober
112 1.1 ober error = bus_space_map(iot, trunc_page(pa), round_page(size),
113 1.1 ober 0, &scooph);
114 1.1 ober if (error) {
115 1.1 ober panic("%s: failed to map memory %x for scoop",
116 1.1 ober sc->sc_dev.dv_xname, (uint32_t)pa);
117 1.1 ober }
118 1.1 ober scooph += pa - trunc_page(pa);
119 1.1 ober
120 1.1 ober bus_space_write_2(iot, scooph, SCOOP_IMR,
121 1.1 ober SCP_IMR_UNKN0 | SCP_IMR_UNKN1);
122 1.1 ober
123 1.1 ober /* setup */
124 1.1 ober bus_space_write_2(iot, scooph, SCOOP_MCR, 0x0100);
125 1.1 ober bus_space_write_2(iot, scooph, SCOOP_CDR, 0x0000);
126 1.1 ober bus_space_write_2(iot, scooph, SCOOP_CPR, 0x0000);
127 1.1 ober bus_space_write_2(iot, scooph, SCOOP_IMR, 0x0000);
128 1.1 ober bus_space_write_2(iot, scooph, SCOOP_IRM, 0x00ff);
129 1.1 ober bus_space_write_2(iot, scooph, SCOOP_ISR, 0x0000);
130 1.1 ober bus_space_write_2(iot, scooph, SCOOP_IRM, 0x0000);
131 1.1 ober
132 1.1 ober /* C3000 */
133 1.1 ober if (so->socket == 1) {
134 1.1 ober bus_space_write_2(iot, scooph, SCOOP_CPR, 0x80c1);
135 1.1 ober bus_space_write_2(iot, scooph, SCOOP_IMR, 0x00c4);
136 1.1 ober bus_space_write_2(iot, scooph, SCOOP_MCR, 0x0111);
137 1.1 ober } else {
138 1.1 ober bus_space_write_2(iot, scooph, SCOOP_CPR,
139 1.1 ober SCP_CPR_PWR|SCP_CPR_5V);
140 1.1 ober }
141 1.1 ober
142 1.1 ober bus_space_write_2(iot, scooph, SCOOP_IMR, 0x00ce);
143 1.1 ober bus_space_write_2(iot, scooph, SCOOP_MCR, 0x0111);
144 1.1 ober
145 1.1 ober /* C3000 */
146 1.1 ober so->power_capability = PXAPCIC_POWER_3V;
147 1.1 ober if (so->socket == 0)
148 1.1 ober so->power_capability |= PXAPCIC_POWER_5V;
149 1.1 ober
150 1.1 ober so->pcictag_cookie = (void *)scooph;
151 1.1 ober so->pcictag = &scoop_pcic_functions;
152 1.1 ober }
153 1.1 ober
154 1.1 ober static u_int
155 1.1 ober scoop_pcic_read(struct pxapcic_socket *so, int reg)
156 1.1 ober {
157 1.1 ober bus_space_tag_t iot = so->sc->sc_iot;
158 1.1 ober bus_space_handle_t ioh = (bus_space_handle_t)so->pcictag_cookie;
159 1.1 ober uint16_t csr;
160 1.1 ober
161 1.1 ober csr = bus_space_read_2(iot, ioh, SCOOP_CSR);
162 1.1 ober
163 1.1 ober switch (reg) {
164 1.1 ober case PXAPCIC_CARD_STATUS:
165 1.1 ober if (csr & SCP_CSR_MISSING)
166 1.1 ober return (PXAPCIC_CARD_INVALID);
167 1.1 ober else
168 1.1 ober return (PXAPCIC_CARD_VALID);
169 1.1 ober
170 1.1 ober case PXAPCIC_CARD_READY:
171 1.1 ober return ((bus_space_read_2(iot, ioh, SCOOP_CSR) &
172 1.1 ober SCP_CSR_READY) != 0);
173 1.1 ober
174 1.1 ober default:
175 1.1 ober panic("scoop_pcic_read: bogus register");
176 1.1 ober }
177 1.1 ober /*NOTREACHED*/
178 1.1 ober }
179 1.1 ober
180 1.1 ober static void
181 1.1 ober scoop_pcic_write(struct pxapcic_socket *so, int reg, u_int val)
182 1.1 ober {
183 1.1 ober bus_space_tag_t iot = so->sc->sc_iot;
184 1.1 ober bus_space_handle_t ioh = (bus_space_handle_t)so->pcictag_cookie;
185 1.1 ober uint16_t newval;
186 1.1 ober int s;
187 1.1 ober
188 1.1 ober s = splhigh();
189 1.1 ober
190 1.1 ober switch (reg) {
191 1.1 ober case PXAPCIC_CARD_POWER:
192 1.1 ober newval = bus_space_read_2(iot, ioh, SCOOP_CPR);
193 1.1 ober newval &= ~(SCP_CPR_PWR | SCP_CPR_3V | SCP_CPR_5V);
194 1.1 ober
195 1.1 ober if (val == PXAPCIC_POWER_3V)
196 1.1 ober newval |= (SCP_CPR_PWR | SCP_CPR_3V);
197 1.1 ober else if (val == PXAPCIC_POWER_5V)
198 1.1 ober newval |= (SCP_CPR_PWR | SCP_CPR_5V);
199 1.1 ober
200 1.1 ober bus_space_write_2(iot, ioh, SCOOP_CPR, newval);
201 1.1 ober break;
202 1.1 ober
203 1.1 ober case PXAPCIC_CARD_RESET:
204 1.1 ober bus_space_write_2(iot, ioh, SCOOP_CCR,
205 1.1 ober val ? SCP_CCR_RESET : 0);
206 1.1 ober break;
207 1.1 ober
208 1.1 ober default:
209 1.1 ober panic("scoop_pcic_write: bogus register");
210 1.1 ober }
211 1.1 ober
212 1.1 ober splx(s);
213 1.1 ober }
214 1.1 ober
215 1.1 ober static void
216 1.1 ober scoop_pcic_set_power(struct pxapcic_socket *so, int pwr)
217 1.1 ober {
218 1.1 ober bus_space_tag_t iot = so->sc->sc_iot;
219 1.1 ober bus_space_handle_t ioh = (bus_space_handle_t)so->pcictag_cookie;
220 1.1 ober u_int16_t reg;
221 1.1 ober int s;
222 1.1 ober
223 1.1 ober s = splhigh();
224 1.1 ober
225 1.1 ober switch (pwr) {
226 1.1 ober case PXAPCIC_POWER_OFF:
227 1.1 ober #if 0
228 1.1 ober /* XXX does this disable power to both sockets? */
229 1.1 ober reg = bus_space_read_2(iot, ioh, SCOOP_GPWR);
230 1.1 ober bus_space_write_2(iot, ioh, SCOOP_GPWR,
231 1.1 ober reg & ~(1 << SCOOP0_CF_POWER_C3000));
232 1.1 ober #endif
233 1.1 ober break;
234 1.1 ober
235 1.1 ober case PXAPCIC_POWER_3V:
236 1.1 ober case PXAPCIC_POWER_5V:
237 1.1 ober /* XXX */
238 1.1 ober if (so->socket == 0) {
239 1.1 ober reg = bus_space_read_2(iot, ioh, SCOOP_GPWR);
240 1.1 ober bus_space_write_2(iot, ioh, SCOOP_GPWR,
241 1.1 ober reg | (1 << SCOOP0_CF_POWER_C3000));
242 1.1 ober }
243 1.1 ober break;
244 1.1 ober
245 1.1 ober default:
246 1.1 ober splx(s);
247 1.1 ober panic("scoop_pcic_set_power: bogus power state");
248 1.1 ober }
249 1.1 ober
250 1.1 ober splx(s);
251 1.1 ober }
252 1.1 ober
253 1.1 ober static void
254 1.1 ober scoop_pcic_clear_intr(struct pxapcic_socket *so)
255 1.1 ober {
256 1.1 ober bus_space_tag_t iot = so->sc->sc_iot;
257 1.1 ober bus_space_handle_t ioh = (bus_space_handle_t)so->pcictag_cookie;
258 1.1 ober
259 1.1 ober bus_space_write_2(iot, ioh, SCOOP_IRM, 0x00ff);
260 1.1 ober bus_space_write_2(iot, ioh, SCOOP_ISR, 0x0000);
261 1.1 ober bus_space_write_2(iot, ioh, SCOOP_IRM, 0x0000);
262 1.1 ober }
263