zssp.c revision 1.2 1 /* $NetBSD: zssp.c,v 1.2 2007/06/28 15:35:59 nonaka Exp $ */
2 /* $OpenBSD: zaurus_ssp.c,v 1.6 2005/04/08 21:58:49 uwe Exp $ */
3
4 /*
5 * Copyright (c) 2005 Uwe Stuehler <uwe (at) bsdx.de>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include <sys/cdefs.h>
21 __KERNEL_RCSID(0, "$NetBSD: zssp.c,v 1.2 2007/06/28 15:35:59 nonaka Exp $");
22
23 #include <sys/param.h>
24 #include <sys/systm.h>
25 #include <sys/device.h>
26
27 #include <machine/bus.h>
28
29 #include <arm/xscale/pxa2x0reg.h>
30 #include <arm/xscale/pxa2x0var.h>
31 #include <arm/xscale/pxa2x0_gpio.h>
32
33 #include <zaurus/dev/zsspvar.h>
34 #include <zaurus/zaurus/zaurus_var.h>
35
36 #define GPIO_ADS7846_CS_C3000 14 /* SSP SFRM */
37 #define GPIO_MAX1111_CS_C3000 20
38 #define GPIO_TG_CS_C3000 53
39
40 #define SSCR0_ADS7846_C3000 0x06ab /* 12bit/Microwire/div by 7 */
41 #define SSCR0_MAX1111 0x0387
42 #define SSCR0_LZ9JG18 0x01ab
43
44 struct zssp_softc {
45 struct device sc_dev;
46 bus_space_tag_t sc_iot;
47 bus_space_handle_t sc_ioh;
48 };
49
50 static int zssp_match(struct device *, struct cfdata *, void *);
51 static void zssp_attach(struct device *, struct device *, void *);
52
53 CFATTACH_DECL(zssp, sizeof(struct zssp_softc),
54 zssp_match, zssp_attach, NULL, NULL);
55
56 static void zssp_init(void);
57 static void zssp_powerhook(int, void *);
58
59 static struct zssp_softc *zssp_sc;
60
61 static int
62 zssp_match(struct device *parent, struct cfdata *cf, void *aux)
63 {
64
65 if (zssp_sc != NULL)
66 return 0;
67
68 return 1;
69 }
70
71 static void
72 zssp_attach(struct device *parent, struct device *self, void *aux)
73 {
74 struct zssp_softc *sc = (struct zssp_softc *)self;
75
76 sc->sc_iot = &pxa2x0_bs_tag;
77 if (bus_space_map(sc->sc_iot, PXA2X0_SSP1_BASE, PXA2X0_SSP_SIZE,
78 0, &sc->sc_ioh)) {
79 printf(": can't map bus space\n");
80 return;
81 }
82
83 zssp_sc = sc;
84
85 printf("\n");
86
87 if (powerhook_establish(sc->sc_dev.dv_xname, zssp_powerhook, sc)
88 == NULL) {
89 printf("%s: can't establish power hook\n",
90 sc->sc_dev.dv_xname);
91 }
92
93 zssp_init();
94 }
95
96 /*
97 * Initialize the dedicated SSP unit and disable all chip selects.
98 * This function is called with interrupts disabled.
99 */
100 static void
101 zssp_init(void)
102 {
103 struct zssp_softc *sc;
104
105 KASSERT(zssp_sc != NULL);
106 sc = zssp_sc;
107
108 pxa2x0_clkman_config(CKEN_SSP, 1);
109
110 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, SSCR0_LZ9JG18);
111 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR1, 0);
112
113 pxa2x0_gpio_set_function(GPIO_ADS7846_CS_C3000, GPIO_OUT|GPIO_SET);
114 pxa2x0_gpio_set_function(GPIO_MAX1111_CS_C3000, GPIO_OUT|GPIO_SET);
115 pxa2x0_gpio_set_function(GPIO_TG_CS_C3000, GPIO_OUT|GPIO_SET);
116 }
117
118 static void
119 zssp_powerhook(int why, void *arg)
120 {
121 int s;
122
123 if (why == PWR_RESUME) {
124 s = splhigh();
125 zssp_init();
126 splx(s);
127 }
128 }
129
130 /*
131 * Transmit a single data word to one of the ICs, keep the chip selected
132 * afterwards, and don't wait for data to be returned in SSDR. Interrupts
133 * must be held off until zssp_ic_stop() gets called.
134 */
135 void
136 zssp_ic_start(int ic, uint32_t data)
137 {
138 struct zssp_softc *sc;
139
140 KASSERT(zssp_sc != NULL);
141 sc = zssp_sc;
142
143 /* disable other ICs */
144 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0);
145 if (ic != ZSSP_IC_ADS7846)
146 pxa2x0_gpio_set_bit(GPIO_ADS7846_CS_C3000);
147 if (ic != ZSSP_IC_LZ9JG18)
148 pxa2x0_gpio_set_bit(GPIO_TG_CS_C3000);
149 if (ic != ZSSP_IC_MAX1111)
150 pxa2x0_gpio_set_bit(GPIO_MAX1111_CS_C3000);
151
152 /* activate the chosen one */
153 switch (ic) {
154 case ZSSP_IC_ADS7846:
155 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0,
156 SSCR0_ADS7846_C3000);
157 pxa2x0_gpio_clear_bit(GPIO_ADS7846_CS_C3000);
158 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, data);
159 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR)
160 & SSSR_TNF) != SSSR_TNF)
161 continue; /* poll */
162 break;
163 case ZSSP_IC_LZ9JG18:
164 pxa2x0_gpio_clear_bit(GPIO_TG_CS_C3000);
165 break;
166 case ZSSP_IC_MAX1111:
167 pxa2x0_gpio_clear_bit(GPIO_MAX1111_CS_C3000);
168 break;
169 }
170 }
171
172 /*
173 * Read the last value from SSDR and deactivate all chip-selects.
174 */
175 uint32_t
176 zssp_ic_stop(int ic)
177 {
178 struct zssp_softc *sc;
179 uint32_t rv;
180
181 KASSERT(zssp_sc != NULL);
182 sc = zssp_sc;
183
184 switch (ic) {
185 case ZSSP_IC_ADS7846:
186 /* read result of last command */
187 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR)
188 & SSSR_RNE) != SSSR_RNE)
189 continue; /* poll */
190 rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR);
191 break;
192 case ZSSP_IC_LZ9JG18:
193 case ZSSP_IC_MAX1111:
194 /* last value received is irrelevant or undefined */
195 default:
196 rv = 0;
197 break;
198 }
199
200 pxa2x0_gpio_set_bit(GPIO_ADS7846_CS_C3000);
201 pxa2x0_gpio_set_bit(GPIO_TG_CS_C3000);
202 pxa2x0_gpio_set_bit(GPIO_MAX1111_CS_C3000);
203
204 return rv;
205 }
206
207 /*
208 * Activate one of the chip-select lines, transmit one word value in
209 * each direction, and deactivate the chip-select again.
210 */
211 uint32_t
212 zssp_ic_send(int ic, uint32_t data)
213 {
214
215 switch (ic) {
216 case ZSSP_IC_MAX1111:
217 return (zssp_read_max1111(data));
218 case ZSSP_IC_ADS7846:
219 return (zssp_read_ads7846(data));
220 case ZSSP_IC_LZ9JG18:
221 zssp_write_lz9jg18(data);
222 return 0;
223 default:
224 printf("zssp_ic_send: invalid IC %d\n", ic);
225 return 0;
226 }
227 }
228
229 int
230 zssp_read_max1111(uint32_t cmd)
231 {
232 struct zssp_softc *sc;
233 int voltage[2];
234 int i;
235 int s;
236
237 KASSERT(zssp_sc != NULL);
238 sc = zssp_sc;
239
240 s = splhigh();
241
242 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0);
243 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, SSCR0_MAX1111);
244
245 pxa2x0_gpio_set_bit(GPIO_TG_CS_C3000);
246 pxa2x0_gpio_set_bit(GPIO_ADS7846_CS_C3000);
247 pxa2x0_gpio_clear_bit(GPIO_MAX1111_CS_C3000);
248
249 delay(1);
250
251 /* Send the command word and read a dummy word back. */
252 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, cmd);
253 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR)
254 & SSSR_TNF) != SSSR_TNF)
255 continue; /* poll */
256 /* XXX is this delay necessary? */
257 delay(1);
258 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR)
259 & SSSR_RNE) != SSSR_RNE)
260 continue; /* poll */
261 (void) bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR);
262
263 for (i = 0; i < 2; i++) {
264 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, 0);
265 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR)
266 & SSSR_TNF) != SSSR_TNF)
267 continue; /* poll */
268 /* XXX again, is this delay necessary? */
269 delay(1);
270 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR)
271 & SSSR_RNE) != SSSR_RNE)
272 continue; /* poll */
273 voltage[i] = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
274 SSP_SSDR);
275 }
276
277 pxa2x0_gpio_set_bit(GPIO_TG_CS_C3000);
278 pxa2x0_gpio_set_bit(GPIO_ADS7846_CS_C3000);
279 pxa2x0_gpio_set_bit(GPIO_MAX1111_CS_C3000);
280
281 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0);
282
283 splx(s);
284
285 /* XXX no idea what this means, but it's what Linux would do. */
286 if ((voltage[0] & 0xc0) != 0 || (voltage[1] & 0x3f) != 0) {
287 voltage[0] = -1;
288 } else {
289 voltage[0] = ((voltage[0] << 2) & 0xfc) |
290 ((voltage[1] >> 6) & 0x03);
291 }
292
293 return voltage[0];
294 }
295
296 /* XXX - only does CS_ADS7846 */
297 uint32_t
298 zssp_read_ads7846(uint32_t cmd)
299 {
300 struct zssp_softc *sc;
301 unsigned int cr0;
302 uint32_t val;
303 int s;
304
305 if (zssp_sc == NULL) {
306 printf("zssp_read_ads7846: not configured\n");
307 return 0;
308 }
309 sc = zssp_sc;
310
311 s = splhigh();
312
313 if (ZAURUS_ISC3000) {
314 cr0 = SSCR0_ADS7846_C3000;
315 } else {
316 cr0 = 0x00ab;
317 }
318 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0);
319 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, cr0);
320
321 pxa2x0_gpio_set_bit(GPIO_TG_CS_C3000);
322 pxa2x0_gpio_set_bit(GPIO_MAX1111_CS_C3000);
323 pxa2x0_gpio_clear_bit(GPIO_ADS7846_CS_C3000);
324
325 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, cmd);
326
327 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR)
328 & SSSR_TNF) != SSSR_TNF)
329 continue; /* poll */
330
331 delay(1);
332
333 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR)
334 & SSSR_RNE) != SSSR_RNE)
335 continue; /* poll */
336
337 val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR);
338
339 pxa2x0_gpio_set_bit(GPIO_ADS7846_CS_C3000);
340
341 splx(s);
342
343 return val;
344 }
345
346 void
347 zssp_write_lz9jg18(uint32_t data)
348 {
349 int sclk_pin, sclk_fn;
350 int sfrm_pin, sfrm_fn;
351 int txd_pin, txd_fn;
352 int rxd_pin, rxd_fn;
353 int i;
354 int s;
355
356 /* XXX this creates a DAC command from a backlight duty value. */
357 data = 0x40 | (data & 0x1f);
358
359 if (ZAURUS_ISC3000) {
360 sclk_pin = 19;
361 sfrm_pin = 14;
362 txd_pin = 87;
363 rxd_pin = 86;
364 } else {
365 sclk_pin = 23;
366 sfrm_pin = 24;
367 txd_pin = 25;
368 rxd_pin = 26;
369 }
370
371 s = splhigh();
372
373 sclk_fn = pxa2x0_gpio_get_function(sclk_pin);
374 sfrm_fn = pxa2x0_gpio_get_function(sfrm_pin);
375 txd_fn = pxa2x0_gpio_get_function(txd_pin);
376 rxd_fn = pxa2x0_gpio_get_function(rxd_pin);
377
378 pxa2x0_gpio_set_function(sfrm_pin, GPIO_OUT | GPIO_SET);
379 pxa2x0_gpio_set_function(sclk_pin, GPIO_OUT | GPIO_CLR);
380 pxa2x0_gpio_set_function(txd_pin, GPIO_OUT | GPIO_CLR);
381 pxa2x0_gpio_set_function(rxd_pin, GPIO_IN);
382
383 pxa2x0_gpio_set_bit(GPIO_MAX1111_CS_C3000);
384 pxa2x0_gpio_set_bit(GPIO_ADS7846_CS_C3000);
385 pxa2x0_gpio_clear_bit(GPIO_TG_CS_C3000);
386
387 delay(10);
388
389 for (i = 0; i < 8; i++) {
390 if (data & 0x80)
391 pxa2x0_gpio_set_bit(txd_pin);
392 else
393 pxa2x0_gpio_clear_bit(txd_pin);
394 delay(10);
395 pxa2x0_gpio_set_bit(sclk_pin);
396 delay(10);
397 pxa2x0_gpio_clear_bit(sclk_pin);
398 delay(10);
399 data <<= 1;
400 }
401
402 pxa2x0_gpio_clear_bit(txd_pin);
403 pxa2x0_gpio_set_bit(GPIO_TG_CS_C3000);
404
405 pxa2x0_gpio_set_function(sclk_pin, sclk_fn);
406 pxa2x0_gpio_set_function(sfrm_pin, sfrm_fn);
407 pxa2x0_gpio_set_function(txd_pin, txd_fn);
408 pxa2x0_gpio_set_function(rxd_pin, rxd_fn);
409
410 splx(s);
411 }
412