intr.h revision 1.5
1/* $NetBSD: intr.h,v 1.5 2007/12/03 15:34:31 ad Exp $ */ 2 3/* 4 * Copyright (c) 2001, 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38#ifndef _ZAURUS_INTR_H_ 39#define _ZAURUS_INTR_H_ 40 41#ifdef _KERNEL 42 43/* Interrupt priority "levels". */ 44#define IPL_NONE 0 /* nothing */ 45#define IPL_SOFTCLOCK 1 /* timeouts */ 46#define IPL_SOFTBIO 2 /* block I/O */ 47#define IPL_SOFTNET 3 /* software network interrupt */ 48#define IPL_SOFTSERIAL 4 /* software serial interrupt */ 49#define IPL_VM 5 /* memory allocation */ 50#define IPL_SCHED 6 /* clock interrupt */ 51#define IPL_HIGH 7 /* everything */ 52 53#define NIPL 8 54 55/* Interrupt sharing types. */ 56#define IST_NONE 0 /* none */ 57#define IST_PULSE 1 /* pulsed */ 58#define IST_EDGE 2 /* edge-triggered */ 59#define IST_LEVEL 3 /* level-triggered */ 60 61#define IST_LEVEL_LOW IST_LEVEL 62#define IST_LEVEL_HIGH 4 63#define IST_EDGE_FALLING IST_EDGE 64#define IST_EDGE_RISING 5 65#define IST_EDGE_BOTH 6 66 67#ifdef __OLD_INTERRUPT_CODE /* XXX XXX XXX */ 68 69/* Software interrupt priority levels */ 70 71#define SOFTIRQ_CLOCK 0 72#define SOFTIRQ_NET 1 73#define SOFTIRQ_SERIAL 2 74 75#define SOFTIRQ_BIT(x) (1 << x) 76 77#include <arm/arm32/psl.h> 78 79#else /* ! __OLD_INTERRUPT_CODE */ 80 81#define __NEWINTR /* enables new hooks in cpu_fork()/cpu_switch() */ 82 83#ifndef _LOCORE 84 85#include <sys/device.h> 86#include <sys/queue.h> 87 88#if defined(_LKM) 89 90int _splraise(int); 91int _spllower(int); 92void splx(int); 93void _setsoftintr(int); 94 95#else /* _LKM */ 96 97#include "opt_arm_intr_impl.h" 98 99#if defined(ARM_INTR_IMPL) 100 101/* 102 * Each board needs to define the following functions: 103 * 104 * int _splraise(int); 105 * int _spllower(int); 106 * void splx(int); 107 * void _setsoftintr(int); 108 * 109 * These may be defined as functions, static inline functions, or macros, 110 * but there must be a _spllower() and splx() defined as functions callable 111 * from assembly language (for cpu_switch()). However, since it's quite 112 * useful to be able to inline splx(), you could do something like the 113 * following: 114 * 115 * in <boardtype>_intr.h: 116 * static inline int 117 * boardtype_splx(int spl) 118 * {...} 119 * 120 * #define splx(nspl) boardtype_splx(nspl) 121 * ... 122 * and in boardtype's machdep code: 123 * 124 * ... 125 * #undef splx 126 * int 127 * splx(int spl) 128 * { 129 * return boardtype_splx(spl); 130 * } 131 */ 132 133#include ARM_INTR_IMPL 134 135#else /* ARM_INTR_IMPL */ 136 137#error ARM_INTR_IMPL not defined. 138 139#endif /* ARM_INTR_IMPL */ 140 141#endif /* _LKM */ 142 143#define splsoft() _splraise(IPL_SOFT) 144 145typedef uint8_t ipl_t; 146typedef struct { 147 ipl_t _ipl; 148} ipl_cookie_t; 149 150static inline ipl_cookie_t 151makeiplcookie(ipl_t ipl) 152{ 153 154 return (ipl_cookie_t){._ipl = ipl}; 155} 156 157static inline int 158splraiseipl(ipl_cookie_t icookie) 159{ 160 161 return _splraise(icookie._ipl); 162} 163 164#define spl0() _spllower(IPL_NONE) 165 166#include <sys/spl.h> 167 168/* Use generic software interrupt support. */ 169#include <arm/softintr.h> 170 171#endif /* ! _LOCORE */ 172 173#endif /* __OLD_INTERRUPT_CODE */ 174 175#endif /* _KERNEL */ 176 177#endif /* _ZAURUS_INTR_H_ */ 178