acpi_cpu.h revision 1.1 1 /* $NetBSD */
2
3 /*-
4 * Copyright (c) 2010 Jukka Ruohonen <jruohonen (at) iki.fi>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #ifndef _SYS_DEV_ACPI_ACPI_CPU_H
31 #define _SYS_DEV_ACPI_ACPI_CPU_H
32
33 /*
34 * The following _PDC values are based on:
35 *
36 * Intel Processor-Specific ACPI Interface
37 * Specification, September 2006, Revision 005.
38 */
39 #define ACPICPU_PDC_REVID 0x1
40 #define ACPICPU_PDC_SMP 0xA
41 #define ACPICPU_PDC_MSR 0x1
42
43 #define ACPICPU_PDC_P_FFH __BIT(0) /* SpeedStep MSRs */
44 #define ACPICPU_PDC_C_C1_HALT __BIT(1) /* C1 "I/O then halt" */
45 #define ACPICPU_PDC_T_FFH __BIT(2) /* OnDemand throttling MSRs */
46 #define ACPICPU_PDC_C_C1PT __BIT(3) /* SMP C1, Px, and Tx (same) */
47 #define ACPICPU_PDC_C_C2C3 __BIT(4) /* SMP C2 and C3 (same) */
48 #define ACPICPU_PDC_P_SW __BIT(5) /* SMP Px (different) */
49 #define ACPICPU_PDC_C_SW __BIT(6) /* SMP Cx (different) */
50 #define ACPICPU_PDC_T_SW __BIT(7) /* SMP Tx (different) */
51 #define ACPICPU_PDC_C_C1_FFH __BIT(8) /* SMP C1 native beyond halt */
52 #define ACPICPU_PDC_C_C2C3_FFH __BIT(9) /* SMP C2 and C2 native */
53 #define ACPICPU_PDC_P_HW __BIT(11) /* Px hardware coordination */
54
55 /*
56 * Notify values.
57 */
58 #define ACPICPU_P_NOTIFY 0x80 /* _PPC */
59 #define ACPICPU_C_NOTIFY 0x81 /* _CST */
60 #define ACPICPU_T_NOTIFY 0x82 /* _TPC */
61
62 /*
63 * C-states.
64 */
65 #define ACPICPU_C_C2_LATENCY_MAX 100 /* us */
66 #define ACPICPU_C_C3_LATENCY_MAX 1000 /* us */
67
68 #define ACPICPU_C_CSD_SW_ALL 0xFC
69 #define ACPICPU_C_CSD_SW_ANY 0xFD
70 #define ACPICPU_C_CSD_HW_ALL 0xFE
71
72 #define ACPICPU_C_STATE_HALT 0x01
73 #define ACPICPU_C_STATE_FFH 0x02
74 #define ACPICPU_C_STATE_SYSIO 0x03
75
76 /*
77 * Global flags in the softc.
78 */
79 #define ACPICPU_FLAG_C __BIT(0)
80 #define ACPICPU_FLAG_P __BIT(1)
81 #define ACPICPU_FLAG_T __BIT(2)
82 #define ACPICPU_FLAG_C_CST __BIT(3)
83 #define ACPICPU_FLAG_C_FADT __BIT(4)
84 #define ACPICPU_FLAG_C_BM __BIT(5)
85 #define ACPICPU_FLAG_C_ARB __BIT(6)
86 #define ACPICPU_FLAG_C_NOC3 __BIT(7)
87 #define ACPICPU_FLAG_C_MWAIT __BIT(8)
88 #define ACPICPU_FLAG_C_C1E __BIT(9)
89
90 struct acpicpu_cstate {
91 uint64_t cs_stat;
92 uint64_t cs_addr;
93 uint32_t cs_power; /* mW */
94 uint32_t cs_latency; /* us */
95 int cs_method;
96 };
97
98 struct acpicpu_csd {
99 uint32_t csd_domain;
100 uint32_t csd_coord;
101 uint32_t csd_ncpu;
102 uint32_t csd_index;
103 };
104
105 struct acpicpu_object {
106 uint32_t ao_procid;
107 uint32_t ao_pblklen;
108 uint32_t ao_pblkaddr;
109 };
110
111 struct acpicpu_softc {
112 device_t sc_dev;
113 struct acpi_devnode *sc_node;
114 struct acpicpu_cstate sc_cstate[ACPI_C_STATE_COUNT];
115 struct acpicpu_object sc_object;
116 bus_space_tag_t sc_iot;
117 bus_space_handle_t sc_ioh;
118 uint32_t sc_sleep;
119 uint32_t sc_cpuid;
120 uint32_t sc_cap;
121 uint32_t sc_flags;
122 };
123
124 void acpicpu_cstate_attach(device_t);
125 int acpicpu_cstate_detach(device_t);
126 int acpicpu_cstate_start(device_t);
127 bool acpicpu_cstate_suspend(device_t);
128 bool acpicpu_cstate_resume(device_t);
129 void acpicpu_cstate_callback(void *);
130 void acpicpu_cstate_idle(void);
131
132 uint32_t acpicpu_md_cap(void);
133 uint32_t acpicpu_md_quirks(void);
134 uint32_t acpicpu_md_cpus_running(void);
135 int acpicpu_md_idle_init(void);
136 int acpicpu_md_idle_start(void);
137 int acpicpu_md_idle_stop(void);
138 void acpicpu_md_idle_enter(int, int);
139
140 #endif /* !_SYS_DEV_ACPI_ACPI_CPU_H */
141