acpi_cpu_cstate.c revision 1.29.2.2
1 1.29.2.2 uebayasi /* $NetBSD: acpi_cpu_cstate.c,v 1.29.2.2 2010/08/17 06:45:59 uebayasi Exp $ */ 2 1.29.2.2 uebayasi 3 1.29.2.2 uebayasi /*- 4 1.29.2.2 uebayasi * Copyright (c) 2010 Jukka Ruohonen <jruohonen (at) iki.fi> 5 1.29.2.2 uebayasi * All rights reserved. 6 1.29.2.2 uebayasi * 7 1.29.2.2 uebayasi * Redistribution and use in source and binary forms, with or without 8 1.29.2.2 uebayasi * modification, are permitted provided that the following conditions 9 1.29.2.2 uebayasi * are met: 10 1.29.2.2 uebayasi * 11 1.29.2.2 uebayasi * 1. Redistributions of source code must retain the above copyright 12 1.29.2.2 uebayasi * notice, this list of conditions and the following disclaimer. 13 1.29.2.2 uebayasi * 2. Redistributions in binary form must reproduce the above copyright 14 1.29.2.2 uebayasi * notice, this list of conditions and the following disclaimer in the 15 1.29.2.2 uebayasi * documentation and/or other materials provided with the distribution. 16 1.29.2.2 uebayasi * 17 1.29.2.2 uebayasi * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 1.29.2.2 uebayasi * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 1.29.2.2 uebayasi * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 1.29.2.2 uebayasi * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 1.29.2.2 uebayasi * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 1.29.2.2 uebayasi * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 1.29.2.2 uebayasi * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 1.29.2.2 uebayasi * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 1.29.2.2 uebayasi * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 1.29.2.2 uebayasi * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 1.29.2.2 uebayasi * SUCH DAMAGE. 28 1.29.2.2 uebayasi */ 29 1.29.2.2 uebayasi #include <sys/cdefs.h> 30 1.29.2.2 uebayasi __KERNEL_RCSID(0, "$NetBSD: acpi_cpu_cstate.c,v 1.29.2.2 2010/08/17 06:45:59 uebayasi Exp $"); 31 1.29.2.2 uebayasi 32 1.29.2.2 uebayasi #include <sys/param.h> 33 1.29.2.2 uebayasi #include <sys/cpu.h> 34 1.29.2.2 uebayasi #include <sys/device.h> 35 1.29.2.2 uebayasi #include <sys/evcnt.h> 36 1.29.2.2 uebayasi #include <sys/kernel.h> 37 1.29.2.2 uebayasi #include <sys/once.h> 38 1.29.2.2 uebayasi #include <sys/mutex.h> 39 1.29.2.2 uebayasi #include <sys/timetc.h> 40 1.29.2.2 uebayasi 41 1.29.2.2 uebayasi #include <dev/acpi/acpireg.h> 42 1.29.2.2 uebayasi #include <dev/acpi/acpivar.h> 43 1.29.2.2 uebayasi #include <dev/acpi/acpi_cpu.h> 44 1.29.2.2 uebayasi #include <dev/acpi/acpi_timer.h> 45 1.29.2.2 uebayasi 46 1.29.2.2 uebayasi #include <machine/acpi_machdep.h> 47 1.29.2.2 uebayasi 48 1.29.2.2 uebayasi #define _COMPONENT ACPI_BUS_COMPONENT 49 1.29.2.2 uebayasi ACPI_MODULE_NAME ("acpi_cpu_cstate") 50 1.29.2.2 uebayasi 51 1.29.2.2 uebayasi static void acpicpu_cstate_attach_print(struct acpicpu_softc *); 52 1.29.2.2 uebayasi static void acpicpu_cstate_attach_evcnt(struct acpicpu_softc *); 53 1.29.2.2 uebayasi static void acpicpu_cstate_detach_evcnt(struct acpicpu_softc *); 54 1.29.2.2 uebayasi static ACPI_STATUS acpicpu_cstate_cst(struct acpicpu_softc *); 55 1.29.2.2 uebayasi static ACPI_STATUS acpicpu_cstate_cst_add(struct acpicpu_softc *, 56 1.29.2.2 uebayasi ACPI_OBJECT *); 57 1.29.2.2 uebayasi static void acpicpu_cstate_cst_bios(void); 58 1.29.2.2 uebayasi static void acpicpu_cstate_memset(struct acpicpu_softc *); 59 1.29.2.2 uebayasi static void acpicpu_cstate_fadt(struct acpicpu_softc *); 60 1.29.2.2 uebayasi static void acpicpu_cstate_quirks(struct acpicpu_softc *); 61 1.29.2.2 uebayasi static int acpicpu_cstate_latency(struct acpicpu_softc *); 62 1.29.2.2 uebayasi static bool acpicpu_cstate_bm_check(void); 63 1.29.2.2 uebayasi static void acpicpu_cstate_idle_enter(struct acpicpu_softc *,int); 64 1.29.2.2 uebayasi 65 1.29.2.2 uebayasi extern struct acpicpu_softc **acpicpu_sc; 66 1.29.2.2 uebayasi 67 1.29.2.2 uebayasi /* 68 1.29.2.2 uebayasi * XXX: The local APIC timer (as well as TSC) is typically stopped in C3. 69 1.29.2.2 uebayasi * For now, we cannot but disable C3. But there appears to be timer- 70 1.29.2.2 uebayasi * related interrupt issues also in C2. The only entirely safe option 71 1.29.2.2 uebayasi * at the moment is to use C1. 72 1.29.2.2 uebayasi */ 73 1.29.2.2 uebayasi #ifdef ACPICPU_ENABLE_C3 74 1.29.2.2 uebayasi static int cs_state_max = ACPI_STATE_C3; 75 1.29.2.2 uebayasi #else 76 1.29.2.2 uebayasi static int cs_state_max = ACPI_STATE_C1; 77 1.29.2.2 uebayasi #endif 78 1.29.2.2 uebayasi 79 1.29.2.2 uebayasi void 80 1.29.2.2 uebayasi acpicpu_cstate_attach(device_t self) 81 1.29.2.2 uebayasi { 82 1.29.2.2 uebayasi struct acpicpu_softc *sc = device_private(self); 83 1.29.2.2 uebayasi ACPI_STATUS rv; 84 1.29.2.2 uebayasi 85 1.29.2.2 uebayasi /* 86 1.29.2.2 uebayasi * Either use the preferred _CST or resort to FADT. 87 1.29.2.2 uebayasi */ 88 1.29.2.2 uebayasi rv = acpicpu_cstate_cst(sc); 89 1.29.2.2 uebayasi 90 1.29.2.2 uebayasi switch (rv) { 91 1.29.2.2 uebayasi 92 1.29.2.2 uebayasi case AE_OK: 93 1.29.2.2 uebayasi acpicpu_cstate_cst_bios(); 94 1.29.2.2 uebayasi break; 95 1.29.2.2 uebayasi 96 1.29.2.2 uebayasi default: 97 1.29.2.2 uebayasi sc->sc_flags |= ACPICPU_FLAG_C_FADT; 98 1.29.2.2 uebayasi acpicpu_cstate_fadt(sc); 99 1.29.2.2 uebayasi break; 100 1.29.2.2 uebayasi } 101 1.29.2.2 uebayasi 102 1.29.2.2 uebayasi acpicpu_cstate_quirks(sc); 103 1.29.2.2 uebayasi acpicpu_cstate_attach_evcnt(sc); 104 1.29.2.2 uebayasi acpicpu_cstate_attach_print(sc); 105 1.29.2.2 uebayasi } 106 1.29.2.2 uebayasi 107 1.29.2.2 uebayasi void 108 1.29.2.2 uebayasi acpicpu_cstate_attach_print(struct acpicpu_softc *sc) 109 1.29.2.2 uebayasi { 110 1.29.2.2 uebayasi struct acpicpu_cstate *cs; 111 1.29.2.2 uebayasi static bool once = false; 112 1.29.2.2 uebayasi const char *str; 113 1.29.2.2 uebayasi int i; 114 1.29.2.2 uebayasi 115 1.29.2.2 uebayasi if (once != false) 116 1.29.2.2 uebayasi return; 117 1.29.2.2 uebayasi 118 1.29.2.2 uebayasi for (i = 0; i < ACPI_C_STATE_COUNT; i++) { 119 1.29.2.2 uebayasi 120 1.29.2.2 uebayasi cs = &sc->sc_cstate[i]; 121 1.29.2.2 uebayasi 122 1.29.2.2 uebayasi if (cs->cs_method == 0) 123 1.29.2.2 uebayasi continue; 124 1.29.2.2 uebayasi 125 1.29.2.2 uebayasi switch (cs->cs_method) { 126 1.29.2.2 uebayasi 127 1.29.2.2 uebayasi case ACPICPU_C_STATE_HALT: 128 1.29.2.2 uebayasi str = "HLT"; 129 1.29.2.2 uebayasi break; 130 1.29.2.2 uebayasi 131 1.29.2.2 uebayasi case ACPICPU_C_STATE_FFH: 132 1.29.2.2 uebayasi str = "FFH"; 133 1.29.2.2 uebayasi break; 134 1.29.2.2 uebayasi 135 1.29.2.2 uebayasi case ACPICPU_C_STATE_SYSIO: 136 1.29.2.2 uebayasi str = "I/O"; 137 1.29.2.2 uebayasi break; 138 1.29.2.2 uebayasi 139 1.29.2.2 uebayasi default: 140 1.29.2.2 uebayasi panic("NOTREACHED"); 141 1.29.2.2 uebayasi } 142 1.29.2.2 uebayasi 143 1.29.2.2 uebayasi aprint_debug_dev(sc->sc_dev, "C%d: %3s, " 144 1.29.2.2 uebayasi "lat %3u us, pow %5u mW, flags 0x%02x\n", i, str, 145 1.29.2.2 uebayasi cs->cs_latency, cs->cs_power, cs->cs_flags); 146 1.29.2.2 uebayasi } 147 1.29.2.2 uebayasi 148 1.29.2.2 uebayasi once = true; 149 1.29.2.2 uebayasi } 150 1.29.2.2 uebayasi 151 1.29.2.2 uebayasi static void 152 1.29.2.2 uebayasi acpicpu_cstate_attach_evcnt(struct acpicpu_softc *sc) 153 1.29.2.2 uebayasi { 154 1.29.2.2 uebayasi struct acpicpu_cstate *cs; 155 1.29.2.2 uebayasi const char *str; 156 1.29.2.2 uebayasi int i; 157 1.29.2.2 uebayasi 158 1.29.2.2 uebayasi for (i = 0; i < ACPI_C_STATE_COUNT; i++) { 159 1.29.2.2 uebayasi 160 1.29.2.2 uebayasi cs = &sc->sc_cstate[i]; 161 1.29.2.2 uebayasi 162 1.29.2.2 uebayasi if (cs->cs_method == 0) 163 1.29.2.2 uebayasi continue; 164 1.29.2.2 uebayasi 165 1.29.2.2 uebayasi str = "HALT"; 166 1.29.2.2 uebayasi 167 1.29.2.2 uebayasi if (cs->cs_method == ACPICPU_C_STATE_FFH) 168 1.29.2.2 uebayasi str = "MWAIT"; 169 1.29.2.2 uebayasi 170 1.29.2.2 uebayasi if (cs->cs_method == ACPICPU_C_STATE_SYSIO) 171 1.29.2.2 uebayasi str = "I/O"; 172 1.29.2.2 uebayasi 173 1.29.2.2 uebayasi (void)snprintf(cs->cs_name, sizeof(cs->cs_name), 174 1.29.2.2 uebayasi "C%d (%s)", i, str); 175 1.29.2.2 uebayasi 176 1.29.2.2 uebayasi evcnt_attach_dynamic(&cs->cs_evcnt, EVCNT_TYPE_MISC, 177 1.29.2.2 uebayasi NULL, device_xname(sc->sc_dev), cs->cs_name); 178 1.29.2.2 uebayasi } 179 1.29.2.2 uebayasi } 180 1.29.2.2 uebayasi 181 1.29.2.2 uebayasi int 182 1.29.2.2 uebayasi acpicpu_cstate_detach(device_t self) 183 1.29.2.2 uebayasi { 184 1.29.2.2 uebayasi struct acpicpu_softc *sc = device_private(self); 185 1.29.2.2 uebayasi static ONCE_DECL(once_detach); 186 1.29.2.2 uebayasi int rv; 187 1.29.2.2 uebayasi 188 1.29.2.2 uebayasi rv = RUN_ONCE(&once_detach, acpicpu_md_idle_stop); 189 1.29.2.2 uebayasi 190 1.29.2.2 uebayasi if (rv != 0) 191 1.29.2.2 uebayasi return rv; 192 1.29.2.2 uebayasi 193 1.29.2.2 uebayasi sc->sc_flags &= ~ACPICPU_FLAG_C; 194 1.29.2.2 uebayasi acpicpu_cstate_detach_evcnt(sc); 195 1.29.2.2 uebayasi 196 1.29.2.2 uebayasi return 0; 197 1.29.2.2 uebayasi } 198 1.29.2.2 uebayasi 199 1.29.2.2 uebayasi static void 200 1.29.2.2 uebayasi acpicpu_cstate_detach_evcnt(struct acpicpu_softc *sc) 201 1.29.2.2 uebayasi { 202 1.29.2.2 uebayasi struct acpicpu_cstate *cs; 203 1.29.2.2 uebayasi int i; 204 1.29.2.2 uebayasi 205 1.29.2.2 uebayasi for (i = 0; i < ACPI_C_STATE_COUNT; i++) { 206 1.29.2.2 uebayasi 207 1.29.2.2 uebayasi cs = &sc->sc_cstate[i]; 208 1.29.2.2 uebayasi 209 1.29.2.2 uebayasi if (cs->cs_method != 0) 210 1.29.2.2 uebayasi evcnt_detach(&cs->cs_evcnt); 211 1.29.2.2 uebayasi } 212 1.29.2.2 uebayasi } 213 1.29.2.2 uebayasi 214 1.29.2.2 uebayasi int 215 1.29.2.2 uebayasi acpicpu_cstate_start(device_t self) 216 1.29.2.2 uebayasi { 217 1.29.2.2 uebayasi struct acpicpu_softc *sc = device_private(self); 218 1.29.2.2 uebayasi static ONCE_DECL(once_start); 219 1.29.2.2 uebayasi int rv; 220 1.29.2.2 uebayasi 221 1.29.2.2 uebayasi /* 222 1.29.2.2 uebayasi * Save the existing idle-mechanism and claim the cpu_idle(9). 223 1.29.2.2 uebayasi * This should be called after all ACPI CPUs have been attached. 224 1.29.2.2 uebayasi */ 225 1.29.2.2 uebayasi rv = RUN_ONCE(&once_start, acpicpu_md_idle_start); 226 1.29.2.2 uebayasi 227 1.29.2.2 uebayasi if (rv == 0) 228 1.29.2.2 uebayasi sc->sc_flags |= ACPICPU_FLAG_C; 229 1.29.2.2 uebayasi 230 1.29.2.2 uebayasi return rv; 231 1.29.2.2 uebayasi } 232 1.29.2.2 uebayasi 233 1.29.2.2 uebayasi bool 234 1.29.2.2 uebayasi acpicpu_cstate_suspend(device_t self) 235 1.29.2.2 uebayasi { 236 1.29.2.2 uebayasi 237 1.29.2.2 uebayasi return true; 238 1.29.2.2 uebayasi } 239 1.29.2.2 uebayasi 240 1.29.2.2 uebayasi bool 241 1.29.2.2 uebayasi acpicpu_cstate_resume(device_t self) 242 1.29.2.2 uebayasi { 243 1.29.2.2 uebayasi struct acpicpu_softc *sc = device_private(self); 244 1.29.2.2 uebayasi 245 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_FADT) == 0) 246 1.29.2.2 uebayasi acpicpu_cstate_callback(self); 247 1.29.2.2 uebayasi 248 1.29.2.2 uebayasi return true; 249 1.29.2.2 uebayasi } 250 1.29.2.2 uebayasi 251 1.29.2.2 uebayasi void 252 1.29.2.2 uebayasi acpicpu_cstate_callback(void *aux) 253 1.29.2.2 uebayasi { 254 1.29.2.2 uebayasi struct acpicpu_softc *sc; 255 1.29.2.2 uebayasi device_t self = aux; 256 1.29.2.2 uebayasi 257 1.29.2.2 uebayasi sc = device_private(self); 258 1.29.2.2 uebayasi 259 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_FADT) != 0) 260 1.29.2.2 uebayasi return; 261 1.29.2.2 uebayasi 262 1.29.2.2 uebayasi mutex_enter(&sc->sc_mtx); 263 1.29.2.2 uebayasi (void)acpicpu_cstate_cst(sc); 264 1.29.2.2 uebayasi mutex_exit(&sc->sc_mtx); 265 1.29.2.2 uebayasi } 266 1.29.2.2 uebayasi 267 1.29.2.2 uebayasi static ACPI_STATUS 268 1.29.2.2 uebayasi acpicpu_cstate_cst(struct acpicpu_softc *sc) 269 1.29.2.2 uebayasi { 270 1.29.2.2 uebayasi ACPI_OBJECT *elm, *obj; 271 1.29.2.2 uebayasi ACPI_BUFFER buf; 272 1.29.2.2 uebayasi ACPI_STATUS rv; 273 1.29.2.2 uebayasi uint32_t i, n; 274 1.29.2.2 uebayasi uint8_t count; 275 1.29.2.2 uebayasi 276 1.29.2.2 uebayasi rv = acpi_eval_struct(sc->sc_node->ad_handle, "_CST", &buf); 277 1.29.2.2 uebayasi 278 1.29.2.2 uebayasi if (ACPI_FAILURE(rv)) 279 1.29.2.2 uebayasi return rv; 280 1.29.2.2 uebayasi 281 1.29.2.2 uebayasi obj = buf.Pointer; 282 1.29.2.2 uebayasi 283 1.29.2.2 uebayasi if (obj->Type != ACPI_TYPE_PACKAGE) { 284 1.29.2.2 uebayasi rv = AE_TYPE; 285 1.29.2.2 uebayasi goto out; 286 1.29.2.2 uebayasi } 287 1.29.2.2 uebayasi 288 1.29.2.2 uebayasi if (obj->Package.Count < 2) { 289 1.29.2.2 uebayasi rv = AE_LIMIT; 290 1.29.2.2 uebayasi goto out; 291 1.29.2.2 uebayasi } 292 1.29.2.2 uebayasi 293 1.29.2.2 uebayasi elm = obj->Package.Elements; 294 1.29.2.2 uebayasi 295 1.29.2.2 uebayasi if (elm[0].Type != ACPI_TYPE_INTEGER) { 296 1.29.2.2 uebayasi rv = AE_TYPE; 297 1.29.2.2 uebayasi goto out; 298 1.29.2.2 uebayasi } 299 1.29.2.2 uebayasi 300 1.29.2.2 uebayasi n = elm[0].Integer.Value; 301 1.29.2.2 uebayasi 302 1.29.2.2 uebayasi if (n != obj->Package.Count - 1) { 303 1.29.2.2 uebayasi rv = AE_BAD_VALUE; 304 1.29.2.2 uebayasi goto out; 305 1.29.2.2 uebayasi } 306 1.29.2.2 uebayasi 307 1.29.2.2 uebayasi if (n > ACPI_C_STATES_MAX) { 308 1.29.2.2 uebayasi rv = AE_LIMIT; 309 1.29.2.2 uebayasi goto out; 310 1.29.2.2 uebayasi } 311 1.29.2.2 uebayasi 312 1.29.2.2 uebayasi acpicpu_cstate_memset(sc); 313 1.29.2.2 uebayasi 314 1.29.2.2 uebayasi CTASSERT(ACPI_STATE_C0 == 0 && ACPI_STATE_C1 == 1); 315 1.29.2.2 uebayasi CTASSERT(ACPI_STATE_C2 == 2 && ACPI_STATE_C3 == 3); 316 1.29.2.2 uebayasi 317 1.29.2.2 uebayasi for (count = 0, i = 1; i <= n; i++) { 318 1.29.2.2 uebayasi 319 1.29.2.2 uebayasi elm = &obj->Package.Elements[i]; 320 1.29.2.2 uebayasi rv = acpicpu_cstate_cst_add(sc, elm); 321 1.29.2.2 uebayasi 322 1.29.2.2 uebayasi if (ACPI_SUCCESS(rv)) 323 1.29.2.2 uebayasi count++; 324 1.29.2.2 uebayasi } 325 1.29.2.2 uebayasi 326 1.29.2.2 uebayasi rv = (count != 0) ? AE_OK : AE_NOT_EXIST; 327 1.29.2.2 uebayasi 328 1.29.2.2 uebayasi out: 329 1.29.2.2 uebayasi if (buf.Pointer != NULL) 330 1.29.2.2 uebayasi ACPI_FREE(buf.Pointer); 331 1.29.2.2 uebayasi 332 1.29.2.2 uebayasi return rv; 333 1.29.2.2 uebayasi } 334 1.29.2.2 uebayasi 335 1.29.2.2 uebayasi static ACPI_STATUS 336 1.29.2.2 uebayasi acpicpu_cstate_cst_add(struct acpicpu_softc *sc, ACPI_OBJECT *elm) 337 1.29.2.2 uebayasi { 338 1.29.2.2 uebayasi const struct acpicpu_object *ao = &sc->sc_object; 339 1.29.2.2 uebayasi struct acpicpu_cstate *cs = sc->sc_cstate; 340 1.29.2.2 uebayasi struct acpicpu_cstate state; 341 1.29.2.2 uebayasi struct acpicpu_reg *reg; 342 1.29.2.2 uebayasi ACPI_STATUS rv = AE_OK; 343 1.29.2.2 uebayasi ACPI_OBJECT *obj; 344 1.29.2.2 uebayasi uint32_t type; 345 1.29.2.2 uebayasi 346 1.29.2.2 uebayasi (void)memset(&state, 0, sizeof(*cs)); 347 1.29.2.2 uebayasi 348 1.29.2.2 uebayasi state.cs_flags = ACPICPU_FLAG_C_BM_STS; 349 1.29.2.2 uebayasi 350 1.29.2.2 uebayasi if (elm->Type != ACPI_TYPE_PACKAGE) { 351 1.29.2.2 uebayasi rv = AE_TYPE; 352 1.29.2.2 uebayasi goto out; 353 1.29.2.2 uebayasi } 354 1.29.2.2 uebayasi 355 1.29.2.2 uebayasi if (elm->Package.Count != 4) { 356 1.29.2.2 uebayasi rv = AE_LIMIT; 357 1.29.2.2 uebayasi goto out; 358 1.29.2.2 uebayasi } 359 1.29.2.2 uebayasi 360 1.29.2.2 uebayasi /* 361 1.29.2.2 uebayasi * Type. 362 1.29.2.2 uebayasi */ 363 1.29.2.2 uebayasi obj = &elm->Package.Elements[1]; 364 1.29.2.2 uebayasi 365 1.29.2.2 uebayasi if (obj->Type != ACPI_TYPE_INTEGER) { 366 1.29.2.2 uebayasi rv = AE_TYPE; 367 1.29.2.2 uebayasi goto out; 368 1.29.2.2 uebayasi } 369 1.29.2.2 uebayasi 370 1.29.2.2 uebayasi type = obj->Integer.Value; 371 1.29.2.2 uebayasi 372 1.29.2.2 uebayasi if (type < ACPI_STATE_C1 || type > ACPI_STATE_C3) { 373 1.29.2.2 uebayasi rv = AE_TYPE; 374 1.29.2.2 uebayasi goto out; 375 1.29.2.2 uebayasi } 376 1.29.2.2 uebayasi 377 1.29.2.2 uebayasi /* 378 1.29.2.2 uebayasi * Latency. 379 1.29.2.2 uebayasi */ 380 1.29.2.2 uebayasi obj = &elm->Package.Elements[2]; 381 1.29.2.2 uebayasi 382 1.29.2.2 uebayasi if (obj->Type != ACPI_TYPE_INTEGER) { 383 1.29.2.2 uebayasi rv = AE_TYPE; 384 1.29.2.2 uebayasi goto out; 385 1.29.2.2 uebayasi } 386 1.29.2.2 uebayasi 387 1.29.2.2 uebayasi state.cs_latency = obj->Integer.Value; 388 1.29.2.2 uebayasi 389 1.29.2.2 uebayasi /* 390 1.29.2.2 uebayasi * Power. 391 1.29.2.2 uebayasi */ 392 1.29.2.2 uebayasi obj = &elm->Package.Elements[3]; 393 1.29.2.2 uebayasi 394 1.29.2.2 uebayasi if (obj->Type != ACPI_TYPE_INTEGER) { 395 1.29.2.2 uebayasi rv = AE_TYPE; 396 1.29.2.2 uebayasi goto out; 397 1.29.2.2 uebayasi } 398 1.29.2.2 uebayasi 399 1.29.2.2 uebayasi state.cs_power = obj->Integer.Value; 400 1.29.2.2 uebayasi 401 1.29.2.2 uebayasi /* 402 1.29.2.2 uebayasi * Register. 403 1.29.2.2 uebayasi */ 404 1.29.2.2 uebayasi obj = &elm->Package.Elements[0]; 405 1.29.2.2 uebayasi 406 1.29.2.2 uebayasi if (obj->Type != ACPI_TYPE_BUFFER) { 407 1.29.2.2 uebayasi rv = AE_TYPE; 408 1.29.2.2 uebayasi goto out; 409 1.29.2.2 uebayasi } 410 1.29.2.2 uebayasi 411 1.29.2.2 uebayasi CTASSERT(sizeof(struct acpicpu_reg) == 15); 412 1.29.2.2 uebayasi 413 1.29.2.2 uebayasi if (obj->Buffer.Length < sizeof(struct acpicpu_reg)) { 414 1.29.2.2 uebayasi rv = AE_LIMIT; 415 1.29.2.2 uebayasi goto out; 416 1.29.2.2 uebayasi } 417 1.29.2.2 uebayasi 418 1.29.2.2 uebayasi reg = (struct acpicpu_reg *)obj->Buffer.Pointer; 419 1.29.2.2 uebayasi 420 1.29.2.2 uebayasi switch (reg->reg_spaceid) { 421 1.29.2.2 uebayasi 422 1.29.2.2 uebayasi case ACPI_ADR_SPACE_SYSTEM_IO: 423 1.29.2.2 uebayasi state.cs_method = ACPICPU_C_STATE_SYSIO; 424 1.29.2.2 uebayasi 425 1.29.2.2 uebayasi if (reg->reg_addr == 0) { 426 1.29.2.2 uebayasi rv = AE_AML_ILLEGAL_ADDRESS; 427 1.29.2.2 uebayasi goto out; 428 1.29.2.2 uebayasi } 429 1.29.2.2 uebayasi 430 1.29.2.2 uebayasi if (reg->reg_bitwidth != 8) { 431 1.29.2.2 uebayasi rv = AE_AML_BAD_RESOURCE_LENGTH; 432 1.29.2.2 uebayasi goto out; 433 1.29.2.2 uebayasi } 434 1.29.2.2 uebayasi 435 1.29.2.2 uebayasi /* 436 1.29.2.2 uebayasi * Check only that the address is in the mapped space. 437 1.29.2.2 uebayasi * Systems are allowed to change it when operating 438 1.29.2.2 uebayasi * with _CST (see ACPI 4.0, pp. 94-95). For instance, 439 1.29.2.2 uebayasi * the offset of P_LVL3 may change depending on whether 440 1.29.2.2 uebayasi * acpiacad(4) is connected or disconnected. 441 1.29.2.2 uebayasi */ 442 1.29.2.2 uebayasi if (reg->reg_addr > ao->ao_pblkaddr + ao->ao_pblklen) { 443 1.29.2.2 uebayasi rv = AE_BAD_ADDRESS; 444 1.29.2.2 uebayasi goto out; 445 1.29.2.2 uebayasi } 446 1.29.2.2 uebayasi 447 1.29.2.2 uebayasi state.cs_addr = reg->reg_addr; 448 1.29.2.2 uebayasi break; 449 1.29.2.2 uebayasi 450 1.29.2.2 uebayasi case ACPI_ADR_SPACE_FIXED_HARDWARE: 451 1.29.2.2 uebayasi state.cs_method = ACPICPU_C_STATE_FFH; 452 1.29.2.2 uebayasi 453 1.29.2.2 uebayasi switch (type) { 454 1.29.2.2 uebayasi 455 1.29.2.2 uebayasi case ACPI_STATE_C1: 456 1.29.2.2 uebayasi 457 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_FFH) == 0) 458 1.29.2.2 uebayasi state.cs_method = ACPICPU_C_STATE_HALT; 459 1.29.2.2 uebayasi 460 1.29.2.2 uebayasi break; 461 1.29.2.2 uebayasi 462 1.29.2.2 uebayasi default: 463 1.29.2.2 uebayasi 464 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_FFH) == 0) { 465 1.29.2.2 uebayasi rv = AE_SUPPORT; 466 1.29.2.2 uebayasi goto out; 467 1.29.2.2 uebayasi } 468 1.29.2.2 uebayasi } 469 1.29.2.2 uebayasi 470 1.29.2.2 uebayasi if (sc->sc_cap != 0) { 471 1.29.2.2 uebayasi 472 1.29.2.2 uebayasi /* 473 1.29.2.2 uebayasi * The _CST FFH GAS encoding may contain 474 1.29.2.2 uebayasi * additional hints on Intel processors. 475 1.29.2.2 uebayasi * Use these to determine whether we can 476 1.29.2.2 uebayasi * avoid the bus master activity check. 477 1.29.2.2 uebayasi */ 478 1.29.2.2 uebayasi if ((reg->reg_accesssize & ACPICPU_PDC_GAS_BM) == 0) 479 1.29.2.2 uebayasi state.cs_flags &= ~ACPICPU_FLAG_C_BM_STS; 480 1.29.2.2 uebayasi } 481 1.29.2.2 uebayasi 482 1.29.2.2 uebayasi break; 483 1.29.2.2 uebayasi 484 1.29.2.2 uebayasi default: 485 1.29.2.2 uebayasi rv = AE_AML_INVALID_SPACE_ID; 486 1.29.2.2 uebayasi goto out; 487 1.29.2.2 uebayasi } 488 1.29.2.2 uebayasi 489 1.29.2.2 uebayasi if (cs[type].cs_method != 0) { 490 1.29.2.2 uebayasi rv = AE_ALREADY_EXISTS; 491 1.29.2.2 uebayasi goto out; 492 1.29.2.2 uebayasi } 493 1.29.2.2 uebayasi 494 1.29.2.2 uebayasi cs[type].cs_addr = state.cs_addr; 495 1.29.2.2 uebayasi cs[type].cs_power = state.cs_power; 496 1.29.2.2 uebayasi cs[type].cs_flags = state.cs_flags; 497 1.29.2.2 uebayasi cs[type].cs_method = state.cs_method; 498 1.29.2.2 uebayasi cs[type].cs_latency = state.cs_latency; 499 1.29.2.2 uebayasi 500 1.29.2.2 uebayasi out: 501 1.29.2.2 uebayasi if (ACPI_FAILURE(rv)) 502 1.29.2.2 uebayasi aprint_debug_dev(sc->sc_dev, "invalid " 503 1.29.2.2 uebayasi "_CST: %s\n", AcpiFormatException(rv)); 504 1.29.2.2 uebayasi 505 1.29.2.2 uebayasi return rv; 506 1.29.2.2 uebayasi } 507 1.29.2.2 uebayasi 508 1.29.2.2 uebayasi static void 509 1.29.2.2 uebayasi acpicpu_cstate_cst_bios(void) 510 1.29.2.2 uebayasi { 511 1.29.2.2 uebayasi const uint8_t val = AcpiGbl_FADT.CstControl; 512 1.29.2.2 uebayasi const uint32_t addr = AcpiGbl_FADT.SmiCommand; 513 1.29.2.2 uebayasi 514 1.29.2.2 uebayasi if (addr == 0 || val == 0) 515 1.29.2.2 uebayasi return; 516 1.29.2.2 uebayasi 517 1.29.2.2 uebayasi (void)AcpiOsWritePort(addr, val, 8); 518 1.29.2.2 uebayasi } 519 1.29.2.2 uebayasi 520 1.29.2.2 uebayasi static void 521 1.29.2.2 uebayasi acpicpu_cstate_memset(struct acpicpu_softc *sc) 522 1.29.2.2 uebayasi { 523 1.29.2.2 uebayasi int i = 0; 524 1.29.2.2 uebayasi 525 1.29.2.2 uebayasi while (i < ACPI_C_STATE_COUNT) { 526 1.29.2.2 uebayasi 527 1.29.2.2 uebayasi sc->sc_cstate[i].cs_addr = 0; 528 1.29.2.2 uebayasi sc->sc_cstate[i].cs_power = 0; 529 1.29.2.2 uebayasi sc->sc_cstate[i].cs_flags = 0; 530 1.29.2.2 uebayasi sc->sc_cstate[i].cs_method = 0; 531 1.29.2.2 uebayasi sc->sc_cstate[i].cs_latency = 0; 532 1.29.2.2 uebayasi 533 1.29.2.2 uebayasi i++; 534 1.29.2.2 uebayasi } 535 1.29.2.2 uebayasi } 536 1.29.2.2 uebayasi 537 1.29.2.2 uebayasi static void 538 1.29.2.2 uebayasi acpicpu_cstate_fadt(struct acpicpu_softc *sc) 539 1.29.2.2 uebayasi { 540 1.29.2.2 uebayasi struct acpicpu_cstate *cs = sc->sc_cstate; 541 1.29.2.2 uebayasi 542 1.29.2.2 uebayasi acpicpu_cstate_memset(sc); 543 1.29.2.2 uebayasi 544 1.29.2.2 uebayasi /* 545 1.29.2.2 uebayasi * All x86 processors should support C1 (a.k.a. HALT). 546 1.29.2.2 uebayasi */ 547 1.29.2.2 uebayasi if ((AcpiGbl_FADT.Flags & ACPI_FADT_C1_SUPPORTED) != 0) 548 1.29.2.2 uebayasi cs[ACPI_STATE_C1].cs_method = ACPICPU_C_STATE_HALT; 549 1.29.2.2 uebayasi 550 1.29.2.2 uebayasi if (sc->sc_object.ao_pblkaddr == 0) 551 1.29.2.2 uebayasi return; 552 1.29.2.2 uebayasi 553 1.29.2.2 uebayasi if (acpicpu_md_cpus_running() > 1) { 554 1.29.2.2 uebayasi 555 1.29.2.2 uebayasi if ((AcpiGbl_FADT.Flags & ACPI_FADT_C2_MP_SUPPORTED) == 0) 556 1.29.2.2 uebayasi return; 557 1.29.2.2 uebayasi } 558 1.29.2.2 uebayasi 559 1.29.2.2 uebayasi cs[ACPI_STATE_C2].cs_method = ACPICPU_C_STATE_SYSIO; 560 1.29.2.2 uebayasi cs[ACPI_STATE_C3].cs_method = ACPICPU_C_STATE_SYSIO; 561 1.29.2.2 uebayasi 562 1.29.2.2 uebayasi cs[ACPI_STATE_C2].cs_latency = AcpiGbl_FADT.C2Latency; 563 1.29.2.2 uebayasi cs[ACPI_STATE_C3].cs_latency = AcpiGbl_FADT.C3Latency; 564 1.29.2.2 uebayasi 565 1.29.2.2 uebayasi cs[ACPI_STATE_C2].cs_addr = sc->sc_object.ao_pblkaddr + 4; 566 1.29.2.2 uebayasi cs[ACPI_STATE_C3].cs_addr = sc->sc_object.ao_pblkaddr + 5; 567 1.29.2.2 uebayasi 568 1.29.2.2 uebayasi /* 569 1.29.2.2 uebayasi * The P_BLK length should always be 6. If it 570 1.29.2.2 uebayasi * is not, reduce functionality accordingly. 571 1.29.2.2 uebayasi */ 572 1.29.2.2 uebayasi if (sc->sc_object.ao_pblklen < 5) 573 1.29.2.2 uebayasi cs[ACPI_STATE_C2].cs_method = 0; 574 1.29.2.2 uebayasi 575 1.29.2.2 uebayasi if (sc->sc_object.ao_pblklen < 6) 576 1.29.2.2 uebayasi cs[ACPI_STATE_C3].cs_method = 0; 577 1.29.2.2 uebayasi 578 1.29.2.2 uebayasi /* 579 1.29.2.2 uebayasi * Sanity check the latency levels in FADT. 580 1.29.2.2 uebayasi * Values above the thresholds are used to 581 1.29.2.2 uebayasi * inform that C-states are not supported. 582 1.29.2.2 uebayasi */ 583 1.29.2.2 uebayasi CTASSERT(ACPICPU_C_C2_LATENCY_MAX == 100); 584 1.29.2.2 uebayasi CTASSERT(ACPICPU_C_C3_LATENCY_MAX == 1000); 585 1.29.2.2 uebayasi 586 1.29.2.2 uebayasi if (AcpiGbl_FADT.C2Latency > ACPICPU_C_C2_LATENCY_MAX) 587 1.29.2.2 uebayasi cs[ACPI_STATE_C2].cs_method = 0; 588 1.29.2.2 uebayasi 589 1.29.2.2 uebayasi if (AcpiGbl_FADT.C3Latency > ACPICPU_C_C3_LATENCY_MAX) 590 1.29.2.2 uebayasi cs[ACPI_STATE_C3].cs_method = 0; 591 1.29.2.2 uebayasi } 592 1.29.2.2 uebayasi 593 1.29.2.2 uebayasi static void 594 1.29.2.2 uebayasi acpicpu_cstate_quirks(struct acpicpu_softc *sc) 595 1.29.2.2 uebayasi { 596 1.29.2.2 uebayasi const uint32_t reg = AcpiGbl_FADT.Pm2ControlBlock; 597 1.29.2.2 uebayasi const uint32_t len = AcpiGbl_FADT.Pm2ControlLength; 598 1.29.2.2 uebayasi 599 1.29.2.2 uebayasi /* 600 1.29.2.2 uebayasi * Disable C3 for PIIX4. 601 1.29.2.2 uebayasi */ 602 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_PIIX4) != 0) { 603 1.29.2.2 uebayasi sc->sc_cstate[ACPI_STATE_C3].cs_method = 0; 604 1.29.2.2 uebayasi return; 605 1.29.2.2 uebayasi } 606 1.29.2.2 uebayasi 607 1.29.2.2 uebayasi /* 608 1.29.2.2 uebayasi * Check bus master arbitration. If ARB_DIS 609 1.29.2.2 uebayasi * is not available, processor caches must be 610 1.29.2.2 uebayasi * flushed before C3 (ACPI 4.0, section 8.2). 611 1.29.2.2 uebayasi */ 612 1.29.2.2 uebayasi if (reg != 0 && len != 0) { 613 1.29.2.2 uebayasi sc->sc_flags |= ACPICPU_FLAG_C_ARB; 614 1.29.2.2 uebayasi return; 615 1.29.2.2 uebayasi } 616 1.29.2.2 uebayasi 617 1.29.2.2 uebayasi /* 618 1.29.2.2 uebayasi * Disable C3 entirely if WBINVD is not present. 619 1.29.2.2 uebayasi */ 620 1.29.2.2 uebayasi if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) == 0) 621 1.29.2.2 uebayasi sc->sc_cstate[ACPI_STATE_C3].cs_method = 0; 622 1.29.2.2 uebayasi else { 623 1.29.2.2 uebayasi /* 624 1.29.2.2 uebayasi * If WBINVD is present and functioning properly, 625 1.29.2.2 uebayasi * flush all processor caches before entering C3. 626 1.29.2.2 uebayasi */ 627 1.29.2.2 uebayasi if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) 628 1.29.2.2 uebayasi sc->sc_flags &= ~ACPICPU_FLAG_C_BM; 629 1.29.2.2 uebayasi else 630 1.29.2.2 uebayasi sc->sc_cstate[ACPI_STATE_C3].cs_method = 0; 631 1.29.2.2 uebayasi } 632 1.29.2.2 uebayasi } 633 1.29.2.2 uebayasi 634 1.29.2.2 uebayasi static int 635 1.29.2.2 uebayasi acpicpu_cstate_latency(struct acpicpu_softc *sc) 636 1.29.2.2 uebayasi { 637 1.29.2.2 uebayasi static const uint32_t cs_factor = 3; 638 1.29.2.2 uebayasi struct acpicpu_cstate *cs; 639 1.29.2.2 uebayasi int i; 640 1.29.2.2 uebayasi 641 1.29.2.2 uebayasi for (i = cs_state_max; i > 0; i--) { 642 1.29.2.2 uebayasi 643 1.29.2.2 uebayasi cs = &sc->sc_cstate[i]; 644 1.29.2.2 uebayasi 645 1.29.2.2 uebayasi if (__predict_false(cs->cs_method == 0)) 646 1.29.2.2 uebayasi continue; 647 1.29.2.2 uebayasi 648 1.29.2.2 uebayasi /* 649 1.29.2.2 uebayasi * Choose a state if we have previously slept 650 1.29.2.2 uebayasi * longer than the worst case latency of the 651 1.29.2.2 uebayasi * state times an arbitrary multiplier. 652 1.29.2.2 uebayasi */ 653 1.29.2.2 uebayasi if (sc->sc_cstate_sleep > cs->cs_latency * cs_factor) 654 1.29.2.2 uebayasi return i; 655 1.29.2.2 uebayasi } 656 1.29.2.2 uebayasi 657 1.29.2.2 uebayasi return ACPI_STATE_C1; 658 1.29.2.2 uebayasi } 659 1.29.2.2 uebayasi 660 1.29.2.2 uebayasi /* 661 1.29.2.2 uebayasi * The main idle loop. 662 1.29.2.2 uebayasi */ 663 1.29.2.2 uebayasi void 664 1.29.2.2 uebayasi acpicpu_cstate_idle(void) 665 1.29.2.2 uebayasi { 666 1.29.2.2 uebayasi struct cpu_info *ci = curcpu(); 667 1.29.2.2 uebayasi struct acpicpu_softc *sc; 668 1.29.2.2 uebayasi int state; 669 1.29.2.2 uebayasi 670 1.29.2.2 uebayasi if (__predict_false(ci->ci_want_resched) != 0) 671 1.29.2.2 uebayasi return; 672 1.29.2.2 uebayasi 673 1.29.2.2 uebayasi acpi_md_OsDisableInterrupt(); 674 1.29.2.2 uebayasi 675 1.29.2.2 uebayasi KASSERT(acpicpu_sc != NULL); 676 1.29.2.2 uebayasi KASSERT(ci->ci_acpiid < maxcpus); 677 1.29.2.2 uebayasi KASSERT(ci->ci_ilevel == IPL_NONE); 678 1.29.2.2 uebayasi 679 1.29.2.2 uebayasi sc = acpicpu_sc[ci->ci_acpiid]; 680 1.29.2.2 uebayasi 681 1.29.2.2 uebayasi if (__predict_false(sc == NULL)) 682 1.29.2.2 uebayasi goto halt; 683 1.29.2.2 uebayasi 684 1.29.2.2 uebayasi if (__predict_false(sc->sc_cold != false)) 685 1.29.2.2 uebayasi goto halt; 686 1.29.2.2 uebayasi 687 1.29.2.2 uebayasi if (__predict_false((sc->sc_flags & ACPICPU_FLAG_C) == 0)) 688 1.29.2.2 uebayasi goto halt; 689 1.29.2.2 uebayasi 690 1.29.2.2 uebayasi if (__predict_false(mutex_tryenter(&sc->sc_mtx) == 0)) 691 1.29.2.2 uebayasi goto halt; 692 1.29.2.2 uebayasi 693 1.29.2.2 uebayasi mutex_exit(&sc->sc_mtx); 694 1.29.2.2 uebayasi state = acpicpu_cstate_latency(sc); 695 1.29.2.2 uebayasi 696 1.29.2.2 uebayasi /* 697 1.29.2.2 uebayasi * Check for bus master activity. Note that particularly usb(4) 698 1.29.2.2 uebayasi * causes high activity, which may prevent the use of C3 states. 699 1.29.2.2 uebayasi */ 700 1.29.2.2 uebayasi if ((sc->sc_cstate[state].cs_flags & ACPICPU_FLAG_C_BM_STS) != 0) { 701 1.29.2.2 uebayasi 702 1.29.2.2 uebayasi if (acpicpu_cstate_bm_check() != false) 703 1.29.2.2 uebayasi state--; 704 1.29.2.2 uebayasi 705 1.29.2.2 uebayasi if (__predict_false(sc->sc_cstate[state].cs_method == 0)) 706 1.29.2.2 uebayasi state = ACPI_STATE_C1; 707 1.29.2.2 uebayasi } 708 1.29.2.2 uebayasi 709 1.29.2.2 uebayasi KASSERT(state != ACPI_STATE_C0); 710 1.29.2.2 uebayasi 711 1.29.2.2 uebayasi if (state != ACPI_STATE_C3) { 712 1.29.2.2 uebayasi acpicpu_cstate_idle_enter(sc, state); 713 1.29.2.2 uebayasi return; 714 1.29.2.2 uebayasi } 715 1.29.2.2 uebayasi 716 1.29.2.2 uebayasi /* 717 1.29.2.2 uebayasi * On all recent (Intel) CPUs caches are shared 718 1.29.2.2 uebayasi * by CPUs and bus master control is required to 719 1.29.2.2 uebayasi * keep these coherent while in C3. Flushing the 720 1.29.2.2 uebayasi * CPU caches is only the last resort. 721 1.29.2.2 uebayasi */ 722 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_BM) == 0) 723 1.29.2.2 uebayasi ACPI_FLUSH_CPU_CACHE(); 724 1.29.2.2 uebayasi 725 1.29.2.2 uebayasi /* 726 1.29.2.2 uebayasi * Allow the bus master to request that any given 727 1.29.2.2 uebayasi * CPU should return immediately to C0 from C3. 728 1.29.2.2 uebayasi */ 729 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_BM) != 0) 730 1.29.2.2 uebayasi (void)AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); 731 1.29.2.2 uebayasi 732 1.29.2.2 uebayasi /* 733 1.29.2.2 uebayasi * It may be necessary to disable bus master arbitration 734 1.29.2.2 uebayasi * to ensure that bus master cycles do not occur while 735 1.29.2.2 uebayasi * sleeping in C3 (see ACPI 4.0, section 8.1.4). 736 1.29.2.2 uebayasi */ 737 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_ARB) != 0) 738 1.29.2.2 uebayasi (void)AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1); 739 1.29.2.2 uebayasi 740 1.29.2.2 uebayasi acpicpu_cstate_idle_enter(sc, state); 741 1.29.2.2 uebayasi 742 1.29.2.2 uebayasi /* 743 1.29.2.2 uebayasi * Disable bus master wake and re-enable the arbiter. 744 1.29.2.2 uebayasi */ 745 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_BM) != 0) 746 1.29.2.2 uebayasi (void)AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 747 1.29.2.2 uebayasi 748 1.29.2.2 uebayasi if ((sc->sc_flags & ACPICPU_FLAG_C_ARB) != 0) 749 1.29.2.2 uebayasi (void)AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0); 750 1.29.2.2 uebayasi 751 1.29.2.2 uebayasi return; 752 1.29.2.2 uebayasi 753 1.29.2.2 uebayasi halt: 754 1.29.2.2 uebayasi acpicpu_md_idle_enter(ACPICPU_C_STATE_HALT, ACPI_STATE_C1); 755 1.29.2.2 uebayasi } 756 1.29.2.2 uebayasi 757 1.29.2.2 uebayasi static void 758 1.29.2.2 uebayasi acpicpu_cstate_idle_enter(struct acpicpu_softc *sc, int state) 759 1.29.2.2 uebayasi { 760 1.29.2.2 uebayasi struct acpicpu_cstate *cs = &sc->sc_cstate[state]; 761 1.29.2.2 uebayasi uint32_t end, start, val; 762 1.29.2.2 uebayasi 763 1.29.2.2 uebayasi start = acpitimer_read_safe(NULL); 764 1.29.2.2 uebayasi 765 1.29.2.2 uebayasi switch (cs->cs_method) { 766 1.29.2.2 uebayasi 767 1.29.2.2 uebayasi case ACPICPU_C_STATE_FFH: 768 1.29.2.2 uebayasi case ACPICPU_C_STATE_HALT: 769 1.29.2.2 uebayasi acpicpu_md_idle_enter(cs->cs_method, state); 770 1.29.2.2 uebayasi break; 771 1.29.2.2 uebayasi 772 1.29.2.2 uebayasi case ACPICPU_C_STATE_SYSIO: 773 1.29.2.2 uebayasi (void)AcpiOsReadPort(cs->cs_addr, &val, 8); 774 1.29.2.2 uebayasi break; 775 1.29.2.2 uebayasi 776 1.29.2.2 uebayasi default: 777 1.29.2.2 uebayasi acpicpu_md_idle_enter(ACPICPU_C_STATE_HALT, ACPI_STATE_C1); 778 1.29.2.2 uebayasi break; 779 1.29.2.2 uebayasi } 780 1.29.2.2 uebayasi 781 1.29.2.2 uebayasi cs->cs_evcnt.ev_count++; 782 1.29.2.2 uebayasi 783 1.29.2.2 uebayasi end = acpitimer_read_safe(NULL); 784 1.29.2.2 uebayasi sc->sc_cstate_sleep = hztoms(acpitimer_delta(end, start)) * 1000; 785 1.29.2.2 uebayasi 786 1.29.2.2 uebayasi acpi_md_OsEnableInterrupt(); 787 1.29.2.2 uebayasi } 788 1.29.2.2 uebayasi 789 1.29.2.2 uebayasi static bool 790 1.29.2.2 uebayasi acpicpu_cstate_bm_check(void) 791 1.29.2.2 uebayasi { 792 1.29.2.2 uebayasi uint32_t val = 0; 793 1.29.2.2 uebayasi ACPI_STATUS rv; 794 1.29.2.2 uebayasi 795 1.29.2.2 uebayasi rv = AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &val); 796 1.29.2.2 uebayasi 797 1.29.2.2 uebayasi if (ACPI_FAILURE(rv) || val == 0) 798 1.29.2.2 uebayasi return false; 799 1.29.2.2 uebayasi 800 1.29.2.2 uebayasi (void)AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1); 801 1.29.2.2 uebayasi 802 1.29.2.2 uebayasi return true; 803 1.29.2.2 uebayasi } 804
Indexes created Tue Sep 30 17:09:57 GMT 2025