1 1.1 ryoon /* $NetBSD: amdgpioreg.h,v 1.1 2025/02/26 15:18:46 ryoon Exp $ */ 2 1.1 ryoon 3 1.1 ryoon /* $OpenBSD: amdgpio.c,v 1.10 2022/10/20 20:40:57 kettenis Exp $ */ 4 1.1 ryoon /* 5 1.1 ryoon * Copyright (c) 2016 Mark Kettenis 6 1.1 ryoon * Copyright (c) 2019 James Hastings 7 1.1 ryoon * 8 1.1 ryoon * Permission to use, copy, modify, and distribute this software for any 9 1.1 ryoon * purpose with or without fee is hereby granted, provided that the above 10 1.1 ryoon * copyright notice and this permission notice appear in all copies. 11 1.1 ryoon * 12 1.1 ryoon * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 1.1 ryoon * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 1.1 ryoon * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 1.1 ryoon * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 1.1 ryoon * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 1.1 ryoon * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 1.1 ryoon * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 1.1 ryoon */ 20 1.1 ryoon 21 1.1 ryoon #ifndef _AMDGPIOREG_H 22 1.1 ryoon #define _AMDGPIOREG_H 23 1.1 ryoon 24 1.1 ryoon #define AMDGPIO_NPINS 184 25 1.1 ryoon #define AMDGPIO_PIN_REG(pin) ((pin) * 4) 26 1.1 ryoon 27 1.1 ryoon #define AMDGPIO_CONF_LEVEL 0x00000100 28 1.1 ryoon #define AMDGPIO_CONF_ACTLO 0x00000200 29 1.1 ryoon #define AMDGPIO_CONF_ACTBOTH 0x00000400 30 1.1 ryoon #define AMDGPIO_CONF_MASK 0x00000600 31 1.1 ryoon #define AMDGPIO_CONF_INTR_EN 0x00000800 32 1.1 ryoon #define AMDGPIO_CONF_INTR_MASK_EN 0x00001000 33 1.1 ryoon #define AMDGPIO_CONF_GPIORXSTATE 0x00010000 34 1.1 ryoon #define AMDGPIO_CONF_GPIOTXSTATE 0x00400000 35 1.1 ryoon #define AMDGPIO_CONF_GPIOTXSTATE_EN 0x00800000 36 1.1 ryoon #define AMDGPIO_CONF_INTR_STATUS 0x10000000 37 1.1 ryoon 38 1.1 ryoon /* n should be 0 or 1. */ 39 1.1 ryoon #define AMDGPIO_INTR_STATUS(n) (0x2f8 + (n) * 4) 40 1.1 ryoon 41 1.1 ryoon #define AMDGPIO_INTR_MASTER 0xfc 42 1.1 ryoon #define AMDGPIO_INTR_MASTER_EIO 0x20000000 43 1.1 ryoon #define AMDGPIO_INTR_STATUS_NBITS 46 44 1.1 ryoon #define AMDGPIO_INTR_NPINS 4 45 1.1 ryoon 46 1.1 ryoon #endif /* _AMDGPIOREG_H */ 47