nxpiic_acpi.c revision 1.4
1/* $NetBSD: nxpiic_acpi.c,v 1.4 2021/01/29 02:26:58 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 2021 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill@invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <sys/cdefs.h> 33__KERNEL_RCSID(0, "$NetBSD: nxpiic_acpi.c,v 1.4 2021/01/29 02:26:58 thorpej Exp $"); 34 35#include <sys/param.h> 36#include <sys/bus.h> 37#include <sys/cpu.h> 38#include <sys/device.h> 39 40#include <dev/acpi/acpireg.h> 41#include <dev/acpi/acpivar.h> 42#include <dev/acpi/acpi_intr.h> 43#include <dev/acpi/acpi_i2c.h> 44 45#include <dev/i2c/motoi2cvar.h> 46#include <dev/i2c/motoi2creg.h> 47 48#define NXPIIC_SPEED_STD 100000 49 50static const struct clk_div { 51 int scl_div; 52 uint8_t ibc; 53} nxpiic_clk_div[] = { 54 { 20, 0x00 }, { 22, 0x01 }, { 24, 0x02 }, { 26, 0x03 }, 55 { 28, 0x04 }, { 30, 0x05 }, { 32, 0x09 }, { 34, 0x06 }, 56 { 36, 0x0a }, { 40, 0x07 }, { 44, 0x0c }, { 48, 0x0d }, 57 { 52, 0x43 }, { 56, 0x0e }, { 60, 0x45 }, { 64, 0x12 }, 58 { 68, 0x0f }, { 72, 0x13 }, { 80, 0x14 }, { 88, 0x15 }, 59 { 96, 0x19 }, { 104, 0x16 }, { 112, 0x1a }, { 128, 0x17 }, 60 { 136, 0x4f }, { 144, 0x1c }, { 160, 0x1d }, { 176, 0x55 }, 61 { 192, 0x1e }, { 208, 0x56 }, { 224, 0x22 }, { 228, 0x24 }, 62 { 240, 0x1f }, { 256, 0x23 }, { 288, 0x5c }, { 320, 0x25 }, 63 { 384, 0x26 }, { 448, 0x2a }, { 480, 0x27 }, { 512, 0x2b }, 64 { 576, 0x2c }, { 640, 0x2d }, { 768, 0x31 }, { 896, 0x32 }, 65 { 960, 0x2f }, { 1024, 0x33 }, { 1152, 0x34 }, { 1280, 0x35 }, 66 { 1536, 0x36 }, { 1792, 0x3a }, { 1920, 0x37 }, { 2048, 0x3b }, 67 { 2304, 0x3c }, { 2560, 0x3d }, { 3072, 0x3e }, { 3584, 0x7a }, 68 { 3840, 0x3f }, { 4096, 0x7B }, { 5120, 0x7d }, { 6144, 0x7e }, 69}; 70 71struct nxpiic_softc { 72 device_t sc_dev; 73 struct motoi2c_softc sc_motoi2c; 74}; 75 76static int nxpiic_acpi_match(device_t, cfdata_t, void *); 77static void nxpiic_acpi_attach(device_t, device_t, void *); 78 79static uint8_t nxpiic_acpi_iord(struct motoi2c_softc *, bus_size_t); 80static void nxpiic_acpi_iowr(struct motoi2c_softc *, bus_size_t, uint8_t); 81 82CFATTACH_DECL_NEW(nxpiic_acpi, sizeof(struct nxpiic_softc), 83 nxpiic_acpi_match, nxpiic_acpi_attach, NULL, NULL); 84 85static const struct device_compatible_entry compat_data[] = { 86 { .compat = "NXP0001" }, 87 DEVICE_COMPAT_EOL 88}; 89 90static int 91nxpiic_acpi_match(device_t parent, cfdata_t cf, void *aux) 92{ 93 struct acpi_attach_args *aa = aux; 94 95 return acpi_compatible_match(aa, compat_data); 96} 97 98static void 99nxpiic_acpi_attach(device_t parent, device_t self, void *aux) 100{ 101 struct nxpiic_softc * const sc = device_private(self); 102 struct motoi2c_softc * const msc = &sc->sc_motoi2c; 103 struct motoi2c_settings settings; 104 struct acpi_attach_args *aa = aux; 105 struct acpi_resources res; 106 struct acpi_mem *mem; 107 ACPI_INTEGER clock_freq; 108 ACPI_STATUS rv; 109 int error, n; 110 111 sc->sc_dev = self; 112 msc->sc_iot = aa->aa_memt; 113 114 rv = acpi_resource_parse(sc->sc_dev, aa->aa_node->ad_handle, "_CRS", 115 &res, &acpi_resource_parse_ops_default); 116 if (ACPI_FAILURE(rv)) 117 return; 118 119 mem = acpi_res_mem(&res, 0); 120 if (mem == NULL) { 121 aprint_error_dev(self, "couldn't find mem resource\n"); 122 goto done; 123 } 124 125 rv = acpi_dsd_integer(aa->aa_node->ad_handle, "clock-frequency", 126 &clock_freq); 127 if (ACPI_FAILURE(rv) || clock_freq == 0) { 128 aprint_error_dev(self, "couldn't get clock frequency\n"); 129 goto done; 130 } 131 aprint_debug_dev(self, "bus clock %u Hz\n", (u_int)clock_freq); 132 133 error = bus_space_map(msc->sc_iot, mem->ar_base, mem->ar_length, 0, 134 &msc->sc_ioh); 135 if (error) { 136 aprint_error_dev(self, "couldn't map registers\n"); 137 return; 138 } 139 140 settings.i2c_adr = MOTOI2C_ADR_DEFAULT; 141 settings.i2c_dfsrr = MOTOI2C_DFSRR_DEFAULT; 142 for (n = 0; n < __arraycount(nxpiic_clk_div) - 1; n++) { 143 if (clock_freq / nxpiic_clk_div[n].scl_div < NXPIIC_SPEED_STD) 144 break; 145 } 146 settings.i2c_fdr = nxpiic_clk_div[n].ibc; 147 148 msc->sc_flags |= MOTOI2C_F_ENABLE_INV | MOTOI2C_F_STATUS_W1C; 149 msc->sc_iord = nxpiic_acpi_iord; 150 msc->sc_iowr = nxpiic_acpi_iowr; 151 msc->sc_child_devices = acpi_enter_i2c_devs(self, aa->aa_node); 152 153 motoi2c_attach_common(self, msc, &settings); 154 155done: 156 acpi_resource_cleanup(&res); 157 158} 159 160static uint8_t 161nxpiic_acpi_iord(struct motoi2c_softc *msc, bus_size_t off) 162{ 163 KASSERT((off & 3) == 0); 164 165 if (off >= I2CDFSRR) 166 return 0; 167 168 return bus_space_read_1(msc->sc_iot, msc->sc_ioh, off >> 2); 169} 170 171static void 172nxpiic_acpi_iowr(struct motoi2c_softc *msc, bus_size_t off, uint8_t val) 173{ 174 KASSERT((off & 3) == 0); 175 176 if (off >= I2CDFSRR) 177 return; 178 179 bus_space_write_1(msc->sc_iot, msc->sc_ioh, off >> 2, val); 180} 181