plgpio_acpi.c revision 1.3 1 /* $NetBSD: plgpio_acpi.c,v 1.3 2018/10/22 22:29:35 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill (at) invisible.ca>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: plgpio_acpi.c,v 1.3 2018/10/22 22:29:35 jmcneill Exp $");
34
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/cpu.h>
38 #include <sys/device.h>
39 #include <sys/gpio.h>
40
41 #include <dev/acpi/acpireg.h>
42 #include <dev/acpi/acpivar.h>
43 #include <dev/acpi/acpi_event.h>
44
45 #include <dev/gpio/gpiovar.h>
46 #include <dev/ic/pl061var.h>
47 #include <dev/ic/pl061reg.h>
48
49 struct plgpio_acpi_softc;
50
51 struct plgpio_acpi_softc {
52 struct plgpio_softc sc_base;
53
54 ACPI_HANDLE sc_handle;
55
56 struct acpi_event * sc_event[8];
57 };
58
59 static int plgpio_acpi_match(device_t, cfdata_t, void *);
60 static void plgpio_acpi_attach(device_t, device_t, void *);
61
62 static void plgpio_acpi_register_event(void *, struct acpi_event *, ACPI_RESOURCE_GPIO *);
63 static int plgpio_acpi_intr(void *);
64
65 CFATTACH_DECL_NEW(plgpio_acpi, sizeof(struct plgpio_acpi_softc), plgpio_acpi_match, plgpio_acpi_attach, NULL, NULL);
66
67 static const char * const compatible[] = {
68 "ARMH0061",
69 NULL
70 };
71
72 static int
73 plgpio_acpi_match(device_t parent, cfdata_t cf, void *aux)
74 {
75 struct acpi_attach_args *aa = aux;
76
77 if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
78 return 0;
79
80 return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
81 }
82
83 static void
84 plgpio_acpi_attach(device_t parent, device_t self, void *aux)
85 {
86 struct plgpio_acpi_softc * const asc = device_private(self);
87 struct plgpio_softc * const sc = &asc->sc_base;
88 struct acpi_attach_args *aa = aux;
89 struct acpi_resources res;
90 struct acpi_mem *mem;
91 struct acpi_irq *irq;
92 ACPI_STATUS rv;
93 int error;
94 void *ih;
95
96 sc->sc_dev = self;
97 asc->sc_handle = aa->aa_node->ad_handle;
98
99 rv = acpi_resource_parse(sc->sc_dev, aa->aa_node->ad_handle, "_CRS",
100 &res, &acpi_resource_parse_ops_default);
101 if (ACPI_FAILURE(rv))
102 return;
103
104 mem = acpi_res_mem(&res, 0);
105 if (mem == NULL) {
106 aprint_error_dev(self, "couldn't find mem resource\n");
107 goto done;
108 }
109
110 irq = acpi_res_irq(&res, 0);
111 if (mem == NULL) {
112 aprint_error_dev(self, "couldn't find irq resource\n");
113 goto done;
114 }
115
116 sc->sc_dev = self;
117 sc->sc_bst = aa->aa_memt;
118 error = bus_space_map(sc->sc_bst, mem->ar_base, mem->ar_length, 0, &sc->sc_bsh);
119 if (error) {
120 aprint_error_dev(self, "couldn't map registers\n");
121 return;
122 }
123
124 plgpio_attach(sc);
125
126 if (ACPI_FAILURE(acpi_event_create_gpio(self, asc->sc_handle, plgpio_acpi_register_event, asc))) {
127 aprint_error_dev(self, "failed to create events\n");
128 goto done;
129 }
130
131 const int type = (irq->ar_type == ACPI_EDGE_SENSITIVE) ? IST_EDGE : IST_LEVEL;
132 ih = intr_establish(irq->ar_irq, IPL_VM, type, plgpio_acpi_intr, asc);
133 if (ih == NULL)
134 aprint_error_dev(self, "couldn't establish interrupt\n");
135
136 done:
137 acpi_resource_cleanup(&res);
138 }
139
140 static void
141 plgpio_acpi_register_event(void *priv, struct acpi_event *ev, ACPI_RESOURCE_GPIO *gpio)
142 {
143 struct plgpio_acpi_softc * const asc = priv;
144 struct plgpio_softc * const sc = &asc->sc_base;
145 uint32_t ibe, iev, is, ie;
146
147 const int pin = gpio->PinTable[0];
148
149 if (pin >= __arraycount(asc->sc_event)) {
150 aprint_error_dev(asc->sc_base.sc_dev,
151 "ignoring event for pin %u (out of range)\n", pin);
152 return;
153 }
154 if (asc->sc_event[pin] != NULL) {
155 aprint_error_dev(asc->sc_base.sc_dev,
156 "ignoring duplicate pin %u\n", pin);
157 return;
158 }
159
160 asc->sc_event[pin] = ev;
161 asc->sc_base.sc_reserved_mask |= __BIT(pin);
162
163 /*
164 * Configure and enable interrupts for this pin.
165 */
166
167 ibe = PLGPIO_READ(sc, PL061_GPIOIBE_REG);
168 iev = PLGPIO_READ(sc, PL061_GPIOIEV_REG);
169 switch (gpio->Polarity) {
170 case ACPI_ACTIVE_HIGH:
171 ibe &= ~__BIT(pin);
172 iev |= __BIT(pin);
173 break;
174 case ACPI_ACTIVE_LOW:
175 ibe &= ~__BIT(pin);
176 iev &= ~__BIT(pin);
177 break;
178 case ACPI_ACTIVE_BOTH:
179 ibe |= __BIT(pin);
180 break;
181 }
182 PLGPIO_WRITE(sc, PL061_GPIOIBE_REG, ibe);
183 PLGPIO_WRITE(sc, PL061_GPIOIEV_REG, iev);
184
185 is = PLGPIO_READ(sc, PL061_GPIOIS_REG);
186 switch (gpio->Triggering) {
187 case ACPI_LEVEL_SENSITIVE:
188 is |= __BIT(pin);
189 break;
190 case ACPI_EDGE_SENSITIVE:
191 is &= ~__BIT(pin);
192 break;
193 }
194 PLGPIO_WRITE(sc, PL061_GPIOIS_REG, is);
195
196 delay(20);
197
198 PLGPIO_WRITE(sc, PL061_GPIOIC_REG, __BIT(pin));
199
200 ie = PLGPIO_READ(sc, PL061_GPIOIE_REG);
201 ie |= __BIT(pin);
202 PLGPIO_WRITE(sc, PL061_GPIOIE_REG, ie);
203 }
204
205 static int
206 plgpio_acpi_intr(void *priv)
207 {
208 struct plgpio_acpi_softc * const asc = priv;
209 struct plgpio_softc * const sc = &asc->sc_base;
210 uint32_t mis;
211 int bit;
212
213 mis = PLGPIO_READ(sc, PL061_GPIOMIS_REG);
214 PLGPIO_WRITE(sc, PL061_GPIOIC_REG, mis);
215
216 while ((bit = __builtin_ffs(mis)) != 0) {
217 const int pin = bit - 1;
218 struct acpi_event * const ev = asc->sc_event[pin];
219 KASSERT(ev != NULL);
220
221 acpi_event_notify(ev);
222
223 mis &= ~__BIT(pin);
224 }
225
226 return 1;
227 }
228