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      1  1.3  riastrad /* $NetBSD: qcomgpioreg.h,v 1.3 2024/12/17 22:05:11 riastradh Exp $ */
      2  1.1  jmcneill /*
      3  1.1  jmcneill  * Copyright (c) 2022 Mark Kettenis <kettenis (at) openbsd.org>
      4  1.1  jmcneill  *
      5  1.1  jmcneill  * Permission to use, copy, modify, and distribute this software for any
      6  1.1  jmcneill  * purpose with or without fee is hereby granted, provided that the above
      7  1.1  jmcneill  * copyright notice and this permission notice appear in all copies.
      8  1.1  jmcneill  *
      9  1.1  jmcneill  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     10  1.1  jmcneill  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     11  1.1  jmcneill  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     12  1.1  jmcneill  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     13  1.1  jmcneill  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     14  1.1  jmcneill  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     15  1.1  jmcneill  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     16  1.1  jmcneill  */
     17  1.1  jmcneill 
     18  1.1  jmcneill #ifndef QCOMGPIOREG_H
     19  1.1  jmcneill #define QCOMGPIOREG_H
     20  1.1  jmcneill 
     21  1.3  riastrad #include <sys/cdefs.h>
     22  1.3  riastrad 
     23  1.1  jmcneill #define _TLMM_GPIO_PIN_OFFSET(pin, reg)	((pin) * 0x1000 + (reg))
     24  1.1  jmcneill 
     25  1.2  jmcneill #define TLMM_GPIO_CTL(pin)		_TLMM_GPIO_PIN_OFFSET(pin, 0x0)
     26  1.2  jmcneill #define  TLMM_GPIO_CTL_OE			__BIT(9)
     27  1.2  jmcneill #define  TLMM_GPIO_CTL_MUX			__BITS(5,2)
     28  1.2  jmcneill #define   TLMM_GPIO_CTL_MUX_GPIO			0
     29  1.2  jmcneill 
     30  1.1  jmcneill #define TLMM_GPIO_IN_OUT(pin)		_TLMM_GPIO_PIN_OFFSET(pin, 0x4)
     31  1.1  jmcneill #define  TLMM_GPIO_IN_OUT_GPIO_IN		__BIT(0)
     32  1.1  jmcneill #define  TLMM_GPIO_IN_OUT_GPIO_OUT		__BIT(1)
     33  1.1  jmcneill 
     34  1.1  jmcneill #define TLMM_GPIO_INTR_CFG(pin)		_TLMM_GPIO_PIN_OFFSET(pin, 0x8)
     35  1.1  jmcneill #define  TLMM_GPIO_INTR_CFG_TARGET_PROC_MASK	__BITS(7,5)
     36  1.1  jmcneill #define   TLMM_GPIO_INTR_CFG_TARGET_PROC_RPM		3
     37  1.1  jmcneill #define  TLMM_GPIO_INTR_CFG_INTR_RAW_STATUS_EN	__BIT(4)
     38  1.1  jmcneill #define  TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_MASK	__BITS(3,2)
     39  1.1  jmcneill #define   TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_LEVEL	0
     40  1.1  jmcneill #define   TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_EDGE_POS	1
     41  1.1  jmcneill #define   TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_EDGE_NEG	2
     42  1.1  jmcneill #define   TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_EDGE_BOTH	3
     43  1.1  jmcneill #define  TLMM_GPIO_INTR_CFG_INTR_POL_CTL	__BIT(1)
     44  1.1  jmcneill #define  TLMM_GPIO_INTR_CFG_INTR_ENABLE		__BIT(0)
     45  1.1  jmcneill 
     46  1.1  jmcneill #define TLMM_GPIO_INTR_STATUS(pin)	_TLMM_GPIO_PIN_OFFSET(pin, 0xc)
     47  1.1  jmcneill #define  TLMM_GPIO_INTR_STATUS_INTR_STATUS	__BIT(0)
     48  1.1  jmcneill 
     49  1.1  jmcneill #endif /* !QCOMGPIOREG_H */
     50