ata.c revision 1.102
1 /* $NetBSD: ata.c,v 1.102 2008/11/16 19:31:21 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.102 2008/11/16 19:31:21 bouyer Exp $"); 34 35 #include "opt_ata.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 #include <sys/fcntl.h> 44 #include <sys/proc.h> 45 #include <sys/pool.h> 46 #include <sys/kthread.h> 47 #include <sys/errno.h> 48 #include <sys/ataio.h> 49 #include <sys/kmem.h> 50 #include <sys/simplelock.h> 51 #include <sys/intr.h> 52 #include <sys/bus.h> 53 54 #include <dev/ata/ataconf.h> 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 #include <dev/ic/wdcvar.h> /* for PIOBM */ 58 59 #include "locators.h" 60 61 #include "atapibus.h" 62 #include "ataraid.h" 63 64 #if NATARAID > 0 65 #include <dev/ata/ata_raidvar.h> 66 #endif 67 68 #define DEBUG_FUNCS 0x08 69 #define DEBUG_PROBE 0x10 70 #define DEBUG_DETACH 0x20 71 #define DEBUG_XFERS 0x40 72 #ifdef ATADEBUG 73 int atadebug_mask = 0; 74 #define ATADEBUG_PRINT(args, level) \ 75 if (atadebug_mask & (level)) \ 76 printf args 77 #else 78 #define ATADEBUG_PRINT(args, level) 79 #endif 80 81 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL, 82 IPL_BIO); 83 84 /* 85 * A queue of atabus instances, used to ensure the same bus probe order 86 * for a given hardware configuration at each boot. 87 */ 88 struct atabus_initq_head atabus_initq_head = 89 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 91 92 /* kernel thread probing devices on a atabus. Only one probing at once */ 93 struct lwp *atabus_configlwp; 94 95 /***************************************************************************** 96 * ATA bus layer. 97 * 98 * ATA controllers attach an atabus instance, which handles probing the bus 99 * for drives, etc. 100 *****************************************************************************/ 101 102 dev_type_open(atabusopen); 103 dev_type_close(atabusclose); 104 dev_type_ioctl(atabusioctl); 105 106 const struct cdevsw atabus_cdevsw = { 107 atabusopen, atabusclose, noread, nowrite, atabusioctl, 108 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 109 }; 110 111 extern struct cfdriver atabus_cd; 112 113 static void atabus_childdetached(device_t, device_t); 114 static bool atabus_resume(device_t PMF_FN_PROTO); 115 static bool atabus_suspend(device_t PMF_FN_PROTO); 116 static void atabusconfig_thread(void *); 117 118 /* 119 * atabusprint: 120 * 121 * Autoconfiguration print routine used by ATA controllers when 122 * attaching an atabus instance. 123 */ 124 int 125 atabusprint(void *aux, const char *pnp) 126 { 127 struct ata_channel *chan = aux; 128 129 if (pnp) 130 aprint_normal("atabus at %s", pnp); 131 aprint_normal(" channel %d", chan->ch_channel); 132 133 return (UNCONF); 134 } 135 136 /* 137 * ataprint: 138 * 139 * Autoconfiguration print routine. 140 */ 141 int 142 ataprint(void *aux, const char *pnp) 143 { 144 struct ata_device *adev = aux; 145 146 if (pnp) 147 aprint_normal("wd at %s", pnp); 148 aprint_normal(" drive %d", adev->adev_drv_data->drive); 149 150 return (UNCONF); 151 } 152 153 /* 154 * ata_channel_attach: 155 * 156 * Common parts of attaching an atabus to an ATA controller channel. 157 */ 158 void 159 ata_channel_attach(struct ata_channel *chp) 160 { 161 162 if (chp->ch_flags & ATACH_DISABLED) 163 return; 164 165 callout_init(&chp->ch_callout, 0); 166 167 TAILQ_INIT(&chp->ch_queue->queue_xfer); 168 chp->ch_queue->queue_freeze = 0; 169 chp->ch_queue->queue_flags = 0; 170 chp->ch_queue->active_xfer = NULL; 171 172 chp->atabus = config_found_ia(chp->ch_atac->atac_dev, "ata", chp, 173 atabusprint); 174 } 175 176 static void 177 atabusconfig(struct atabus_softc *atabus_sc) 178 { 179 struct ata_channel *chp = atabus_sc->sc_chan; 180 struct atac_softc *atac = chp->ch_atac; 181 struct atabus_initq *atabus_initq = NULL; 182 int i, s, error; 183 184 /* we are in the atabus's thread context */ 185 s = splbio(); 186 chp->ch_flags |= ATACH_TH_RUN; 187 splx(s); 188 189 /* Probe for the drives. */ 190 /* XXX for SATA devices we will power up all drives at once */ 191 (*atac->atac_probe)(chp); 192 193 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 194 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 195 DEBUG_PROBE); 196 197 /* next operations will occurs in a separate thread */ 198 s = splbio(); 199 chp->ch_flags &= ~ATACH_TH_RUN; 200 splx(s); 201 202 /* Make sure the devices probe in atabus order to avoid jitter. */ 203 simple_lock(&atabus_interlock); 204 while(1) { 205 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 206 if (atabus_initq->atabus_sc == atabus_sc) 207 break; 208 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 209 &atabus_interlock); 210 } 211 simple_unlock(&atabus_interlock); 212 213 /* If no drives, abort here */ 214 for (i = 0; i < chp->ch_ndrive; i++) 215 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 216 break; 217 if (i == chp->ch_ndrive) 218 goto out; 219 220 /* Shortcut in case we've been shutdown */ 221 if (chp->ch_flags & ATACH_SHUTDOWN) 222 goto out; 223 224 225 if ((error = kthread_create(PRI_NONE, 0, NULL, atabusconfig_thread, 226 atabus_sc, &atabus_configlwp, 227 "%scnf", device_xname(atac->atac_dev))) != 0) 228 aprint_error_dev(atac->atac_dev, 229 "unable to create config thread: error %d\n", error); 230 return; 231 232 out: 233 simple_lock(&atabus_interlock); 234 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 235 simple_unlock(&atabus_interlock); 236 237 free(atabus_initq, M_DEVBUF); 238 wakeup(&atabus_initq_head); 239 240 ata_delref(chp); 241 242 config_pending_decr(); 243 } 244 245 /* 246 * atabus_configthread: finish attach of atabus's childrens, in a separate 247 * kernel thread. 248 */ 249 static void 250 atabusconfig_thread(void *arg) 251 { 252 struct atabus_softc *atabus_sc = arg; 253 struct ata_channel *chp = atabus_sc->sc_chan; 254 struct atac_softc *atac = chp->ch_atac; 255 int i, s; 256 struct atabus_initq *atabus_initq = NULL; 257 258 simple_lock(&atabus_interlock); 259 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 260 simple_unlock(&atabus_interlock); 261 KASSERT(atabus_initq->atabus_sc == atabus_sc); 262 /* 263 * Attach an ATAPI bus, if needed. 264 */ 265 for (i = 0; i < chp->ch_ndrive; i++) { 266 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 267 #if NATAPIBUS > 0 268 (*atac->atac_atapibus_attach)(atabus_sc); 269 #else 270 /* 271 * Fake the autoconfig "not configured" message 272 */ 273 aprint_normal("atapibus at %s not configured\n", 274 device_xname(atac->atac_dev)); 275 chp->atapibus = NULL; 276 s = splbio(); 277 for (i = 0; i < chp->ch_ndrive; i++) 278 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 279 splx(s); 280 #endif 281 break; 282 } 283 } 284 285 for (i = 0; i < chp->ch_ndrive; i++) { 286 struct ata_device adev; 287 if ((chp->ch_drive[i].drive_flags & 288 (DRIVE_ATA | DRIVE_OLD)) == 0) { 289 continue; 290 } 291 memset(&adev, 0, sizeof(struct ata_device)); 292 adev.adev_bustype = atac->atac_bustype_ata; 293 adev.adev_channel = chp->ch_channel; 294 adev.adev_openings = 1; 295 adev.adev_drv_data = &chp->ch_drive[i]; 296 chp->ata_drives[i] = config_found_ia(atabus_sc->sc_dev, 297 "ata_hl", &adev, ataprint); 298 if (chp->ata_drives[i] != NULL) 299 ata_probe_caps(&chp->ch_drive[i]); 300 else { 301 s = splbio(); 302 chp->ch_drive[i].drive_flags &= 303 ~(DRIVE_ATA | DRIVE_OLD); 304 splx(s); 305 } 306 } 307 308 /* now that we know the drives, the controller can set its modes */ 309 if (atac->atac_set_modes) { 310 (*atac->atac_set_modes)(chp); 311 ata_print_modes(chp); 312 } 313 #if NATARAID > 0 314 if (atac->atac_cap & ATAC_CAP_RAID) 315 for (i = 0; i < chp->ch_ndrive; i++) 316 if (chp->ata_drives[i] != NULL) 317 ata_raid_check_component(chp->ata_drives[i]); 318 #endif /* NATARAID > 0 */ 319 320 /* 321 * reset drive_flags for unattached devices, reset state for attached 322 * ones 323 */ 324 s = splbio(); 325 for (i = 0; i < chp->ch_ndrive; i++) { 326 if (chp->ch_drive[i].drv_softc == NULL) 327 chp->ch_drive[i].drive_flags = 0; 328 else 329 chp->ch_drive[i].state = 0; 330 } 331 splx(s); 332 333 simple_lock(&atabus_interlock); 334 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 335 simple_unlock(&atabus_interlock); 336 337 free(atabus_initq, M_DEVBUF); 338 wakeup(&atabus_initq_head); 339 340 ata_delref(chp); 341 342 config_pending_decr(); 343 kthread_exit(0); 344 } 345 346 /* 347 * atabus_thread: 348 * 349 * Worker thread for the ATA bus. 350 */ 351 static void 352 atabus_thread(void *arg) 353 { 354 struct atabus_softc *sc = arg; 355 struct ata_channel *chp = sc->sc_chan; 356 struct ata_xfer *xfer; 357 int i, s; 358 359 s = splbio(); 360 chp->ch_flags |= ATACH_TH_RUN; 361 362 /* 363 * Probe the drives. Reset all flags to 0 to indicate to controllers 364 * that can re-probe that all drives must be probed.. 365 * 366 * Note: ch_ndrive may be changed during the probe. 367 */ 368 for (i = 0; i < ATA_MAXDRIVES; i++) 369 chp->ch_drive[i].drive_flags = 0; 370 splx(s); 371 372 atabusconfig(sc); 373 374 s = splbio(); 375 for (;;) { 376 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 377 (chp->ch_queue->active_xfer == NULL || 378 chp->ch_queue->queue_freeze == 0)) { 379 chp->ch_flags &= ~ATACH_TH_RUN; 380 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 381 chp->ch_flags |= ATACH_TH_RUN; 382 } 383 if (chp->ch_flags & ATACH_SHUTDOWN) { 384 break; 385 } 386 if (chp->ch_flags & ATACH_TH_RESET) { 387 /* 388 * ata_reset_channel() will freeze 2 times, so 389 * unfreeze one time. Not a problem as we're at splbio 390 */ 391 chp->ch_queue->queue_freeze--; 392 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 393 } else if (chp->ch_queue->active_xfer != NULL && 394 chp->ch_queue->queue_freeze == 1) { 395 /* 396 * Caller has bumped queue_freeze, decrease it. 397 */ 398 chp->ch_queue->queue_freeze--; 399 xfer = chp->ch_queue->active_xfer; 400 KASSERT(xfer != NULL); 401 (*xfer->c_start)(xfer->c_chp, xfer); 402 } else if (chp->ch_queue->queue_freeze > 1) 403 panic("ata_thread: queue_freeze"); 404 } 405 splx(s); 406 chp->ch_thread = NULL; 407 wakeup(&chp->ch_flags); 408 kthread_exit(0); 409 } 410 411 /* 412 * atabus_match: 413 * 414 * Autoconfiguration match routine. 415 */ 416 static int 417 atabus_match(device_t parent, struct cfdata *cf, void *aux) 418 { 419 struct ata_channel *chp = aux; 420 421 if (chp == NULL) 422 return (0); 423 424 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 425 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 426 return (0); 427 428 return (1); 429 } 430 431 /* 432 * atabus_attach: 433 * 434 * Autoconfiguration attach routine. 435 */ 436 static void 437 atabus_attach(device_t parent, device_t self, void *aux) 438 { 439 struct atabus_softc *sc = device_private(self); 440 struct ata_channel *chp = aux; 441 struct atabus_initq *initq; 442 int error; 443 444 sc->sc_chan = chp; 445 446 aprint_normal("\n"); 447 aprint_naive("\n"); 448 449 sc->sc_dev = self; 450 451 if (ata_addref(chp)) 452 return; 453 454 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 455 initq->atabus_sc = sc; 456 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 457 config_pending_incr(); 458 459 if ((error = kthread_create(PRI_NONE, 0, NULL, atabus_thread, sc, 460 &chp->ch_thread, "%s", device_xname(self))) != 0) 461 aprint_error_dev(self, 462 "unable to create kernel thread: error %d\n", error); 463 464 if (!pmf_device_register(self, atabus_suspend, atabus_resume)) 465 aprint_error_dev(self, "couldn't establish power handler\n"); 466 } 467 468 /* 469 * atabus_activate: 470 * 471 * Autoconfiguration activation routine. 472 */ 473 static int 474 atabus_activate(device_t self, enum devact act) 475 { 476 struct atabus_softc *sc = device_private(self); 477 struct ata_channel *chp = sc->sc_chan; 478 device_t dev = NULL; 479 int s, i, error = 0; 480 481 s = splbio(); 482 switch (act) { 483 case DVACT_ACTIVATE: 484 error = EOPNOTSUPP; 485 break; 486 487 case DVACT_DEACTIVATE: 488 /* 489 * We might deactivate the children of atapibus twice 490 * (once bia atapibus, once directly), but since the 491 * generic autoconfiguration code maintains the DVF_ACTIVE 492 * flag, it's safe. 493 */ 494 if ((dev = chp->atapibus) != NULL) { 495 error = config_deactivate(dev); 496 if (error) 497 goto out; 498 } 499 500 for (i = 0; i < chp->ch_ndrive; i++) { 501 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 502 ATADEBUG_PRINT(("atabus_activate: %s: " 503 "deactivating %s\n", device_xname(self), 504 device_xname(dev)), 505 DEBUG_DETACH); 506 error = config_deactivate(dev); 507 if (error) 508 goto out; 509 } 510 } 511 break; 512 } 513 out: 514 splx(s); 515 516 #ifdef ATADEBUG 517 if (dev != NULL && error != 0) 518 ATADEBUG_PRINT(("atabus_activate: %s: " 519 "error %d deactivating %s\n", device_xname(self), 520 error, device_xname(dev)), DEBUG_DETACH); 521 #endif /* ATADEBUG */ 522 523 return (error); 524 } 525 526 /* 527 * atabus_detach: 528 * 529 * Autoconfiguration detach routine. 530 */ 531 static int 532 atabus_detach(device_t self, int flags) 533 { 534 struct atabus_softc *sc = device_private(self); 535 struct ata_channel *chp = sc->sc_chan; 536 device_t dev = NULL; 537 int s, i, error = 0; 538 539 /* Shutdown the channel. */ 540 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 541 chp->ch_flags |= ATACH_SHUTDOWN; 542 splx(s); 543 544 wakeup(&chp->ch_thread); 545 546 while (chp->ch_thread != NULL) 547 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 548 549 550 /* 551 * Detach atapibus and its children. 552 */ 553 if ((dev = chp->atapibus) != NULL) { 554 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 555 device_xname(self), device_xname(dev)), DEBUG_DETACH); 556 557 error = config_detach(dev, flags); 558 if (error) 559 goto out; 560 } 561 562 /* 563 * Detach our other children. 564 */ 565 for (i = 0; i < chp->ch_ndrive; i++) { 566 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 567 continue; 568 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 569 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 570 device_xname(self), device_xname(dev)), 571 DEBUG_DETACH); 572 error = config_detach(dev, flags); 573 if (error) 574 goto out; 575 } 576 } 577 578 out: 579 #ifdef ATADEBUG 580 if (dev != NULL && error != 0) 581 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 582 device_xname(self), error, device_xname(dev)), 583 DEBUG_DETACH); 584 #endif /* ATADEBUG */ 585 586 return (error); 587 } 588 589 void 590 atabus_childdetached(device_t self, device_t child) 591 { 592 struct atabus_softc *sc = device_private(self); 593 struct ata_channel *chp = sc->sc_chan; 594 int i; 595 596 /* 597 * atapibus detached. 598 */ 599 if (child == chp->atapibus) { 600 chp->atapibus = NULL; 601 return; 602 } 603 604 /* 605 * Detach our other children. 606 */ 607 for (i = 0; i < chp->ch_ndrive; i++) { 608 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 609 continue; 610 if (child == chp->ch_drive[i].drv_softc) { 611 chp->ch_drive[i].drv_softc = NULL; 612 chp->ch_drive[i].drive_flags = 0; 613 return; 614 } 615 } 616 617 aprint_error_dev(self, "unknown child %p", (const void *)child); 618 } 619 620 CFATTACH_DECL2_NEW(atabus, sizeof(struct atabus_softc), 621 atabus_match, atabus_attach, atabus_detach, atabus_activate, NULL, 622 atabus_childdetached); 623 624 /***************************************************************************** 625 * Common ATA bus operations. 626 *****************************************************************************/ 627 628 /* Get the disk's parameters */ 629 int 630 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 631 struct ataparams *prms) 632 { 633 struct ata_command ata_c; 634 struct ata_channel *chp = drvp->chnl_softc; 635 struct atac_softc *atac = chp->ch_atac; 636 char *tb; 637 int i, rv; 638 u_int16_t *p; 639 640 ATADEBUG_PRINT(("%s\n", __func__), DEBUG_FUNCS); 641 642 tb = kmem_zalloc(DEV_BSIZE, KM_SLEEP); 643 memset(prms, 0, sizeof(struct ataparams)); 644 memset(&ata_c, 0, sizeof(struct ata_command)); 645 646 if (drvp->drive_flags & DRIVE_ATA) { 647 ata_c.r_command = WDCC_IDENTIFY; 648 ata_c.r_st_bmask = WDCS_DRDY; 649 ata_c.r_st_pmask = WDCS_DRQ; 650 ata_c.timeout = 3000; /* 3s */ 651 } else if (drvp->drive_flags & DRIVE_ATAPI) { 652 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 653 ata_c.r_st_bmask = 0; 654 ata_c.r_st_pmask = WDCS_DRQ; 655 ata_c.timeout = 10000; /* 10s */ 656 } else { 657 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 658 DEBUG_FUNCS|DEBUG_PROBE); 659 rv = CMD_ERR; 660 goto out; 661 } 662 ata_c.flags = AT_READ | flags; 663 ata_c.data = tb; 664 ata_c.bcount = DEV_BSIZE; 665 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 666 &ata_c) != ATACMD_COMPLETE) { 667 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 668 DEBUG_FUNCS|DEBUG_PROBE); 669 rv = CMD_AGAIN; 670 goto out; 671 } 672 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 673 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 674 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 675 rv = CMD_ERR; 676 goto out; 677 } 678 /* if we didn't read any data something is wrong */ 679 if ((ata_c.flags & AT_XFDONE) == 0) { 680 rv = CMD_ERR; 681 goto out; 682 } 683 684 /* Read in parameter block. */ 685 memcpy(prms, tb, sizeof(struct ataparams)); 686 687 /* 688 * Shuffle string byte order. 689 * ATAPI NEC, Mitsumi and Pioneer drives and 690 * old ATA TDK CompactFlash cards 691 * have different byte order. 692 */ 693 #if BYTE_ORDER == BIG_ENDIAN 694 # define M(n) prms->atap_model[(n) ^ 1] 695 #else 696 # define M(n) prms->atap_model[n] 697 #endif 698 if ( 699 #if BYTE_ORDER == BIG_ENDIAN 700 ! 701 #endif 702 ((drvp->drive_flags & DRIVE_ATAPI) ? 703 ((M(0) == 'N' && M(1) == 'E') || 704 (M(0) == 'F' && M(1) == 'X') || 705 (M(0) == 'P' && M(1) == 'i')) : 706 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) { 707 rv = CMD_OK; 708 goto out; 709 } 710 #undef M 711 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 712 p = (u_int16_t *)(prms->atap_model + i); 713 *p = bswap16(*p); 714 } 715 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 716 p = (u_int16_t *)(prms->atap_serial + i); 717 *p = bswap16(*p); 718 } 719 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 720 p = (u_int16_t *)(prms->atap_revision + i); 721 *p = bswap16(*p); 722 } 723 724 rv = CMD_OK; 725 out: 726 kmem_free(tb, DEV_BSIZE); 727 return rv; 728 } 729 730 int 731 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 732 { 733 struct ata_command ata_c; 734 struct ata_channel *chp = drvp->chnl_softc; 735 struct atac_softc *atac = chp->ch_atac; 736 737 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 738 memset(&ata_c, 0, sizeof(struct ata_command)); 739 740 ata_c.r_command = SET_FEATURES; 741 ata_c.r_st_bmask = 0; 742 ata_c.r_st_pmask = 0; 743 ata_c.r_features = WDSF_SET_MODE; 744 ata_c.r_count = mode; 745 ata_c.flags = flags; 746 ata_c.timeout = 1000; /* 1s */ 747 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 748 &ata_c) != ATACMD_COMPLETE) 749 return CMD_AGAIN; 750 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 751 return CMD_ERR; 752 } 753 return CMD_OK; 754 } 755 756 #if NATA_DMA 757 void 758 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 759 { 760 /* 761 * Downgrade decision: if we get NERRS_MAX in NXFER. 762 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 763 * first error within the first NXFER ops will immediatly trigger 764 * a downgrade. 765 * If we got an error and n_xfers is bigger than NXFER reset counters. 766 */ 767 drvp->n_dmaerrs++; 768 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 769 ata_downgrade_mode(drvp, flags); 770 drvp->n_dmaerrs = NERRS_MAX-1; 771 drvp->n_xfers = 0; 772 return; 773 } 774 if (drvp->n_xfers > NXFER) { 775 drvp->n_dmaerrs = 1; /* just got an error */ 776 drvp->n_xfers = 1; /* restart counting from this error */ 777 } 778 } 779 #endif /* NATA_DMA */ 780 781 /* 782 * freeze the queue and wait for the controller to be idle. Caller has to 783 * unfreeze/restart the queue 784 */ 785 void 786 ata_queue_idle(struct ata_queue *queue) 787 { 788 int s = splbio(); 789 queue->queue_freeze++; 790 while (queue->active_xfer != NULL) { 791 queue->queue_flags |= QF_IDLE_WAIT; 792 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 793 } 794 splx(s); 795 } 796 797 /* 798 * Add a command to the queue and start controller. 799 * 800 * MUST BE CALLED AT splbio()! 801 */ 802 void 803 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 804 { 805 806 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 807 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 808 809 /* complete xfer setup */ 810 xfer->c_chp = chp; 811 812 /* insert at the end of command list */ 813 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 814 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 815 chp->ch_flags), DEBUG_XFERS); 816 /* 817 * if polling and can sleep, wait for the xfer to be at head of queue 818 */ 819 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 820 while (chp->ch_queue->active_xfer != NULL || 821 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 822 xfer->c_flags |= C_WAITACT; 823 tsleep(xfer, PRIBIO, "ataact", 0); 824 xfer->c_flags &= ~C_WAITACT; 825 if (xfer->c_flags & C_FREE) { 826 ata_free_xfer(chp, xfer); 827 return; 828 } 829 } 830 } 831 atastart(chp); 832 } 833 834 /* 835 * Start I/O on a controller, for the given channel. 836 * The first xfer may be not for our channel if the channel queues 837 * are shared. 838 * 839 * MUST BE CALLED AT splbio()! 840 */ 841 void 842 atastart(struct ata_channel *chp) 843 { 844 struct atac_softc *atac = chp->ch_atac; 845 struct ata_xfer *xfer; 846 847 #ifdef ATA_DEBUG 848 int spl1, spl2; 849 850 spl1 = splbio(); 851 spl2 = splbio(); 852 if (spl2 != spl1) { 853 printf("atastart: not at splbio()\n"); 854 panic("atastart"); 855 } 856 splx(spl2); 857 splx(spl1); 858 #endif /* ATA_DEBUG */ 859 860 /* is there a xfer ? */ 861 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 862 return; 863 864 /* adjust chp, in case we have a shared queue */ 865 chp = xfer->c_chp; 866 867 if (chp->ch_queue->active_xfer != NULL) { 868 return; /* channel aleady active */ 869 } 870 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 871 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 872 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 873 wakeup(&chp->ch_queue->queue_flags); 874 } 875 return; /* queue frozen */ 876 } 877 /* 878 * if someone is waiting for the command to be active, wake it up 879 * and let it process the command 880 */ 881 if (xfer->c_flags & C_WAITACT) { 882 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 883 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 884 DEBUG_XFERS); 885 wakeup(xfer); 886 return; 887 } 888 #ifdef DIAGNOSTIC 889 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 890 panic("atastart: channel waiting for irq"); 891 #endif 892 if (atac->atac_claim_hw) 893 if (!(*atac->atac_claim_hw)(chp, 0)) 894 return; 895 896 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 897 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 898 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 899 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 900 chp->ch_drive[xfer->c_drive].state = 0; 901 } 902 chp->ch_queue->active_xfer = xfer; 903 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 904 905 if (atac->atac_cap & ATAC_CAP_NOIRQ) 906 KASSERT(xfer->c_flags & C_POLL); 907 908 xfer->c_start(chp, xfer); 909 } 910 911 struct ata_xfer * 912 ata_get_xfer(int flags) 913 { 914 struct ata_xfer *xfer; 915 int s; 916 917 s = splbio(); 918 xfer = pool_get(&ata_xfer_pool, 919 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 920 splx(s); 921 if (xfer != NULL) { 922 memset(xfer, 0, sizeof(struct ata_xfer)); 923 } 924 return xfer; 925 } 926 927 void 928 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 929 { 930 struct atac_softc *atac = chp->ch_atac; 931 int s; 932 933 if (xfer->c_flags & C_WAITACT) { 934 /* Someone is waiting for this xfer, so we can't free now */ 935 xfer->c_flags |= C_FREE; 936 wakeup(xfer); 937 return; 938 } 939 940 #if NATA_PIOBM /* XXX wdc dependent code */ 941 if (xfer->c_flags & C_PIOBM) { 942 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 943 944 /* finish the busmastering PIO */ 945 (*wdc->piobm_done)(wdc->dma_arg, 946 chp->ch_channel, xfer->c_drive); 947 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 948 } 949 #endif 950 951 if (atac->atac_free_hw) 952 (*atac->atac_free_hw)(chp); 953 s = splbio(); 954 pool_put(&ata_xfer_pool, xfer); 955 splx(s); 956 } 957 958 /* 959 * Kill off all pending xfers for a ata_channel. 960 * 961 * Must be called at splbio(). 962 */ 963 void 964 ata_kill_pending(struct ata_drive_datas *drvp) 965 { 966 struct ata_channel *chp = drvp->chnl_softc; 967 struct ata_xfer *xfer, *next_xfer; 968 int s = splbio(); 969 970 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 971 xfer != NULL; xfer = next_xfer) { 972 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 973 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 974 continue; 975 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 976 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 977 } 978 979 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 980 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 981 drvp->drive_flags |= DRIVE_WAITDRAIN; 982 (void) tsleep(&chp->ch_queue->active_xfer, 983 PRIBIO, "atdrn", 0); 984 } else { 985 /* no more xfer for us */ 986 break; 987 } 988 } 989 splx(s); 990 } 991 992 /* 993 * ata_reset_channel: 994 * 995 * Reset and ATA channel. 996 * 997 * MUST BE CALLED AT splbio()! 998 */ 999 void 1000 ata_reset_channel(struct ata_channel *chp, int flags) 1001 { 1002 struct atac_softc *atac = chp->ch_atac; 1003 int drive; 1004 1005 #ifdef ATA_DEBUG 1006 int spl1, spl2; 1007 1008 spl1 = splbio(); 1009 spl2 = splbio(); 1010 if (spl2 != spl1) { 1011 printf("ata_reset_channel: not at splbio()\n"); 1012 panic("ata_reset_channel"); 1013 } 1014 splx(spl2); 1015 splx(spl1); 1016 #endif /* ATA_DEBUG */ 1017 1018 chp->ch_queue->queue_freeze++; 1019 1020 /* 1021 * If we can poll or wait it's OK, otherwise wake up the 1022 * kernel thread to do it for us. 1023 */ 1024 ATADEBUG_PRINT(("ata_reset_channel flags 0x%x ch_flags 0x%x\n", 1025 flags, chp->ch_flags), DEBUG_FUNCS | DEBUG_XFERS); 1026 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 1027 if (chp->ch_flags & ATACH_TH_RESET) { 1028 /* No need to schedule a reset more than one time. */ 1029 chp->ch_queue->queue_freeze--; 1030 return; 1031 } 1032 chp->ch_flags |= ATACH_TH_RESET; 1033 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 1034 wakeup(&chp->ch_thread); 1035 return; 1036 } 1037 1038 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 1039 1040 for (drive = 0; drive < chp->ch_ndrive; drive++) 1041 chp->ch_drive[drive].state = 0; 1042 1043 chp->ch_flags &= ~ATACH_TH_RESET; 1044 if ((flags & AT_RST_EMERG) == 0) { 1045 chp->ch_queue->queue_freeze--; 1046 atastart(chp); 1047 } else { 1048 /* make sure that we can use polled commands */ 1049 TAILQ_INIT(&chp->ch_queue->queue_xfer); 1050 chp->ch_queue->queue_freeze = 0; 1051 chp->ch_queue->active_xfer = NULL; 1052 } 1053 } 1054 1055 int 1056 ata_addref(struct ata_channel *chp) 1057 { 1058 struct atac_softc *atac = chp->ch_atac; 1059 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1060 int s, error = 0; 1061 1062 s = splbio(); 1063 if (adapt->adapt_refcnt++ == 0 && 1064 adapt->adapt_enable != NULL) { 1065 error = (*adapt->adapt_enable)(atac->atac_dev, 1); 1066 if (error) 1067 adapt->adapt_refcnt--; 1068 } 1069 splx(s); 1070 return (error); 1071 } 1072 1073 void 1074 ata_delref(struct ata_channel *chp) 1075 { 1076 struct atac_softc *atac = chp->ch_atac; 1077 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1078 int s; 1079 1080 s = splbio(); 1081 if (adapt->adapt_refcnt-- == 1 && 1082 adapt->adapt_enable != NULL) 1083 (void) (*adapt->adapt_enable)(atac->atac_dev, 0); 1084 splx(s); 1085 } 1086 1087 void 1088 ata_print_modes(struct ata_channel *chp) 1089 { 1090 struct atac_softc *atac = chp->ch_atac; 1091 int drive; 1092 struct ata_drive_datas *drvp; 1093 1094 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1095 drvp = &chp->ch_drive[drive]; 1096 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1097 continue; 1098 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1099 device_xname(drvp->drv_softc), 1100 device_xname(atac->atac_dev), 1101 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1102 #if NATA_DMA 1103 if (drvp->drive_flags & DRIVE_DMA) 1104 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1105 #if NATA_UDMA 1106 if (drvp->drive_flags & DRIVE_UDMA) { 1107 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1108 if (drvp->UDMA_mode == 2) 1109 aprint_verbose(" (Ultra/33)"); 1110 else if (drvp->UDMA_mode == 4) 1111 aprint_verbose(" (Ultra/66)"); 1112 else if (drvp->UDMA_mode == 5) 1113 aprint_verbose(" (Ultra/100)"); 1114 else if (drvp->UDMA_mode == 6) 1115 aprint_verbose(" (Ultra/133)"); 1116 } 1117 #endif /* NATA_UDMA */ 1118 #endif /* NATA_DMA */ 1119 #if NATA_DMA || NATA_PIOBM 1120 if (0 1121 #if NATA_DMA 1122 || (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1123 #endif 1124 #if NATA_PIOBM 1125 /* PIOBM capable controllers use DMA for PIO commands */ 1126 || (atac->atac_cap & ATAC_CAP_PIOBM) 1127 #endif 1128 ) 1129 aprint_verbose(" (using DMA)"); 1130 #endif /* NATA_DMA || NATA_PIOBM */ 1131 aprint_verbose("\n"); 1132 } 1133 } 1134 1135 #if NATA_DMA 1136 /* 1137 * downgrade the transfer mode of a drive after an error. return 1 if 1138 * downgrade was possible, 0 otherwise. 1139 * 1140 * MUST BE CALLED AT splbio()! 1141 */ 1142 int 1143 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1144 { 1145 struct ata_channel *chp = drvp->chnl_softc; 1146 struct atac_softc *atac = chp->ch_atac; 1147 device_t drv_dev = drvp->drv_softc; 1148 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1149 1150 /* if drive or controller don't know its mode, we can't do much */ 1151 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1152 (atac->atac_set_modes == NULL)) 1153 return 0; 1154 /* current drive mode was set by a config flag, let it this way */ 1155 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1156 (cf_flags & ATA_CONFIG_DMA_SET) || 1157 (cf_flags & ATA_CONFIG_UDMA_SET)) 1158 return 0; 1159 1160 #if NATA_UDMA 1161 /* 1162 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1163 */ 1164 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1165 drvp->UDMA_mode--; 1166 aprint_error_dev(drv_dev, 1167 "transfer error, downgrading to Ultra-DMA mode %d\n", 1168 drvp->UDMA_mode); 1169 } 1170 #endif 1171 1172 /* 1173 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1174 */ 1175 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1176 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1177 drvp->PIO_mode = drvp->PIO_cap; 1178 aprint_error_dev(drv_dev, 1179 "transfer error, downgrading to PIO mode %d\n", 1180 drvp->PIO_mode); 1181 } else /* already using PIO, can't downgrade */ 1182 return 0; 1183 1184 (*atac->atac_set_modes)(chp); 1185 ata_print_modes(chp); 1186 /* reset the channel, which will schedule all drives for setup */ 1187 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1188 return 1; 1189 } 1190 #endif /* NATA_DMA */ 1191 1192 /* 1193 * Probe drive's capabilities, for use by the controller later 1194 * Assumes drvp points to an existing drive. 1195 */ 1196 void 1197 ata_probe_caps(struct ata_drive_datas *drvp) 1198 { 1199 struct ataparams params, params2; 1200 struct ata_channel *chp = drvp->chnl_softc; 1201 struct atac_softc *atac = chp->ch_atac; 1202 device_t drv_dev = drvp->drv_softc; 1203 int i, printed, s; 1204 const char *sep = ""; 1205 int cf_flags; 1206 1207 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1208 /* IDENTIFY failed. Can't tell more about the device */ 1209 return; 1210 } 1211 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1212 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1213 /* 1214 * Controller claims 16 and 32 bit transfers. 1215 * Re-do an IDENTIFY with 32-bit transfers, 1216 * and compare results. 1217 */ 1218 s = splbio(); 1219 drvp->drive_flags |= DRIVE_CAP32; 1220 splx(s); 1221 ata_get_params(drvp, AT_WAIT, ¶ms2); 1222 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1223 /* Not good. fall back to 16bits */ 1224 s = splbio(); 1225 drvp->drive_flags &= ~DRIVE_CAP32; 1226 splx(s); 1227 } else { 1228 aprint_verbose_dev(drv_dev, "32-bit data port\n"); 1229 } 1230 } 1231 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1232 if (params.atap_ata_major > 0x01 && 1233 params.atap_ata_major != 0xffff) { 1234 for (i = 14; i > 0; i--) { 1235 if (params.atap_ata_major & (1 << i)) { 1236 aprint_verbose_dev(drv_dev, 1237 "ATA version %d\n", i); 1238 drvp->ata_vers = i; 1239 break; 1240 } 1241 } 1242 } 1243 #endif 1244 1245 /* An ATAPI device is at last PIO mode 3 */ 1246 if (drvp->drive_flags & DRIVE_ATAPI) 1247 drvp->PIO_mode = 3; 1248 1249 /* 1250 * It's not in the specs, but it seems that some drive 1251 * returns 0xffff in atap_extensions when this field is invalid 1252 */ 1253 if (params.atap_extensions != 0xffff && 1254 (params.atap_extensions & WDC_EXT_MODES)) { 1255 printed = 0; 1256 /* 1257 * XXX some drives report something wrong here (they claim to 1258 * support PIO mode 8 !). As mode is coded on 3 bits in 1259 * SET FEATURE, limit it to 7 (so limit i to 4). 1260 * If higher mode than 7 is found, abort. 1261 */ 1262 for (i = 7; i >= 0; i--) { 1263 if ((params.atap_piomode_supp & (1 << i)) == 0) 1264 continue; 1265 if (i > 4) 1266 return; 1267 /* 1268 * See if mode is accepted. 1269 * If the controller can't set its PIO mode, 1270 * assume the defaults are good, so don't try 1271 * to set it 1272 */ 1273 if (atac->atac_set_modes) 1274 /* 1275 * It's OK to pool here, it's fast enouth 1276 * to not bother waiting for interrupt 1277 */ 1278 if (ata_set_mode(drvp, 0x08 | (i + 3), 1279 AT_WAIT) != CMD_OK) 1280 continue; 1281 if (!printed) { 1282 aprint_verbose_dev(drv_dev, 1283 "drive supports PIO mode %d", i + 3); 1284 sep = ","; 1285 printed = 1; 1286 } 1287 /* 1288 * If controller's driver can't set its PIO mode, 1289 * get the highter one for the drive. 1290 */ 1291 if (atac->atac_set_modes == NULL || 1292 atac->atac_pio_cap >= i + 3) { 1293 drvp->PIO_mode = i + 3; 1294 drvp->PIO_cap = i + 3; 1295 break; 1296 } 1297 } 1298 if (!printed) { 1299 /* 1300 * We didn't find a valid PIO mode. 1301 * Assume the values returned for DMA are buggy too 1302 */ 1303 return; 1304 } 1305 s = splbio(); 1306 drvp->drive_flags |= DRIVE_MODE; 1307 splx(s); 1308 printed = 0; 1309 for (i = 7; i >= 0; i--) { 1310 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1311 continue; 1312 #if NATA_DMA 1313 if ((atac->atac_cap & ATAC_CAP_DMA) && 1314 atac->atac_set_modes != NULL) 1315 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1316 != CMD_OK) 1317 continue; 1318 #endif 1319 if (!printed) { 1320 aprint_verbose("%s DMA mode %d", sep, i); 1321 sep = ","; 1322 printed = 1; 1323 } 1324 #if NATA_DMA 1325 if (atac->atac_cap & ATAC_CAP_DMA) { 1326 if (atac->atac_set_modes != NULL && 1327 atac->atac_dma_cap < i) 1328 continue; 1329 drvp->DMA_mode = i; 1330 drvp->DMA_cap = i; 1331 s = splbio(); 1332 drvp->drive_flags |= DRIVE_DMA; 1333 splx(s); 1334 } 1335 #endif 1336 break; 1337 } 1338 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1339 printed = 0; 1340 for (i = 7; i >= 0; i--) { 1341 if ((params.atap_udmamode_supp & (1 << i)) 1342 == 0) 1343 continue; 1344 #if NATA_UDMA 1345 if (atac->atac_set_modes != NULL && 1346 (atac->atac_cap & ATAC_CAP_UDMA)) 1347 if (ata_set_mode(drvp, 0x40 | i, 1348 AT_WAIT) != CMD_OK) 1349 continue; 1350 #endif 1351 if (!printed) { 1352 aprint_verbose("%s Ultra-DMA mode %d", 1353 sep, i); 1354 if (i == 2) 1355 aprint_verbose(" (Ultra/33)"); 1356 else if (i == 4) 1357 aprint_verbose(" (Ultra/66)"); 1358 else if (i == 5) 1359 aprint_verbose(" (Ultra/100)"); 1360 else if (i == 6) 1361 aprint_verbose(" (Ultra/133)"); 1362 sep = ","; 1363 printed = 1; 1364 } 1365 #if NATA_UDMA 1366 if (atac->atac_cap & ATAC_CAP_UDMA) { 1367 if (atac->atac_set_modes != NULL && 1368 atac->atac_udma_cap < i) 1369 continue; 1370 drvp->UDMA_mode = i; 1371 drvp->UDMA_cap = i; 1372 s = splbio(); 1373 drvp->drive_flags |= DRIVE_UDMA; 1374 splx(s); 1375 } 1376 #endif 1377 break; 1378 } 1379 } 1380 aprint_verbose("\n"); 1381 } 1382 1383 s = splbio(); 1384 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1385 if (drvp->drive_flags & DRIVE_ATAPI) { 1386 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1387 drvp->drive_flags |= DRIVE_NOSTREAM; 1388 } else { 1389 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1390 drvp->drive_flags |= DRIVE_NOSTREAM; 1391 } 1392 splx(s); 1393 1394 /* Try to guess ATA version here, if it didn't get reported */ 1395 if (drvp->ata_vers == 0) { 1396 #if NATA_UDMA 1397 if (drvp->drive_flags & DRIVE_UDMA) 1398 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1399 else 1400 #endif 1401 if (drvp->PIO_cap > 2) 1402 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1403 } 1404 cf_flags = device_cfdata(drv_dev)->cf_flags; 1405 if (cf_flags & ATA_CONFIG_PIO_SET) { 1406 s = splbio(); 1407 drvp->PIO_mode = 1408 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1409 drvp->drive_flags |= DRIVE_MODE; 1410 splx(s); 1411 } 1412 #if NATA_DMA 1413 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1414 /* don't care about DMA modes */ 1415 return; 1416 } 1417 if (cf_flags & ATA_CONFIG_DMA_SET) { 1418 s = splbio(); 1419 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1420 ATA_CONFIG_DMA_DISABLE) { 1421 drvp->drive_flags &= ~DRIVE_DMA; 1422 } else { 1423 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1424 ATA_CONFIG_DMA_OFF; 1425 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1426 } 1427 splx(s); 1428 } 1429 #if NATA_UDMA 1430 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1431 /* don't care about UDMA modes */ 1432 return; 1433 } 1434 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1435 s = splbio(); 1436 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1437 ATA_CONFIG_UDMA_DISABLE) { 1438 drvp->drive_flags &= ~DRIVE_UDMA; 1439 } else { 1440 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1441 ATA_CONFIG_UDMA_OFF; 1442 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1443 } 1444 splx(s); 1445 } 1446 #endif /* NATA_UDMA */ 1447 #endif /* NATA_DMA */ 1448 } 1449 1450 /* management of the /dev/atabus* devices */ 1451 int 1452 atabusopen(dev_t dev, int flag, int fmt, 1453 struct lwp *l) 1454 { 1455 struct atabus_softc *sc; 1456 int error; 1457 1458 sc = device_lookup_private(&atabus_cd, minor(dev)); 1459 if (sc == NULL) 1460 return (ENXIO); 1461 1462 if (sc->sc_flags & ATABUSCF_OPEN) 1463 return (EBUSY); 1464 1465 if ((error = ata_addref(sc->sc_chan)) != 0) 1466 return (error); 1467 1468 sc->sc_flags |= ATABUSCF_OPEN; 1469 1470 return (0); 1471 } 1472 1473 1474 int 1475 atabusclose(dev_t dev, int flag, int fmt, 1476 struct lwp *l) 1477 { 1478 struct atabus_softc *sc = 1479 device_lookup_private(&atabus_cd, minor(dev)); 1480 1481 ata_delref(sc->sc_chan); 1482 1483 sc->sc_flags &= ~ATABUSCF_OPEN; 1484 1485 return (0); 1486 } 1487 1488 int 1489 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, 1490 struct lwp *l) 1491 { 1492 struct atabus_softc *sc = 1493 device_lookup_private(&atabus_cd, minor(dev)); 1494 struct ata_channel *chp = sc->sc_chan; 1495 int min_drive, max_drive, drive; 1496 int error; 1497 int s; 1498 1499 /* 1500 * Enforce write permission for ioctls that change the 1501 * state of the bus. Host adapter specific ioctls must 1502 * be checked by the adapter driver. 1503 */ 1504 switch (cmd) { 1505 case ATABUSIOSCAN: 1506 case ATABUSIODETACH: 1507 case ATABUSIORESET: 1508 if ((flag & FWRITE) == 0) 1509 return (EBADF); 1510 } 1511 1512 switch (cmd) { 1513 case ATABUSIORESET: 1514 s = splbio(); 1515 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1516 splx(s); 1517 error = 0; 1518 break; 1519 case ATABUSIOSCAN: 1520 { 1521 #if 0 1522 struct atabusioscan_args *a= 1523 (struct atabusioscan_args *)addr; 1524 #endif 1525 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1526 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1527 return (EOPNOTSUPP); 1528 return (EOPNOTSUPP); 1529 } 1530 case ATABUSIODETACH: 1531 { 1532 struct atabusioscan_args *a= 1533 (struct atabusioscan_args *)addr; 1534 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1535 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1536 return (EOPNOTSUPP); 1537 switch (a->at_dev) { 1538 case -1: 1539 min_drive = 0; 1540 max_drive = 1; 1541 break; 1542 case 0: 1543 case 1: 1544 min_drive = max_drive = a->at_dev; 1545 break; 1546 default: 1547 return (EINVAL); 1548 } 1549 for (drive = min_drive; drive <= max_drive; drive++) { 1550 if (chp->ch_drive[drive].drv_softc != NULL) { 1551 error = config_detach( 1552 chp->ch_drive[drive].drv_softc, 0); 1553 if (error) 1554 return (error); 1555 KASSERT(chp->ch_drive[drive].drv_softc == NULL); 1556 } 1557 } 1558 error = 0; 1559 break; 1560 } 1561 default: 1562 error = ENOTTY; 1563 } 1564 return (error); 1565 }; 1566 1567 static bool 1568 atabus_suspend(device_t dv PMF_FN_ARGS) 1569 { 1570 struct atabus_softc *sc = device_private(dv); 1571 struct ata_channel *chp = sc->sc_chan; 1572 1573 ata_queue_idle(chp->ch_queue); 1574 1575 return true; 1576 } 1577 1578 static bool 1579 atabus_resume(device_t dv PMF_FN_ARGS) 1580 { 1581 struct atabus_softc *sc = device_private(dv); 1582 struct ata_channel *chp = sc->sc_chan; 1583 int s; 1584 1585 /* 1586 * XXX joerg: with wdc, the first channel unfreezes the controler. 1587 * Move this the reset and queue idling into wdc. 1588 */ 1589 s = splbio(); 1590 if (chp->ch_queue->queue_freeze == 0) { 1591 splx(s); 1592 return true; 1593 } 1594 KASSERT(chp->ch_queue->queue_freeze > 0); 1595 /* unfreeze the queue and reset drives */ 1596 chp->ch_queue->queue_freeze--; 1597 ata_reset_channel(chp, AT_WAIT); 1598 splx(s); 1599 1600 return true; 1601 } 1602
Indexes created Wed Sep 24 15:09:51 GMT 2025