ata.c revision 1.104
1 /* $NetBSD: ata.c,v 1.104 2009/04/03 21:31:08 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.104 2009/04/03 21:31:08 dyoung Exp $"); 34 35 #include "opt_ata.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 #include <sys/fcntl.h> 44 #include <sys/proc.h> 45 #include <sys/pool.h> 46 #include <sys/kthread.h> 47 #include <sys/errno.h> 48 #include <sys/ataio.h> 49 #include <sys/kmem.h> 50 #include <sys/simplelock.h> 51 #include <sys/intr.h> 52 #include <sys/bus.h> 53 54 #include <dev/ata/ataconf.h> 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 #include <dev/ic/wdcvar.h> /* for PIOBM */ 58 59 #include "locators.h" 60 61 #include "atapibus.h" 62 #include "ataraid.h" 63 64 #if NATARAID > 0 65 #include <dev/ata/ata_raidvar.h> 66 #endif 67 68 #define DEBUG_FUNCS 0x08 69 #define DEBUG_PROBE 0x10 70 #define DEBUG_DETACH 0x20 71 #define DEBUG_XFERS 0x40 72 #ifdef ATADEBUG 73 int atadebug_mask = 0; 74 #define ATADEBUG_PRINT(args, level) \ 75 if (atadebug_mask & (level)) \ 76 printf args 77 #else 78 #define ATADEBUG_PRINT(args, level) 79 #endif 80 81 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL, 82 IPL_BIO); 83 84 /* 85 * A queue of atabus instances, used to ensure the same bus probe order 86 * for a given hardware configuration at each boot. 87 */ 88 struct atabus_initq_head atabus_initq_head = 89 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 91 92 /* kernel thread probing devices on a atabus. Only one probing at once */ 93 struct lwp *atabus_configlwp; 94 95 /***************************************************************************** 96 * ATA bus layer. 97 * 98 * ATA controllers attach an atabus instance, which handles probing the bus 99 * for drives, etc. 100 *****************************************************************************/ 101 102 dev_type_open(atabusopen); 103 dev_type_close(atabusclose); 104 dev_type_ioctl(atabusioctl); 105 106 const struct cdevsw atabus_cdevsw = { 107 atabusopen, atabusclose, noread, nowrite, atabusioctl, 108 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 109 }; 110 111 extern struct cfdriver atabus_cd; 112 113 static void atabus_childdetached(device_t, device_t); 114 static bool atabus_resume(device_t PMF_FN_PROTO); 115 static bool atabus_suspend(device_t PMF_FN_PROTO); 116 static void atabusconfig_thread(void *); 117 118 /* 119 * atabusprint: 120 * 121 * Autoconfiguration print routine used by ATA controllers when 122 * attaching an atabus instance. 123 */ 124 int 125 atabusprint(void *aux, const char *pnp) 126 { 127 struct ata_channel *chan = aux; 128 129 if (pnp) 130 aprint_normal("atabus at %s", pnp); 131 aprint_normal(" channel %d", chan->ch_channel); 132 133 return (UNCONF); 134 } 135 136 /* 137 * ataprint: 138 * 139 * Autoconfiguration print routine. 140 */ 141 int 142 ataprint(void *aux, const char *pnp) 143 { 144 struct ata_device *adev = aux; 145 146 if (pnp) 147 aprint_normal("wd at %s", pnp); 148 aprint_normal(" drive %d", adev->adev_drv_data->drive); 149 150 return (UNCONF); 151 } 152 153 /* 154 * ata_channel_attach: 155 * 156 * Common parts of attaching an atabus to an ATA controller channel. 157 */ 158 void 159 ata_channel_attach(struct ata_channel *chp) 160 { 161 162 if (chp->ch_flags & ATACH_DISABLED) 163 return; 164 165 callout_init(&chp->ch_callout, 0); 166 167 TAILQ_INIT(&chp->ch_queue->queue_xfer); 168 chp->ch_queue->queue_freeze = 0; 169 chp->ch_queue->queue_flags = 0; 170 chp->ch_queue->active_xfer = NULL; 171 172 chp->atabus = config_found_ia(chp->ch_atac->atac_dev, "ata", chp, 173 atabusprint); 174 } 175 176 static void 177 atabusconfig(struct atabus_softc *atabus_sc) 178 { 179 struct ata_channel *chp = atabus_sc->sc_chan; 180 struct atac_softc *atac = chp->ch_atac; 181 struct atabus_initq *atabus_initq = NULL; 182 int i, s, error; 183 184 /* we are in the atabus's thread context */ 185 s = splbio(); 186 chp->ch_flags |= ATACH_TH_RUN; 187 splx(s); 188 189 /* Probe for the drives. */ 190 /* XXX for SATA devices we will power up all drives at once */ 191 (*atac->atac_probe)(chp); 192 193 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 194 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 195 DEBUG_PROBE); 196 197 /* next operations will occurs in a separate thread */ 198 s = splbio(); 199 chp->ch_flags &= ~ATACH_TH_RUN; 200 splx(s); 201 202 /* Make sure the devices probe in atabus order to avoid jitter. */ 203 simple_lock(&atabus_interlock); 204 while(1) { 205 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 206 if (atabus_initq->atabus_sc == atabus_sc) 207 break; 208 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 209 &atabus_interlock); 210 } 211 simple_unlock(&atabus_interlock); 212 213 /* If no drives, abort here */ 214 for (i = 0; i < chp->ch_ndrive; i++) 215 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 216 break; 217 if (i == chp->ch_ndrive) 218 goto out; 219 220 /* Shortcut in case we've been shutdown */ 221 if (chp->ch_flags & ATACH_SHUTDOWN) 222 goto out; 223 224 225 if ((error = kthread_create(PRI_NONE, 0, NULL, atabusconfig_thread, 226 atabus_sc, &atabus_configlwp, 227 "%scnf", device_xname(atac->atac_dev))) != 0) 228 aprint_error_dev(atac->atac_dev, 229 "unable to create config thread: error %d\n", error); 230 return; 231 232 out: 233 simple_lock(&atabus_interlock); 234 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 235 simple_unlock(&atabus_interlock); 236 237 free(atabus_initq, M_DEVBUF); 238 wakeup(&atabus_initq_head); 239 240 ata_delref(chp); 241 242 config_pending_decr(); 243 } 244 245 /* 246 * atabus_configthread: finish attach of atabus's childrens, in a separate 247 * kernel thread. 248 */ 249 static void 250 atabusconfig_thread(void *arg) 251 { 252 struct atabus_softc *atabus_sc = arg; 253 struct ata_channel *chp = atabus_sc->sc_chan; 254 struct atac_softc *atac = chp->ch_atac; 255 int i, s; 256 struct atabus_initq *atabus_initq = NULL; 257 258 simple_lock(&atabus_interlock); 259 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 260 simple_unlock(&atabus_interlock); 261 KASSERT(atabus_initq->atabus_sc == atabus_sc); 262 /* 263 * Attach an ATAPI bus, if needed. 264 */ 265 for (i = 0; i < chp->ch_ndrive; i++) { 266 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 267 #if NATAPIBUS > 0 268 (*atac->atac_atapibus_attach)(atabus_sc); 269 #else 270 /* 271 * Fake the autoconfig "not configured" message 272 */ 273 aprint_normal("atapibus at %s not configured\n", 274 device_xname(atac->atac_dev)); 275 chp->atapibus = NULL; 276 s = splbio(); 277 for (i = 0; i < chp->ch_ndrive; i++) 278 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 279 splx(s); 280 #endif 281 break; 282 } 283 } 284 285 for (i = 0; i < chp->ch_ndrive; i++) { 286 struct ata_device adev; 287 if ((chp->ch_drive[i].drive_flags & 288 (DRIVE_ATA | DRIVE_OLD)) == 0) { 289 continue; 290 } 291 memset(&adev, 0, sizeof(struct ata_device)); 292 adev.adev_bustype = atac->atac_bustype_ata; 293 adev.adev_channel = chp->ch_channel; 294 adev.adev_openings = 1; 295 adev.adev_drv_data = &chp->ch_drive[i]; 296 chp->ata_drives[i] = config_found_ia(atabus_sc->sc_dev, 297 "ata_hl", &adev, ataprint); 298 if (chp->ata_drives[i] != NULL) 299 ata_probe_caps(&chp->ch_drive[i]); 300 else { 301 s = splbio(); 302 chp->ch_drive[i].drive_flags &= 303 ~(DRIVE_ATA | DRIVE_OLD); 304 splx(s); 305 } 306 } 307 308 /* now that we know the drives, the controller can set its modes */ 309 if (atac->atac_set_modes) { 310 (*atac->atac_set_modes)(chp); 311 ata_print_modes(chp); 312 } 313 #if NATARAID > 0 314 if (atac->atac_cap & ATAC_CAP_RAID) 315 for (i = 0; i < chp->ch_ndrive; i++) 316 if (chp->ata_drives[i] != NULL) 317 ata_raid_check_component(chp->ata_drives[i]); 318 #endif /* NATARAID > 0 */ 319 320 /* 321 * reset drive_flags for unattached devices, reset state for attached 322 * ones 323 */ 324 s = splbio(); 325 for (i = 0; i < chp->ch_ndrive; i++) { 326 if (chp->ch_drive[i].drv_softc == NULL) 327 chp->ch_drive[i].drive_flags = 0; 328 else 329 chp->ch_drive[i].state = 0; 330 } 331 splx(s); 332 333 simple_lock(&atabus_interlock); 334 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 335 simple_unlock(&atabus_interlock); 336 337 free(atabus_initq, M_DEVBUF); 338 wakeup(&atabus_initq_head); 339 340 ata_delref(chp); 341 342 config_pending_decr(); 343 kthread_exit(0); 344 } 345 346 /* 347 * atabus_thread: 348 * 349 * Worker thread for the ATA bus. 350 */ 351 static void 352 atabus_thread(void *arg) 353 { 354 struct atabus_softc *sc = arg; 355 struct ata_channel *chp = sc->sc_chan; 356 struct ata_xfer *xfer; 357 int i, s; 358 359 s = splbio(); 360 chp->ch_flags |= ATACH_TH_RUN; 361 362 /* 363 * Probe the drives. Reset all flags to 0 to indicate to controllers 364 * that can re-probe that all drives must be probed.. 365 * 366 * Note: ch_ndrive may be changed during the probe. 367 */ 368 for (i = 0; i < ATA_MAXDRIVES; i++) 369 chp->ch_drive[i].drive_flags = 0; 370 splx(s); 371 372 atabusconfig(sc); 373 374 s = splbio(); 375 for (;;) { 376 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 377 (chp->ch_queue->active_xfer == NULL || 378 chp->ch_queue->queue_freeze == 0)) { 379 chp->ch_flags &= ~ATACH_TH_RUN; 380 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 381 chp->ch_flags |= ATACH_TH_RUN; 382 } 383 if (chp->ch_flags & ATACH_SHUTDOWN) { 384 break; 385 } 386 if (chp->ch_flags & ATACH_TH_RESET) { 387 /* 388 * ata_reset_channel() will freeze 2 times, so 389 * unfreeze one time. Not a problem as we're at splbio 390 */ 391 chp->ch_queue->queue_freeze--; 392 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 393 } else if (chp->ch_queue->active_xfer != NULL && 394 chp->ch_queue->queue_freeze == 1) { 395 /* 396 * Caller has bumped queue_freeze, decrease it. 397 */ 398 chp->ch_queue->queue_freeze--; 399 xfer = chp->ch_queue->active_xfer; 400 KASSERT(xfer != NULL); 401 (*xfer->c_start)(xfer->c_chp, xfer); 402 } else if (chp->ch_queue->queue_freeze > 1) 403 panic("ata_thread: queue_freeze"); 404 } 405 splx(s); 406 chp->ch_thread = NULL; 407 wakeup(&chp->ch_flags); 408 kthread_exit(0); 409 } 410 411 /* 412 * atabus_match: 413 * 414 * Autoconfiguration match routine. 415 */ 416 static int 417 atabus_match(device_t parent, struct cfdata *cf, void *aux) 418 { 419 struct ata_channel *chp = aux; 420 421 if (chp == NULL) 422 return (0); 423 424 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 425 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 426 return (0); 427 428 return (1); 429 } 430 431 /* 432 * atabus_attach: 433 * 434 * Autoconfiguration attach routine. 435 */ 436 static void 437 atabus_attach(device_t parent, device_t self, void *aux) 438 { 439 struct atabus_softc *sc = device_private(self); 440 struct ata_channel *chp = aux; 441 struct atabus_initq *initq; 442 int error; 443 444 sc->sc_chan = chp; 445 446 aprint_normal("\n"); 447 aprint_naive("\n"); 448 449 sc->sc_dev = self; 450 451 if (ata_addref(chp)) 452 return; 453 454 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 455 initq->atabus_sc = sc; 456 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 457 config_pending_incr(); 458 459 if ((error = kthread_create(PRI_NONE, 0, NULL, atabus_thread, sc, 460 &chp->ch_thread, "%s", device_xname(self))) != 0) 461 aprint_error_dev(self, 462 "unable to create kernel thread: error %d\n", error); 463 464 if (!pmf_device_register(self, atabus_suspend, atabus_resume)) 465 aprint_error_dev(self, "couldn't establish power handler\n"); 466 } 467 468 /* 469 * atabus_activate: 470 * 471 * Autoconfiguration activation routine. 472 */ 473 static int 474 atabus_activate(device_t self, enum devact act) 475 { 476 struct atabus_softc *sc = device_private(self); 477 struct ata_channel *chp = sc->sc_chan; 478 device_t dev = NULL; 479 int s, i, error = 0; 480 481 s = splbio(); 482 switch (act) { 483 case DVACT_ACTIVATE: 484 error = EOPNOTSUPP; 485 break; 486 487 case DVACT_DEACTIVATE: 488 /* 489 * We might deactivate the children of atapibus twice 490 * (once bia atapibus, once directly), but since the 491 * generic autoconfiguration code maintains the DVF_ACTIVE 492 * flag, it's safe. 493 */ 494 if ((dev = chp->atapibus) != NULL) { 495 error = config_deactivate(dev); 496 if (error) 497 goto out; 498 } 499 500 for (i = 0; i < chp->ch_ndrive; i++) { 501 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 502 continue; 503 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 504 ATADEBUG_PRINT(("atabus_activate: %s: " 505 "deactivating %s\n", device_xname(self), 506 device_xname(dev)), 507 DEBUG_DETACH); 508 error = config_deactivate(dev); 509 if (error) 510 goto out; 511 } 512 } 513 break; 514 } 515 out: 516 splx(s); 517 518 #ifdef ATADEBUG 519 if (dev != NULL && error != 0) 520 ATADEBUG_PRINT(("atabus_activate: %s: " 521 "error %d deactivating %s\n", device_xname(self), 522 error, device_xname(dev)), DEBUG_DETACH); 523 #endif /* ATADEBUG */ 524 525 return (error); 526 } 527 528 /* 529 * atabus_detach: 530 * 531 * Autoconfiguration detach routine. 532 */ 533 static int 534 atabus_detach(device_t self, int flags) 535 { 536 struct atabus_softc *sc = device_private(self); 537 struct ata_channel *chp = sc->sc_chan; 538 device_t dev = NULL; 539 int s, i, error = 0; 540 541 /* Shutdown the channel. */ 542 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 543 chp->ch_flags |= ATACH_SHUTDOWN; 544 splx(s); 545 546 wakeup(&chp->ch_thread); 547 548 while (chp->ch_thread != NULL) 549 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 550 551 552 /* 553 * Detach atapibus and its children. 554 */ 555 if ((dev = chp->atapibus) != NULL) { 556 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 557 device_xname(self), device_xname(dev)), DEBUG_DETACH); 558 559 error = config_detach(dev, flags); 560 if (error) 561 goto out; 562 KASSERT(chp->atapibus == NULL); 563 } 564 565 /* 566 * Detach our other children. 567 */ 568 for (i = 0; i < chp->ch_ndrive; i++) { 569 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 570 continue; 571 if ((dev = chp->ata_drives[i]) != NULL) { 572 ATADEBUG_PRINT(("%s.%d: %s: detaching %s\n", __func__, 573 __LINE__, device_xname(self), device_xname(dev)), 574 DEBUG_DETACH); 575 KASSERT(chp->ch_drive[i].drv_softc == 576 chp->ata_drives[i]); 577 error = config_detach(dev, flags); 578 if (error) 579 goto out; 580 KASSERT(chp->ata_drives[i] == NULL); 581 } 582 } 583 584 out: 585 #ifdef ATADEBUG 586 if (dev != NULL && error != 0) 587 ATADEBUG_PRINT(("%s: %s: error %d detaching %s\n", __func__, 588 device_xname(self), error, device_xname(dev)), 589 DEBUG_DETACH); 590 #endif /* ATADEBUG */ 591 592 return (error); 593 } 594 595 void 596 atabus_childdetached(device_t self, device_t child) 597 { 598 bool found = false; 599 struct atabus_softc *sc = device_private(self); 600 struct ata_channel *chp = sc->sc_chan; 601 int i; 602 603 /* 604 * atapibus detached. 605 */ 606 if (child == chp->atapibus) { 607 chp->atapibus = NULL; 608 found = true; 609 } 610 611 /* 612 * Detach our other children. 613 */ 614 for (i = 0; i < chp->ch_ndrive; i++) { 615 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 616 continue; 617 if (child == chp->ata_drives[i]) { 618 KASSERT(chp->ata_drives[i] == 619 chp->ch_drive[i].drv_softc); 620 chp->ata_drives[i] = NULL; 621 chp->ch_drive[i].drv_softc = NULL; 622 chp->ch_drive[i].drive_flags = 0; 623 found = true; 624 } 625 } 626 627 if (!found) 628 panic("%s: unknown child %p", device_xname(self), 629 (const void *)child); 630 } 631 632 CFATTACH_DECL3_NEW(atabus, sizeof(struct atabus_softc), 633 atabus_match, atabus_attach, atabus_detach, atabus_activate, NULL, 634 atabus_childdetached, DVF_DETACH_SHUTDOWN); 635 636 /***************************************************************************** 637 * Common ATA bus operations. 638 *****************************************************************************/ 639 640 /* Get the disk's parameters */ 641 int 642 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 643 struct ataparams *prms) 644 { 645 struct ata_command ata_c; 646 struct ata_channel *chp = drvp->chnl_softc; 647 struct atac_softc *atac = chp->ch_atac; 648 char *tb; 649 int i, rv; 650 u_int16_t *p; 651 652 ATADEBUG_PRINT(("%s\n", __func__), DEBUG_FUNCS); 653 654 tb = kmem_zalloc(DEV_BSIZE, KM_SLEEP); 655 memset(prms, 0, sizeof(struct ataparams)); 656 memset(&ata_c, 0, sizeof(struct ata_command)); 657 658 if (drvp->drive_flags & DRIVE_ATA) { 659 ata_c.r_command = WDCC_IDENTIFY; 660 ata_c.r_st_bmask = WDCS_DRDY; 661 ata_c.r_st_pmask = WDCS_DRQ; 662 ata_c.timeout = 3000; /* 3s */ 663 } else if (drvp->drive_flags & DRIVE_ATAPI) { 664 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 665 ata_c.r_st_bmask = 0; 666 ata_c.r_st_pmask = WDCS_DRQ; 667 ata_c.timeout = 10000; /* 10s */ 668 } else { 669 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 670 DEBUG_FUNCS|DEBUG_PROBE); 671 rv = CMD_ERR; 672 goto out; 673 } 674 ata_c.flags = AT_READ | flags; 675 ata_c.data = tb; 676 ata_c.bcount = DEV_BSIZE; 677 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 678 &ata_c) != ATACMD_COMPLETE) { 679 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 680 DEBUG_FUNCS|DEBUG_PROBE); 681 rv = CMD_AGAIN; 682 goto out; 683 } 684 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 685 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 686 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 687 rv = CMD_ERR; 688 goto out; 689 } 690 /* if we didn't read any data something is wrong */ 691 if ((ata_c.flags & AT_XFDONE) == 0) { 692 rv = CMD_ERR; 693 goto out; 694 } 695 696 /* Read in parameter block. */ 697 memcpy(prms, tb, sizeof(struct ataparams)); 698 699 /* 700 * Shuffle string byte order. 701 * ATAPI NEC, Mitsumi and Pioneer drives and 702 * old ATA TDK CompactFlash cards 703 * have different byte order. 704 */ 705 #if BYTE_ORDER == BIG_ENDIAN 706 # define M(n) prms->atap_model[(n) ^ 1] 707 #else 708 # define M(n) prms->atap_model[n] 709 #endif 710 if ( 711 #if BYTE_ORDER == BIG_ENDIAN 712 ! 713 #endif 714 ((drvp->drive_flags & DRIVE_ATAPI) ? 715 ((M(0) == 'N' && M(1) == 'E') || 716 (M(0) == 'F' && M(1) == 'X') || 717 (M(0) == 'P' && M(1) == 'i')) : 718 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) { 719 rv = CMD_OK; 720 goto out; 721 } 722 #undef M 723 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 724 p = (u_int16_t *)(prms->atap_model + i); 725 *p = bswap16(*p); 726 } 727 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 728 p = (u_int16_t *)(prms->atap_serial + i); 729 *p = bswap16(*p); 730 } 731 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 732 p = (u_int16_t *)(prms->atap_revision + i); 733 *p = bswap16(*p); 734 } 735 736 rv = CMD_OK; 737 out: 738 kmem_free(tb, DEV_BSIZE); 739 return rv; 740 } 741 742 int 743 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 744 { 745 struct ata_command ata_c; 746 struct ata_channel *chp = drvp->chnl_softc; 747 struct atac_softc *atac = chp->ch_atac; 748 749 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 750 memset(&ata_c, 0, sizeof(struct ata_command)); 751 752 ata_c.r_command = SET_FEATURES; 753 ata_c.r_st_bmask = 0; 754 ata_c.r_st_pmask = 0; 755 ata_c.r_features = WDSF_SET_MODE; 756 ata_c.r_count = mode; 757 ata_c.flags = flags; 758 ata_c.timeout = 1000; /* 1s */ 759 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 760 &ata_c) != ATACMD_COMPLETE) 761 return CMD_AGAIN; 762 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 763 return CMD_ERR; 764 } 765 return CMD_OK; 766 } 767 768 #if NATA_DMA 769 void 770 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 771 { 772 /* 773 * Downgrade decision: if we get NERRS_MAX in NXFER. 774 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 775 * first error within the first NXFER ops will immediatly trigger 776 * a downgrade. 777 * If we got an error and n_xfers is bigger than NXFER reset counters. 778 */ 779 drvp->n_dmaerrs++; 780 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 781 ata_downgrade_mode(drvp, flags); 782 drvp->n_dmaerrs = NERRS_MAX-1; 783 drvp->n_xfers = 0; 784 return; 785 } 786 if (drvp->n_xfers > NXFER) { 787 drvp->n_dmaerrs = 1; /* just got an error */ 788 drvp->n_xfers = 1; /* restart counting from this error */ 789 } 790 } 791 #endif /* NATA_DMA */ 792 793 /* 794 * freeze the queue and wait for the controller to be idle. Caller has to 795 * unfreeze/restart the queue 796 */ 797 void 798 ata_queue_idle(struct ata_queue *queue) 799 { 800 int s = splbio(); 801 queue->queue_freeze++; 802 while (queue->active_xfer != NULL) { 803 queue->queue_flags |= QF_IDLE_WAIT; 804 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 805 } 806 splx(s); 807 } 808 809 /* 810 * Add a command to the queue and start controller. 811 * 812 * MUST BE CALLED AT splbio()! 813 */ 814 void 815 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 816 { 817 818 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 819 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 820 821 /* complete xfer setup */ 822 xfer->c_chp = chp; 823 824 /* insert at the end of command list */ 825 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 826 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 827 chp->ch_flags), DEBUG_XFERS); 828 /* 829 * if polling and can sleep, wait for the xfer to be at head of queue 830 */ 831 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 832 while (chp->ch_queue->active_xfer != NULL || 833 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 834 xfer->c_flags |= C_WAITACT; 835 tsleep(xfer, PRIBIO, "ataact", 0); 836 xfer->c_flags &= ~C_WAITACT; 837 if (xfer->c_flags & C_FREE) { 838 ata_free_xfer(chp, xfer); 839 return; 840 } 841 } 842 } 843 atastart(chp); 844 } 845 846 /* 847 * Start I/O on a controller, for the given channel. 848 * The first xfer may be not for our channel if the channel queues 849 * are shared. 850 * 851 * MUST BE CALLED AT splbio()! 852 */ 853 void 854 atastart(struct ata_channel *chp) 855 { 856 struct atac_softc *atac = chp->ch_atac; 857 struct ata_xfer *xfer; 858 859 #ifdef ATA_DEBUG 860 int spl1, spl2; 861 862 spl1 = splbio(); 863 spl2 = splbio(); 864 if (spl2 != spl1) { 865 printf("atastart: not at splbio()\n"); 866 panic("atastart"); 867 } 868 splx(spl2); 869 splx(spl1); 870 #endif /* ATA_DEBUG */ 871 872 /* is there a xfer ? */ 873 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 874 return; 875 876 /* adjust chp, in case we have a shared queue */ 877 chp = xfer->c_chp; 878 879 if (chp->ch_queue->active_xfer != NULL) { 880 return; /* channel aleady active */ 881 } 882 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 883 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 884 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 885 wakeup(&chp->ch_queue->queue_flags); 886 } 887 return; /* queue frozen */ 888 } 889 /* 890 * if someone is waiting for the command to be active, wake it up 891 * and let it process the command 892 */ 893 if (xfer->c_flags & C_WAITACT) { 894 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 895 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 896 DEBUG_XFERS); 897 wakeup(xfer); 898 return; 899 } 900 #ifdef DIAGNOSTIC 901 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 902 panic("atastart: channel waiting for irq"); 903 #endif 904 if (atac->atac_claim_hw) 905 if (!(*atac->atac_claim_hw)(chp, 0)) 906 return; 907 908 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 909 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 910 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 911 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 912 chp->ch_drive[xfer->c_drive].state = 0; 913 } 914 chp->ch_queue->active_xfer = xfer; 915 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 916 917 if (atac->atac_cap & ATAC_CAP_NOIRQ) 918 KASSERT(xfer->c_flags & C_POLL); 919 920 xfer->c_start(chp, xfer); 921 } 922 923 struct ata_xfer * 924 ata_get_xfer(int flags) 925 { 926 struct ata_xfer *xfer; 927 int s; 928 929 s = splbio(); 930 xfer = pool_get(&ata_xfer_pool, 931 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 932 splx(s); 933 if (xfer != NULL) { 934 memset(xfer, 0, sizeof(struct ata_xfer)); 935 } 936 return xfer; 937 } 938 939 void 940 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 941 { 942 struct atac_softc *atac = chp->ch_atac; 943 int s; 944 945 if (xfer->c_flags & C_WAITACT) { 946 /* Someone is waiting for this xfer, so we can't free now */ 947 xfer->c_flags |= C_FREE; 948 wakeup(xfer); 949 return; 950 } 951 952 #if NATA_PIOBM /* XXX wdc dependent code */ 953 if (xfer->c_flags & C_PIOBM) { 954 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 955 956 /* finish the busmastering PIO */ 957 (*wdc->piobm_done)(wdc->dma_arg, 958 chp->ch_channel, xfer->c_drive); 959 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 960 } 961 #endif 962 963 if (atac->atac_free_hw) 964 (*atac->atac_free_hw)(chp); 965 s = splbio(); 966 pool_put(&ata_xfer_pool, xfer); 967 splx(s); 968 } 969 970 /* 971 * Kill off all pending xfers for a ata_channel. 972 * 973 * Must be called at splbio(). 974 */ 975 void 976 ata_kill_pending(struct ata_drive_datas *drvp) 977 { 978 struct ata_channel *chp = drvp->chnl_softc; 979 struct ata_xfer *xfer, *next_xfer; 980 int s = splbio(); 981 982 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 983 xfer != NULL; xfer = next_xfer) { 984 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 985 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 986 continue; 987 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 988 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 989 } 990 991 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 992 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 993 drvp->drive_flags |= DRIVE_WAITDRAIN; 994 (void) tsleep(&chp->ch_queue->active_xfer, 995 PRIBIO, "atdrn", 0); 996 } else { 997 /* no more xfer for us */ 998 break; 999 } 1000 } 1001 splx(s); 1002 } 1003 1004 /* 1005 * ata_reset_channel: 1006 * 1007 * Reset and ATA channel. 1008 * 1009 * MUST BE CALLED AT splbio()! 1010 */ 1011 void 1012 ata_reset_channel(struct ata_channel *chp, int flags) 1013 { 1014 struct atac_softc *atac = chp->ch_atac; 1015 int drive; 1016 1017 #ifdef ATA_DEBUG 1018 int spl1, spl2; 1019 1020 spl1 = splbio(); 1021 spl2 = splbio(); 1022 if (spl2 != spl1) { 1023 printf("ata_reset_channel: not at splbio()\n"); 1024 panic("ata_reset_channel"); 1025 } 1026 splx(spl2); 1027 splx(spl1); 1028 #endif /* ATA_DEBUG */ 1029 1030 chp->ch_queue->queue_freeze++; 1031 1032 /* 1033 * If we can poll or wait it's OK, otherwise wake up the 1034 * kernel thread to do it for us. 1035 */ 1036 ATADEBUG_PRINT(("ata_reset_channel flags 0x%x ch_flags 0x%x\n", 1037 flags, chp->ch_flags), DEBUG_FUNCS | DEBUG_XFERS); 1038 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 1039 if (chp->ch_flags & ATACH_TH_RESET) { 1040 /* No need to schedule a reset more than one time. */ 1041 chp->ch_queue->queue_freeze--; 1042 return; 1043 } 1044 chp->ch_flags |= ATACH_TH_RESET; 1045 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 1046 wakeup(&chp->ch_thread); 1047 return; 1048 } 1049 1050 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 1051 1052 for (drive = 0; drive < chp->ch_ndrive; drive++) 1053 chp->ch_drive[drive].state = 0; 1054 1055 chp->ch_flags &= ~ATACH_TH_RESET; 1056 if ((flags & AT_RST_EMERG) == 0) { 1057 chp->ch_queue->queue_freeze--; 1058 atastart(chp); 1059 } else { 1060 /* make sure that we can use polled commands */ 1061 TAILQ_INIT(&chp->ch_queue->queue_xfer); 1062 chp->ch_queue->queue_freeze = 0; 1063 chp->ch_queue->active_xfer = NULL; 1064 } 1065 } 1066 1067 int 1068 ata_addref(struct ata_channel *chp) 1069 { 1070 struct atac_softc *atac = chp->ch_atac; 1071 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1072 int s, error = 0; 1073 1074 s = splbio(); 1075 if (adapt->adapt_refcnt++ == 0 && 1076 adapt->adapt_enable != NULL) { 1077 error = (*adapt->adapt_enable)(atac->atac_dev, 1); 1078 if (error) 1079 adapt->adapt_refcnt--; 1080 } 1081 splx(s); 1082 return (error); 1083 } 1084 1085 void 1086 ata_delref(struct ata_channel *chp) 1087 { 1088 struct atac_softc *atac = chp->ch_atac; 1089 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1090 int s; 1091 1092 s = splbio(); 1093 if (adapt->adapt_refcnt-- == 1 && 1094 adapt->adapt_enable != NULL) 1095 (void) (*adapt->adapt_enable)(atac->atac_dev, 0); 1096 splx(s); 1097 } 1098 1099 void 1100 ata_print_modes(struct ata_channel *chp) 1101 { 1102 struct atac_softc *atac = chp->ch_atac; 1103 int drive; 1104 struct ata_drive_datas *drvp; 1105 1106 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1107 drvp = &chp->ch_drive[drive]; 1108 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1109 continue; 1110 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1111 device_xname(drvp->drv_softc), 1112 device_xname(atac->atac_dev), 1113 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1114 #if NATA_DMA 1115 if (drvp->drive_flags & DRIVE_DMA) 1116 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1117 #if NATA_UDMA 1118 if (drvp->drive_flags & DRIVE_UDMA) { 1119 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1120 if (drvp->UDMA_mode == 2) 1121 aprint_verbose(" (Ultra/33)"); 1122 else if (drvp->UDMA_mode == 4) 1123 aprint_verbose(" (Ultra/66)"); 1124 else if (drvp->UDMA_mode == 5) 1125 aprint_verbose(" (Ultra/100)"); 1126 else if (drvp->UDMA_mode == 6) 1127 aprint_verbose(" (Ultra/133)"); 1128 } 1129 #endif /* NATA_UDMA */ 1130 #endif /* NATA_DMA */ 1131 #if NATA_DMA || NATA_PIOBM 1132 if (0 1133 #if NATA_DMA 1134 || (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1135 #endif 1136 #if NATA_PIOBM 1137 /* PIOBM capable controllers use DMA for PIO commands */ 1138 || (atac->atac_cap & ATAC_CAP_PIOBM) 1139 #endif 1140 ) 1141 aprint_verbose(" (using DMA)"); 1142 #endif /* NATA_DMA || NATA_PIOBM */ 1143 aprint_verbose("\n"); 1144 } 1145 } 1146 1147 #if NATA_DMA 1148 /* 1149 * downgrade the transfer mode of a drive after an error. return 1 if 1150 * downgrade was possible, 0 otherwise. 1151 * 1152 * MUST BE CALLED AT splbio()! 1153 */ 1154 int 1155 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1156 { 1157 struct ata_channel *chp = drvp->chnl_softc; 1158 struct atac_softc *atac = chp->ch_atac; 1159 device_t drv_dev = drvp->drv_softc; 1160 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1161 1162 /* if drive or controller don't know its mode, we can't do much */ 1163 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1164 (atac->atac_set_modes == NULL)) 1165 return 0; 1166 /* current drive mode was set by a config flag, let it this way */ 1167 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1168 (cf_flags & ATA_CONFIG_DMA_SET) || 1169 (cf_flags & ATA_CONFIG_UDMA_SET)) 1170 return 0; 1171 1172 #if NATA_UDMA 1173 /* 1174 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1175 */ 1176 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1177 drvp->UDMA_mode--; 1178 aprint_error_dev(drv_dev, 1179 "transfer error, downgrading to Ultra-DMA mode %d\n", 1180 drvp->UDMA_mode); 1181 } 1182 #endif 1183 1184 /* 1185 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1186 */ 1187 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1188 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1189 drvp->PIO_mode = drvp->PIO_cap; 1190 aprint_error_dev(drv_dev, 1191 "transfer error, downgrading to PIO mode %d\n", 1192 drvp->PIO_mode); 1193 } else /* already using PIO, can't downgrade */ 1194 return 0; 1195 1196 (*atac->atac_set_modes)(chp); 1197 ata_print_modes(chp); 1198 /* reset the channel, which will schedule all drives for setup */ 1199 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1200 return 1; 1201 } 1202 #endif /* NATA_DMA */ 1203 1204 /* 1205 * Probe drive's capabilities, for use by the controller later 1206 * Assumes drvp points to an existing drive. 1207 */ 1208 void 1209 ata_probe_caps(struct ata_drive_datas *drvp) 1210 { 1211 struct ataparams params, params2; 1212 struct ata_channel *chp = drvp->chnl_softc; 1213 struct atac_softc *atac = chp->ch_atac; 1214 device_t drv_dev = drvp->drv_softc; 1215 int i, printed, s; 1216 const char *sep = ""; 1217 int cf_flags; 1218 1219 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1220 /* IDENTIFY failed. Can't tell more about the device */ 1221 return; 1222 } 1223 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1224 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1225 /* 1226 * Controller claims 16 and 32 bit transfers. 1227 * Re-do an IDENTIFY with 32-bit transfers, 1228 * and compare results. 1229 */ 1230 s = splbio(); 1231 drvp->drive_flags |= DRIVE_CAP32; 1232 splx(s); 1233 ata_get_params(drvp, AT_WAIT, ¶ms2); 1234 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1235 /* Not good. fall back to 16bits */ 1236 s = splbio(); 1237 drvp->drive_flags &= ~DRIVE_CAP32; 1238 splx(s); 1239 } else { 1240 aprint_verbose_dev(drv_dev, "32-bit data port\n"); 1241 } 1242 } 1243 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1244 if (params.atap_ata_major > 0x01 && 1245 params.atap_ata_major != 0xffff) { 1246 for (i = 14; i > 0; i--) { 1247 if (params.atap_ata_major & (1 << i)) { 1248 aprint_verbose_dev(drv_dev, 1249 "ATA version %d\n", i); 1250 drvp->ata_vers = i; 1251 break; 1252 } 1253 } 1254 } 1255 #endif 1256 1257 /* An ATAPI device is at last PIO mode 3 */ 1258 if (drvp->drive_flags & DRIVE_ATAPI) 1259 drvp->PIO_mode = 3; 1260 1261 /* 1262 * It's not in the specs, but it seems that some drive 1263 * returns 0xffff in atap_extensions when this field is invalid 1264 */ 1265 if (params.atap_extensions != 0xffff && 1266 (params.atap_extensions & WDC_EXT_MODES)) { 1267 printed = 0; 1268 /* 1269 * XXX some drives report something wrong here (they claim to 1270 * support PIO mode 8 !). As mode is coded on 3 bits in 1271 * SET FEATURE, limit it to 7 (so limit i to 4). 1272 * If higher mode than 7 is found, abort. 1273 */ 1274 for (i = 7; i >= 0; i--) { 1275 if ((params.atap_piomode_supp & (1 << i)) == 0) 1276 continue; 1277 if (i > 4) 1278 return; 1279 /* 1280 * See if mode is accepted. 1281 * If the controller can't set its PIO mode, 1282 * assume the defaults are good, so don't try 1283 * to set it 1284 */ 1285 if (atac->atac_set_modes) 1286 /* 1287 * It's OK to pool here, it's fast enouth 1288 * to not bother waiting for interrupt 1289 */ 1290 if (ata_set_mode(drvp, 0x08 | (i + 3), 1291 AT_WAIT) != CMD_OK) 1292 continue; 1293 if (!printed) { 1294 aprint_verbose_dev(drv_dev, 1295 "drive supports PIO mode %d", i + 3); 1296 sep = ","; 1297 printed = 1; 1298 } 1299 /* 1300 * If controller's driver can't set its PIO mode, 1301 * get the highter one for the drive. 1302 */ 1303 if (atac->atac_set_modes == NULL || 1304 atac->atac_pio_cap >= i + 3) { 1305 drvp->PIO_mode = i + 3; 1306 drvp->PIO_cap = i + 3; 1307 break; 1308 } 1309 } 1310 if (!printed) { 1311 /* 1312 * We didn't find a valid PIO mode. 1313 * Assume the values returned for DMA are buggy too 1314 */ 1315 return; 1316 } 1317 s = splbio(); 1318 drvp->drive_flags |= DRIVE_MODE; 1319 splx(s); 1320 printed = 0; 1321 for (i = 7; i >= 0; i--) { 1322 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1323 continue; 1324 #if NATA_DMA 1325 if ((atac->atac_cap & ATAC_CAP_DMA) && 1326 atac->atac_set_modes != NULL) 1327 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1328 != CMD_OK) 1329 continue; 1330 #endif 1331 if (!printed) { 1332 aprint_verbose("%s DMA mode %d", sep, i); 1333 sep = ","; 1334 printed = 1; 1335 } 1336 #if NATA_DMA 1337 if (atac->atac_cap & ATAC_CAP_DMA) { 1338 if (atac->atac_set_modes != NULL && 1339 atac->atac_dma_cap < i) 1340 continue; 1341 drvp->DMA_mode = i; 1342 drvp->DMA_cap = i; 1343 s = splbio(); 1344 drvp->drive_flags |= DRIVE_DMA; 1345 splx(s); 1346 } 1347 #endif 1348 break; 1349 } 1350 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1351 printed = 0; 1352 for (i = 7; i >= 0; i--) { 1353 if ((params.atap_udmamode_supp & (1 << i)) 1354 == 0) 1355 continue; 1356 #if NATA_UDMA 1357 if (atac->atac_set_modes != NULL && 1358 (atac->atac_cap & ATAC_CAP_UDMA)) 1359 if (ata_set_mode(drvp, 0x40 | i, 1360 AT_WAIT) != CMD_OK) 1361 continue; 1362 #endif 1363 if (!printed) { 1364 aprint_verbose("%s Ultra-DMA mode %d", 1365 sep, i); 1366 if (i == 2) 1367 aprint_verbose(" (Ultra/33)"); 1368 else if (i == 4) 1369 aprint_verbose(" (Ultra/66)"); 1370 else if (i == 5) 1371 aprint_verbose(" (Ultra/100)"); 1372 else if (i == 6) 1373 aprint_verbose(" (Ultra/133)"); 1374 sep = ","; 1375 printed = 1; 1376 } 1377 #if NATA_UDMA 1378 if (atac->atac_cap & ATAC_CAP_UDMA) { 1379 if (atac->atac_set_modes != NULL && 1380 atac->atac_udma_cap < i) 1381 continue; 1382 drvp->UDMA_mode = i; 1383 drvp->UDMA_cap = i; 1384 s = splbio(); 1385 drvp->drive_flags |= DRIVE_UDMA; 1386 splx(s); 1387 } 1388 #endif 1389 break; 1390 } 1391 } 1392 aprint_verbose("\n"); 1393 } 1394 1395 s = splbio(); 1396 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1397 if (drvp->drive_flags & DRIVE_ATAPI) { 1398 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1399 drvp->drive_flags |= DRIVE_NOSTREAM; 1400 } else { 1401 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1402 drvp->drive_flags |= DRIVE_NOSTREAM; 1403 } 1404 splx(s); 1405 1406 /* Try to guess ATA version here, if it didn't get reported */ 1407 if (drvp->ata_vers == 0) { 1408 #if NATA_UDMA 1409 if (drvp->drive_flags & DRIVE_UDMA) 1410 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1411 else 1412 #endif 1413 if (drvp->PIO_cap > 2) 1414 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1415 } 1416 cf_flags = device_cfdata(drv_dev)->cf_flags; 1417 if (cf_flags & ATA_CONFIG_PIO_SET) { 1418 s = splbio(); 1419 drvp->PIO_mode = 1420 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1421 drvp->drive_flags |= DRIVE_MODE; 1422 splx(s); 1423 } 1424 #if NATA_DMA 1425 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1426 /* don't care about DMA modes */ 1427 return; 1428 } 1429 if (cf_flags & ATA_CONFIG_DMA_SET) { 1430 s = splbio(); 1431 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1432 ATA_CONFIG_DMA_DISABLE) { 1433 drvp->drive_flags &= ~DRIVE_DMA; 1434 } else { 1435 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1436 ATA_CONFIG_DMA_OFF; 1437 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1438 } 1439 splx(s); 1440 } 1441 #if NATA_UDMA 1442 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1443 /* don't care about UDMA modes */ 1444 return; 1445 } 1446 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1447 s = splbio(); 1448 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1449 ATA_CONFIG_UDMA_DISABLE) { 1450 drvp->drive_flags &= ~DRIVE_UDMA; 1451 } else { 1452 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1453 ATA_CONFIG_UDMA_OFF; 1454 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1455 } 1456 splx(s); 1457 } 1458 #endif /* NATA_UDMA */ 1459 #endif /* NATA_DMA */ 1460 } 1461 1462 /* management of the /dev/atabus* devices */ 1463 int 1464 atabusopen(dev_t dev, int flag, int fmt, 1465 struct lwp *l) 1466 { 1467 struct atabus_softc *sc; 1468 int error; 1469 1470 sc = device_lookup_private(&atabus_cd, minor(dev)); 1471 if (sc == NULL) 1472 return (ENXIO); 1473 1474 if (sc->sc_flags & ATABUSCF_OPEN) 1475 return (EBUSY); 1476 1477 if ((error = ata_addref(sc->sc_chan)) != 0) 1478 return (error); 1479 1480 sc->sc_flags |= ATABUSCF_OPEN; 1481 1482 return (0); 1483 } 1484 1485 1486 int 1487 atabusclose(dev_t dev, int flag, int fmt, 1488 struct lwp *l) 1489 { 1490 struct atabus_softc *sc = 1491 device_lookup_private(&atabus_cd, minor(dev)); 1492 1493 ata_delref(sc->sc_chan); 1494 1495 sc->sc_flags &= ~ATABUSCF_OPEN; 1496 1497 return (0); 1498 } 1499 1500 int 1501 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, 1502 struct lwp *l) 1503 { 1504 struct atabus_softc *sc = 1505 device_lookup_private(&atabus_cd, minor(dev)); 1506 struct ata_channel *chp = sc->sc_chan; 1507 int min_drive, max_drive, drive; 1508 int error; 1509 int s; 1510 1511 /* 1512 * Enforce write permission for ioctls that change the 1513 * state of the bus. Host adapter specific ioctls must 1514 * be checked by the adapter driver. 1515 */ 1516 switch (cmd) { 1517 case ATABUSIOSCAN: 1518 case ATABUSIODETACH: 1519 case ATABUSIORESET: 1520 if ((flag & FWRITE) == 0) 1521 return (EBADF); 1522 } 1523 1524 switch (cmd) { 1525 case ATABUSIORESET: 1526 s = splbio(); 1527 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1528 splx(s); 1529 error = 0; 1530 break; 1531 case ATABUSIOSCAN: 1532 { 1533 #if 0 1534 struct atabusioscan_args *a= 1535 (struct atabusioscan_args *)addr; 1536 #endif 1537 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1538 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1539 return (EOPNOTSUPP); 1540 return (EOPNOTSUPP); 1541 } 1542 case ATABUSIODETACH: 1543 { 1544 struct atabusioscan_args *a= 1545 (struct atabusioscan_args *)addr; 1546 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1547 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1548 return (EOPNOTSUPP); 1549 switch (a->at_dev) { 1550 case -1: 1551 min_drive = 0; 1552 max_drive = 1; 1553 break; 1554 case 0: 1555 case 1: 1556 min_drive = max_drive = a->at_dev; 1557 break; 1558 default: 1559 return (EINVAL); 1560 } 1561 for (drive = min_drive; drive <= max_drive; drive++) { 1562 if (chp->ch_drive[drive].drv_softc != NULL) { 1563 error = config_detach( 1564 chp->ch_drive[drive].drv_softc, 0); 1565 if (error) 1566 return (error); 1567 KASSERT(chp->ch_drive[drive].drv_softc == NULL); 1568 } 1569 } 1570 error = 0; 1571 break; 1572 } 1573 default: 1574 error = ENOTTY; 1575 } 1576 return (error); 1577 }; 1578 1579 static bool 1580 atabus_suspend(device_t dv PMF_FN_ARGS) 1581 { 1582 struct atabus_softc *sc = device_private(dv); 1583 struct ata_channel *chp = sc->sc_chan; 1584 1585 ata_queue_idle(chp->ch_queue); 1586 1587 return true; 1588 } 1589 1590 static bool 1591 atabus_resume(device_t dv PMF_FN_ARGS) 1592 { 1593 struct atabus_softc *sc = device_private(dv); 1594 struct ata_channel *chp = sc->sc_chan; 1595 int s; 1596 1597 /* 1598 * XXX joerg: with wdc, the first channel unfreezes the controler. 1599 * Move this the reset and queue idling into wdc. 1600 */ 1601 s = splbio(); 1602 if (chp->ch_queue->queue_freeze == 0) { 1603 splx(s); 1604 return true; 1605 } 1606 KASSERT(chp->ch_queue->queue_freeze > 0); 1607 /* unfreeze the queue and reset drives */ 1608 chp->ch_queue->queue_freeze--; 1609 ata_reset_channel(chp, AT_WAIT); 1610 splx(s); 1611 1612 return true; 1613 } 1614
Indexes created Thu Sep 25 16:09:42 GMT 2025