ata.c revision 1.106
1 /* $NetBSD: ata.c,v 1.106 2009/05/12 12:10:29 cegger Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.106 2009/05/12 12:10:29 cegger Exp $"); 34 35 #include "opt_ata.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/conf.h> 43 #include <sys/fcntl.h> 44 #include <sys/proc.h> 45 #include <sys/pool.h> 46 #include <sys/kthread.h> 47 #include <sys/errno.h> 48 #include <sys/ataio.h> 49 #include <sys/kmem.h> 50 #include <sys/simplelock.h> 51 #include <sys/intr.h> 52 #include <sys/bus.h> 53 54 #include <dev/ata/ataconf.h> 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 #include <dev/ic/wdcvar.h> /* for PIOBM */ 58 59 #include "locators.h" 60 61 #include "atapibus.h" 62 #include "ataraid.h" 63 64 #if NATARAID > 0 65 #include <dev/ata/ata_raidvar.h> 66 #endif 67 68 #define DEBUG_FUNCS 0x08 69 #define DEBUG_PROBE 0x10 70 #define DEBUG_DETACH 0x20 71 #define DEBUG_XFERS 0x40 72 #ifdef ATADEBUG 73 int atadebug_mask = 0; 74 #define ATADEBUG_PRINT(args, level) \ 75 if (atadebug_mask & (level)) \ 76 printf args 77 #else 78 #define ATADEBUG_PRINT(args, level) 79 #endif 80 81 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL, 82 IPL_BIO); 83 84 /* 85 * A queue of atabus instances, used to ensure the same bus probe order 86 * for a given hardware configuration at each boot. 87 */ 88 struct atabus_initq_head atabus_initq_head = 89 TAILQ_HEAD_INITIALIZER(atabus_initq_head); 90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER; 91 92 /* kernel thread probing devices on a atabus. Only one probing at once */ 93 struct lwp *atabus_configlwp; 94 95 /***************************************************************************** 96 * ATA bus layer. 97 * 98 * ATA controllers attach an atabus instance, which handles probing the bus 99 * for drives, etc. 100 *****************************************************************************/ 101 102 dev_type_open(atabusopen); 103 dev_type_close(atabusclose); 104 dev_type_ioctl(atabusioctl); 105 106 const struct cdevsw atabus_cdevsw = { 107 atabusopen, atabusclose, noread, nowrite, atabusioctl, 108 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER 109 }; 110 111 extern struct cfdriver atabus_cd; 112 113 static void atabus_childdetached(device_t, device_t); 114 static bool atabus_resume(device_t PMF_FN_PROTO); 115 static bool atabus_suspend(device_t PMF_FN_PROTO); 116 static void atabusconfig_thread(void *); 117 118 /* 119 * atabusprint: 120 * 121 * Autoconfiguration print routine used by ATA controllers when 122 * attaching an atabus instance. 123 */ 124 int 125 atabusprint(void *aux, const char *pnp) 126 { 127 struct ata_channel *chan = aux; 128 129 if (pnp) 130 aprint_normal("atabus at %s", pnp); 131 aprint_normal(" channel %d", chan->ch_channel); 132 133 return (UNCONF); 134 } 135 136 /* 137 * ataprint: 138 * 139 * Autoconfiguration print routine. 140 */ 141 int 142 ataprint(void *aux, const char *pnp) 143 { 144 struct ata_device *adev = aux; 145 146 if (pnp) 147 aprint_normal("wd at %s", pnp); 148 aprint_normal(" drive %d", adev->adev_drv_data->drive); 149 150 return (UNCONF); 151 } 152 153 /* 154 * ata_channel_attach: 155 * 156 * Common parts of attaching an atabus to an ATA controller channel. 157 */ 158 void 159 ata_channel_attach(struct ata_channel *chp) 160 { 161 162 if (chp->ch_flags & ATACH_DISABLED) 163 return; 164 165 /* XXX callout_destroy */ 166 callout_init(&chp->ch_callout, 0); 167 168 TAILQ_INIT(&chp->ch_queue->queue_xfer); 169 chp->ch_queue->queue_freeze = 0; 170 chp->ch_queue->queue_flags = 0; 171 chp->ch_queue->active_xfer = NULL; 172 173 chp->atabus = config_found_ia(chp->ch_atac->atac_dev, "ata", chp, 174 atabusprint); 175 } 176 177 static void 178 atabusconfig(struct atabus_softc *atabus_sc) 179 { 180 struct ata_channel *chp = atabus_sc->sc_chan; 181 struct atac_softc *atac = chp->ch_atac; 182 struct atabus_initq *atabus_initq = NULL; 183 int i, s, error; 184 185 /* we are in the atabus's thread context */ 186 s = splbio(); 187 chp->ch_flags |= ATACH_TH_RUN; 188 splx(s); 189 190 /* Probe for the drives. */ 191 /* XXX for SATA devices we will power up all drives at once */ 192 (*atac->atac_probe)(chp); 193 194 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n", 195 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags), 196 DEBUG_PROBE); 197 198 /* next operations will occurs in a separate thread */ 199 s = splbio(); 200 chp->ch_flags &= ~ATACH_TH_RUN; 201 splx(s); 202 203 /* Make sure the devices probe in atabus order to avoid jitter. */ 204 simple_lock(&atabus_interlock); 205 while(1) { 206 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 207 if (atabus_initq->atabus_sc == atabus_sc) 208 break; 209 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0, 210 &atabus_interlock); 211 } 212 simple_unlock(&atabus_interlock); 213 214 /* If no drives, abort here */ 215 for (i = 0; i < chp->ch_ndrive; i++) 216 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0) 217 break; 218 if (i == chp->ch_ndrive) 219 goto out; 220 221 /* Shortcut in case we've been shutdown */ 222 if (chp->ch_flags & ATACH_SHUTDOWN) 223 goto out; 224 225 226 if ((error = kthread_create(PRI_NONE, 0, NULL, atabusconfig_thread, 227 atabus_sc, &atabus_configlwp, 228 "%scnf", device_xname(atac->atac_dev))) != 0) 229 aprint_error_dev(atac->atac_dev, 230 "unable to create config thread: error %d\n", error); 231 return; 232 233 out: 234 simple_lock(&atabus_interlock); 235 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 236 simple_unlock(&atabus_interlock); 237 238 free(atabus_initq, M_DEVBUF); 239 wakeup(&atabus_initq_head); 240 241 ata_delref(chp); 242 243 config_pending_decr(); 244 } 245 246 /* 247 * atabus_configthread: finish attach of atabus's childrens, in a separate 248 * kernel thread. 249 */ 250 static void 251 atabusconfig_thread(void *arg) 252 { 253 struct atabus_softc *atabus_sc = arg; 254 struct ata_channel *chp = atabus_sc->sc_chan; 255 struct atac_softc *atac = chp->ch_atac; 256 int i, s; 257 struct atabus_initq *atabus_initq = NULL; 258 259 simple_lock(&atabus_interlock); 260 atabus_initq = TAILQ_FIRST(&atabus_initq_head); 261 simple_unlock(&atabus_interlock); 262 KASSERT(atabus_initq->atabus_sc == atabus_sc); 263 /* 264 * Attach an ATAPI bus, if needed. 265 */ 266 for (i = 0; i < chp->ch_ndrive; i++) { 267 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) { 268 #if NATAPIBUS > 0 269 (*atac->atac_atapibus_attach)(atabus_sc); 270 #else 271 /* 272 * Fake the autoconfig "not configured" message 273 */ 274 aprint_normal("atapibus at %s not configured\n", 275 device_xname(atac->atac_dev)); 276 chp->atapibus = NULL; 277 s = splbio(); 278 for (i = 0; i < chp->ch_ndrive; i++) 279 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI; 280 splx(s); 281 #endif 282 break; 283 } 284 } 285 286 for (i = 0; i < chp->ch_ndrive; i++) { 287 struct ata_device adev; 288 if ((chp->ch_drive[i].drive_flags & 289 (DRIVE_ATA | DRIVE_OLD)) == 0) { 290 continue; 291 } 292 memset(&adev, 0, sizeof(struct ata_device)); 293 adev.adev_bustype = atac->atac_bustype_ata; 294 adev.adev_channel = chp->ch_channel; 295 adev.adev_openings = 1; 296 adev.adev_drv_data = &chp->ch_drive[i]; 297 chp->ata_drives[i] = config_found_ia(atabus_sc->sc_dev, 298 "ata_hl", &adev, ataprint); 299 if (chp->ata_drives[i] != NULL) 300 ata_probe_caps(&chp->ch_drive[i]); 301 else { 302 s = splbio(); 303 chp->ch_drive[i].drive_flags &= 304 ~(DRIVE_ATA | DRIVE_OLD); 305 splx(s); 306 } 307 } 308 309 /* now that we know the drives, the controller can set its modes */ 310 if (atac->atac_set_modes) { 311 (*atac->atac_set_modes)(chp); 312 ata_print_modes(chp); 313 } 314 #if NATARAID > 0 315 if (atac->atac_cap & ATAC_CAP_RAID) 316 for (i = 0; i < chp->ch_ndrive; i++) 317 if (chp->ata_drives[i] != NULL) 318 ata_raid_check_component(chp->ata_drives[i]); 319 #endif /* NATARAID > 0 */ 320 321 /* 322 * reset drive_flags for unattached devices, reset state for attached 323 * ones 324 */ 325 s = splbio(); 326 for (i = 0; i < chp->ch_ndrive; i++) { 327 if (chp->ch_drive[i].drv_softc == NULL) 328 chp->ch_drive[i].drive_flags = 0; 329 else 330 chp->ch_drive[i].state = 0; 331 } 332 splx(s); 333 334 simple_lock(&atabus_interlock); 335 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq); 336 simple_unlock(&atabus_interlock); 337 338 free(atabus_initq, M_DEVBUF); 339 wakeup(&atabus_initq_head); 340 341 ata_delref(chp); 342 343 config_pending_decr(); 344 kthread_exit(0); 345 } 346 347 /* 348 * atabus_thread: 349 * 350 * Worker thread for the ATA bus. 351 */ 352 static void 353 atabus_thread(void *arg) 354 { 355 struct atabus_softc *sc = arg; 356 struct ata_channel *chp = sc->sc_chan; 357 struct ata_xfer *xfer; 358 int i, s; 359 360 s = splbio(); 361 chp->ch_flags |= ATACH_TH_RUN; 362 363 /* 364 * Probe the drives. Reset all flags to 0 to indicate to controllers 365 * that can re-probe that all drives must be probed.. 366 * 367 * Note: ch_ndrive may be changed during the probe. 368 */ 369 for (i = 0; i < ATA_MAXDRIVES; i++) 370 chp->ch_drive[i].drive_flags = 0; 371 splx(s); 372 373 atabusconfig(sc); 374 375 s = splbio(); 376 for (;;) { 377 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 && 378 (chp->ch_queue->active_xfer == NULL || 379 chp->ch_queue->queue_freeze == 0)) { 380 chp->ch_flags &= ~ATACH_TH_RUN; 381 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 382 chp->ch_flags |= ATACH_TH_RUN; 383 } 384 if (chp->ch_flags & ATACH_SHUTDOWN) { 385 break; 386 } 387 if (chp->ch_flags & ATACH_TH_RESET) { 388 /* 389 * ata_reset_channel() will freeze 2 times, so 390 * unfreeze one time. Not a problem as we're at splbio 391 */ 392 chp->ch_queue->queue_freeze--; 393 ata_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 394 } else if (chp->ch_queue->active_xfer != NULL && 395 chp->ch_queue->queue_freeze == 1) { 396 /* 397 * Caller has bumped queue_freeze, decrease it. 398 */ 399 chp->ch_queue->queue_freeze--; 400 xfer = chp->ch_queue->active_xfer; 401 KASSERT(xfer != NULL); 402 (*xfer->c_start)(xfer->c_chp, xfer); 403 } else if (chp->ch_queue->queue_freeze > 1) 404 panic("ata_thread: queue_freeze"); 405 } 406 splx(s); 407 chp->ch_thread = NULL; 408 wakeup(&chp->ch_flags); 409 kthread_exit(0); 410 } 411 412 /* 413 * atabus_match: 414 * 415 * Autoconfiguration match routine. 416 */ 417 static int 418 atabus_match(device_t parent, cfdata_t cf, void *aux) 419 { 420 struct ata_channel *chp = aux; 421 422 if (chp == NULL) 423 return (0); 424 425 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 426 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 427 return (0); 428 429 return (1); 430 } 431 432 /* 433 * atabus_attach: 434 * 435 * Autoconfiguration attach routine. 436 */ 437 static void 438 atabus_attach(device_t parent, device_t self, void *aux) 439 { 440 struct atabus_softc *sc = device_private(self); 441 struct ata_channel *chp = aux; 442 struct atabus_initq *initq; 443 int error; 444 445 sc->sc_chan = chp; 446 447 aprint_normal("\n"); 448 aprint_naive("\n"); 449 450 sc->sc_dev = self; 451 452 if (ata_addref(chp)) 453 return; 454 455 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 456 initq->atabus_sc = sc; 457 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 458 config_pending_incr(); 459 460 if ((error = kthread_create(PRI_NONE, 0, NULL, atabus_thread, sc, 461 &chp->ch_thread, "%s", device_xname(self))) != 0) 462 aprint_error_dev(self, 463 "unable to create kernel thread: error %d\n", error); 464 465 if (!pmf_device_register(self, atabus_suspend, atabus_resume)) 466 aprint_error_dev(self, "couldn't establish power handler\n"); 467 } 468 469 /* 470 * atabus_activate: 471 * 472 * Autoconfiguration activation routine. 473 */ 474 static int 475 atabus_activate(device_t self, enum devact act) 476 { 477 struct atabus_softc *sc = device_private(self); 478 struct ata_channel *chp = sc->sc_chan; 479 device_t dev = NULL; 480 int s, i, error = 0; 481 482 s = splbio(); 483 switch (act) { 484 case DVACT_ACTIVATE: 485 error = EOPNOTSUPP; 486 break; 487 488 case DVACT_DEACTIVATE: 489 /* 490 * We might deactivate the children of atapibus twice 491 * (once bia atapibus, once directly), but since the 492 * generic autoconfiguration code maintains the DVF_ACTIVE 493 * flag, it's safe. 494 */ 495 if ((dev = chp->atapibus) != NULL) { 496 error = config_deactivate(dev); 497 if (error) 498 goto out; 499 } 500 501 for (i = 0; i < chp->ch_ndrive; i++) { 502 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 503 continue; 504 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 505 ATADEBUG_PRINT(("atabus_activate: %s: " 506 "deactivating %s\n", device_xname(self), 507 device_xname(dev)), 508 DEBUG_DETACH); 509 error = config_deactivate(dev); 510 if (error) 511 goto out; 512 } 513 } 514 break; 515 } 516 out: 517 splx(s); 518 519 #ifdef ATADEBUG 520 if (dev != NULL && error != 0) 521 ATADEBUG_PRINT(("atabus_activate: %s: " 522 "error %d deactivating %s\n", device_xname(self), 523 error, device_xname(dev)), DEBUG_DETACH); 524 #endif /* ATADEBUG */ 525 526 return (error); 527 } 528 529 /* 530 * atabus_detach: 531 * 532 * Autoconfiguration detach routine. 533 */ 534 static int 535 atabus_detach(device_t self, int flags) 536 { 537 struct atabus_softc *sc = device_private(self); 538 struct ata_channel *chp = sc->sc_chan; 539 device_t dev = NULL; 540 int s, i, error = 0; 541 542 /* Shutdown the channel. */ 543 s = splbio(); /* XXX ALSO NEED AN INTERLOCK HERE. */ 544 chp->ch_flags |= ATACH_SHUTDOWN; 545 splx(s); 546 547 wakeup(&chp->ch_thread); 548 549 while (chp->ch_thread != NULL) 550 (void) tsleep(&chp->ch_flags, PRIBIO, "atadown", 0); 551 552 553 /* 554 * Detach atapibus and its children. 555 */ 556 if ((dev = chp->atapibus) != NULL) { 557 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 558 device_xname(self), device_xname(dev)), DEBUG_DETACH); 559 560 error = config_detach(dev, flags); 561 if (error) 562 goto out; 563 KASSERT(chp->atapibus == NULL); 564 } 565 566 /* 567 * Detach our other children. 568 */ 569 for (i = 0; i < chp->ch_ndrive; i++) { 570 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 571 continue; 572 if ((dev = chp->ata_drives[i]) != NULL) { 573 ATADEBUG_PRINT(("%s.%d: %s: detaching %s\n", __func__, 574 __LINE__, device_xname(self), device_xname(dev)), 575 DEBUG_DETACH); 576 KASSERT(chp->ch_drive[i].drv_softc == 577 chp->ata_drives[i]); 578 error = config_detach(dev, flags); 579 if (error) 580 goto out; 581 KASSERT(chp->ata_drives[i] == NULL); 582 } 583 } 584 585 out: 586 #ifdef ATADEBUG 587 if (dev != NULL && error != 0) 588 ATADEBUG_PRINT(("%s: %s: error %d detaching %s\n", __func__, 589 device_xname(self), error, device_xname(dev)), 590 DEBUG_DETACH); 591 #endif /* ATADEBUG */ 592 593 return (error); 594 } 595 596 void 597 atabus_childdetached(device_t self, device_t child) 598 { 599 bool found = false; 600 struct atabus_softc *sc = device_private(self); 601 struct ata_channel *chp = sc->sc_chan; 602 int i; 603 604 /* 605 * atapibus detached. 606 */ 607 if (child == chp->atapibus) { 608 chp->atapibus = NULL; 609 found = true; 610 } 611 612 /* 613 * Detach our other children. 614 */ 615 for (i = 0; i < chp->ch_ndrive; i++) { 616 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 617 continue; 618 if (child == chp->ata_drives[i]) { 619 KASSERT(chp->ata_drives[i] == 620 chp->ch_drive[i].drv_softc); 621 chp->ata_drives[i] = NULL; 622 chp->ch_drive[i].drv_softc = NULL; 623 chp->ch_drive[i].drive_flags = 0; 624 found = true; 625 } 626 } 627 628 if (!found) 629 panic("%s: unknown child %p", device_xname(self), 630 (const void *)child); 631 } 632 633 CFATTACH_DECL3_NEW(atabus, sizeof(struct atabus_softc), 634 atabus_match, atabus_attach, atabus_detach, atabus_activate, NULL, 635 atabus_childdetached, DVF_DETACH_SHUTDOWN); 636 637 /***************************************************************************** 638 * Common ATA bus operations. 639 *****************************************************************************/ 640 641 /* Get the disk's parameters */ 642 int 643 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 644 struct ataparams *prms) 645 { 646 struct ata_command ata_c; 647 struct ata_channel *chp = drvp->chnl_softc; 648 struct atac_softc *atac = chp->ch_atac; 649 char *tb; 650 int i, rv; 651 u_int16_t *p; 652 653 ATADEBUG_PRINT(("%s\n", __func__), DEBUG_FUNCS); 654 655 tb = kmem_zalloc(DEV_BSIZE, KM_SLEEP); 656 memset(prms, 0, sizeof(struct ataparams)); 657 memset(&ata_c, 0, sizeof(struct ata_command)); 658 659 if (drvp->drive_flags & DRIVE_ATA) { 660 ata_c.r_command = WDCC_IDENTIFY; 661 ata_c.r_st_bmask = WDCS_DRDY; 662 ata_c.r_st_pmask = WDCS_DRQ; 663 ata_c.timeout = 3000; /* 3s */ 664 } else if (drvp->drive_flags & DRIVE_ATAPI) { 665 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 666 ata_c.r_st_bmask = 0; 667 ata_c.r_st_pmask = WDCS_DRQ; 668 ata_c.timeout = 10000; /* 10s */ 669 } else { 670 ATADEBUG_PRINT(("ata_get_parms: no disks\n"), 671 DEBUG_FUNCS|DEBUG_PROBE); 672 rv = CMD_ERR; 673 goto out; 674 } 675 ata_c.flags = AT_READ | flags; 676 ata_c.data = tb; 677 ata_c.bcount = DEV_BSIZE; 678 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 679 &ata_c) != ATACMD_COMPLETE) { 680 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 681 DEBUG_FUNCS|DEBUG_PROBE); 682 rv = CMD_AGAIN; 683 goto out; 684 } 685 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 686 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 687 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 688 rv = CMD_ERR; 689 goto out; 690 } 691 /* if we didn't read any data something is wrong */ 692 if ((ata_c.flags & AT_XFDONE) == 0) { 693 rv = CMD_ERR; 694 goto out; 695 } 696 697 /* Read in parameter block. */ 698 memcpy(prms, tb, sizeof(struct ataparams)); 699 700 /* 701 * Shuffle string byte order. 702 * ATAPI NEC, Mitsumi and Pioneer drives and 703 * old ATA TDK CompactFlash cards 704 * have different byte order. 705 */ 706 #if BYTE_ORDER == BIG_ENDIAN 707 # define M(n) prms->atap_model[(n) ^ 1] 708 #else 709 # define M(n) prms->atap_model[n] 710 #endif 711 if ( 712 #if BYTE_ORDER == BIG_ENDIAN 713 ! 714 #endif 715 ((drvp->drive_flags & DRIVE_ATAPI) ? 716 ((M(0) == 'N' && M(1) == 'E') || 717 (M(0) == 'F' && M(1) == 'X') || 718 (M(0) == 'P' && M(1) == 'i')) : 719 ((M(0) == 'T' && M(1) == 'D' && M(2) == 'K')))) { 720 rv = CMD_OK; 721 goto out; 722 } 723 #undef M 724 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 725 p = (u_int16_t *)(prms->atap_model + i); 726 *p = bswap16(*p); 727 } 728 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 729 p = (u_int16_t *)(prms->atap_serial + i); 730 *p = bswap16(*p); 731 } 732 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 733 p = (u_int16_t *)(prms->atap_revision + i); 734 *p = bswap16(*p); 735 } 736 737 rv = CMD_OK; 738 out: 739 kmem_free(tb, DEV_BSIZE); 740 return rv; 741 } 742 743 int 744 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 745 { 746 struct ata_command ata_c; 747 struct ata_channel *chp = drvp->chnl_softc; 748 struct atac_softc *atac = chp->ch_atac; 749 750 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 751 memset(&ata_c, 0, sizeof(struct ata_command)); 752 753 ata_c.r_command = SET_FEATURES; 754 ata_c.r_st_bmask = 0; 755 ata_c.r_st_pmask = 0; 756 ata_c.r_features = WDSF_SET_MODE; 757 ata_c.r_count = mode; 758 ata_c.flags = flags; 759 ata_c.timeout = 1000; /* 1s */ 760 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 761 &ata_c) != ATACMD_COMPLETE) 762 return CMD_AGAIN; 763 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 764 return CMD_ERR; 765 } 766 return CMD_OK; 767 } 768 769 #if NATA_DMA 770 void 771 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 772 { 773 /* 774 * Downgrade decision: if we get NERRS_MAX in NXFER. 775 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 776 * first error within the first NXFER ops will immediatly trigger 777 * a downgrade. 778 * If we got an error and n_xfers is bigger than NXFER reset counters. 779 */ 780 drvp->n_dmaerrs++; 781 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 782 ata_downgrade_mode(drvp, flags); 783 drvp->n_dmaerrs = NERRS_MAX-1; 784 drvp->n_xfers = 0; 785 return; 786 } 787 if (drvp->n_xfers > NXFER) { 788 drvp->n_dmaerrs = 1; /* just got an error */ 789 drvp->n_xfers = 1; /* restart counting from this error */ 790 } 791 } 792 #endif /* NATA_DMA */ 793 794 /* 795 * freeze the queue and wait for the controller to be idle. Caller has to 796 * unfreeze/restart the queue 797 */ 798 void 799 ata_queue_idle(struct ata_queue *queue) 800 { 801 int s = splbio(); 802 queue->queue_freeze++; 803 while (queue->active_xfer != NULL) { 804 queue->queue_flags |= QF_IDLE_WAIT; 805 tsleep(&queue->queue_flags, PRIBIO, "qidl", 0); 806 } 807 splx(s); 808 } 809 810 /* 811 * Add a command to the queue and start controller. 812 * 813 * MUST BE CALLED AT splbio()! 814 */ 815 void 816 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 817 { 818 819 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 820 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 821 822 /* complete xfer setup */ 823 xfer->c_chp = chp; 824 825 /* insert at the end of command list */ 826 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 827 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n", 828 chp->ch_flags), DEBUG_XFERS); 829 /* 830 * if polling and can sleep, wait for the xfer to be at head of queue 831 */ 832 if ((xfer->c_flags & (C_POLL | C_WAIT)) == (C_POLL | C_WAIT)) { 833 while (chp->ch_queue->active_xfer != NULL || 834 TAILQ_FIRST(&chp->ch_queue->queue_xfer) != xfer) { 835 xfer->c_flags |= C_WAITACT; 836 tsleep(xfer, PRIBIO, "ataact", 0); 837 xfer->c_flags &= ~C_WAITACT; 838 if (xfer->c_flags & C_FREE) { 839 ata_free_xfer(chp, xfer); 840 return; 841 } 842 } 843 } 844 atastart(chp); 845 } 846 847 /* 848 * Start I/O on a controller, for the given channel. 849 * The first xfer may be not for our channel if the channel queues 850 * are shared. 851 * 852 * MUST BE CALLED AT splbio()! 853 */ 854 void 855 atastart(struct ata_channel *chp) 856 { 857 struct atac_softc *atac = chp->ch_atac; 858 struct ata_xfer *xfer; 859 860 #ifdef ATA_DEBUG 861 int spl1, spl2; 862 863 spl1 = splbio(); 864 spl2 = splbio(); 865 if (spl2 != spl1) { 866 printf("atastart: not at splbio()\n"); 867 panic("atastart"); 868 } 869 splx(spl2); 870 splx(spl1); 871 #endif /* ATA_DEBUG */ 872 873 /* is there a xfer ? */ 874 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL) 875 return; 876 877 /* adjust chp, in case we have a shared queue */ 878 chp = xfer->c_chp; 879 880 if (chp->ch_queue->active_xfer != NULL) { 881 return; /* channel aleady active */ 882 } 883 if (__predict_false(chp->ch_queue->queue_freeze > 0)) { 884 if (chp->ch_queue->queue_flags & QF_IDLE_WAIT) { 885 chp->ch_queue->queue_flags &= ~QF_IDLE_WAIT; 886 wakeup(&chp->ch_queue->queue_flags); 887 } 888 return; /* queue frozen */ 889 } 890 /* 891 * if someone is waiting for the command to be active, wake it up 892 * and let it process the command 893 */ 894 if (xfer->c_flags & C_WAITACT) { 895 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d " 896 "wait active\n", xfer, chp->ch_channel, xfer->c_drive), 897 DEBUG_XFERS); 898 wakeup(xfer); 899 return; 900 } 901 #ifdef DIAGNOSTIC 902 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) 903 panic("atastart: channel waiting for irq"); 904 #endif 905 if (atac->atac_claim_hw) 906 if (!(*atac->atac_claim_hw)(chp, 0)) 907 return; 908 909 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer, 910 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 911 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) { 912 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET; 913 chp->ch_drive[xfer->c_drive].state = 0; 914 } 915 chp->ch_queue->active_xfer = xfer; 916 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 917 918 if (atac->atac_cap & ATAC_CAP_NOIRQ) 919 KASSERT(xfer->c_flags & C_POLL); 920 921 xfer->c_start(chp, xfer); 922 } 923 924 struct ata_xfer * 925 ata_get_xfer(int flags) 926 { 927 struct ata_xfer *xfer; 928 int s; 929 930 s = splbio(); 931 xfer = pool_get(&ata_xfer_pool, 932 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 933 splx(s); 934 if (xfer != NULL) { 935 memset(xfer, 0, sizeof(struct ata_xfer)); 936 } 937 return xfer; 938 } 939 940 void 941 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer) 942 { 943 struct atac_softc *atac = chp->ch_atac; 944 int s; 945 946 if (xfer->c_flags & C_WAITACT) { 947 /* Someone is waiting for this xfer, so we can't free now */ 948 xfer->c_flags |= C_FREE; 949 wakeup(xfer); 950 return; 951 } 952 953 #if NATA_PIOBM /* XXX wdc dependent code */ 954 if (xfer->c_flags & C_PIOBM) { 955 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 956 957 /* finish the busmastering PIO */ 958 (*wdc->piobm_done)(wdc->dma_arg, 959 chp->ch_channel, xfer->c_drive); 960 chp->ch_flags &= ~(ATACH_DMA_WAIT | ATACH_PIOBM_WAIT | ATACH_IRQ_WAIT); 961 } 962 #endif 963 964 if (atac->atac_free_hw) 965 (*atac->atac_free_hw)(chp); 966 s = splbio(); 967 pool_put(&ata_xfer_pool, xfer); 968 splx(s); 969 } 970 971 /* 972 * Kill off all pending xfers for a ata_channel. 973 * 974 * Must be called at splbio(). 975 */ 976 void 977 ata_kill_pending(struct ata_drive_datas *drvp) 978 { 979 struct ata_channel *chp = drvp->chnl_softc; 980 struct ata_xfer *xfer, *next_xfer; 981 int s = splbio(); 982 983 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 984 xfer != NULL; xfer = next_xfer) { 985 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 986 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 987 continue; 988 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 989 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 990 } 991 992 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 993 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 994 drvp->drive_flags |= DRIVE_WAITDRAIN; 995 (void) tsleep(&chp->ch_queue->active_xfer, 996 PRIBIO, "atdrn", 0); 997 } else { 998 /* no more xfer for us */ 999 break; 1000 } 1001 } 1002 splx(s); 1003 } 1004 1005 /* 1006 * ata_reset_channel: 1007 * 1008 * Reset and ATA channel. 1009 * 1010 * MUST BE CALLED AT splbio()! 1011 */ 1012 void 1013 ata_reset_channel(struct ata_channel *chp, int flags) 1014 { 1015 struct atac_softc *atac = chp->ch_atac; 1016 int drive; 1017 1018 #ifdef ATA_DEBUG 1019 int spl1, spl2; 1020 1021 spl1 = splbio(); 1022 spl2 = splbio(); 1023 if (spl2 != spl1) { 1024 printf("ata_reset_channel: not at splbio()\n"); 1025 panic("ata_reset_channel"); 1026 } 1027 splx(spl2); 1028 splx(spl1); 1029 #endif /* ATA_DEBUG */ 1030 1031 chp->ch_queue->queue_freeze++; 1032 1033 /* 1034 * If we can poll or wait it's OK, otherwise wake up the 1035 * kernel thread to do it for us. 1036 */ 1037 ATADEBUG_PRINT(("ata_reset_channel flags 0x%x ch_flags 0x%x\n", 1038 flags, chp->ch_flags), DEBUG_FUNCS | DEBUG_XFERS); 1039 if ((flags & (AT_POLL | AT_WAIT)) == 0) { 1040 if (chp->ch_flags & ATACH_TH_RESET) { 1041 /* No need to schedule a reset more than one time. */ 1042 chp->ch_queue->queue_freeze--; 1043 return; 1044 } 1045 chp->ch_flags |= ATACH_TH_RESET; 1046 chp->ch_reset_flags = flags & (AT_RST_EMERG | AT_RST_NOCMD); 1047 wakeup(&chp->ch_thread); 1048 return; 1049 } 1050 1051 (*atac->atac_bustype_ata->ata_reset_channel)(chp, flags); 1052 1053 for (drive = 0; drive < chp->ch_ndrive; drive++) 1054 chp->ch_drive[drive].state = 0; 1055 1056 chp->ch_flags &= ~ATACH_TH_RESET; 1057 if ((flags & AT_RST_EMERG) == 0) { 1058 chp->ch_queue->queue_freeze--; 1059 atastart(chp); 1060 } else { 1061 /* make sure that we can use polled commands */ 1062 TAILQ_INIT(&chp->ch_queue->queue_xfer); 1063 chp->ch_queue->queue_freeze = 0; 1064 chp->ch_queue->active_xfer = NULL; 1065 } 1066 } 1067 1068 int 1069 ata_addref(struct ata_channel *chp) 1070 { 1071 struct atac_softc *atac = chp->ch_atac; 1072 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1073 int s, error = 0; 1074 1075 s = splbio(); 1076 if (adapt->adapt_refcnt++ == 0 && 1077 adapt->adapt_enable != NULL) { 1078 error = (*adapt->adapt_enable)(atac->atac_dev, 1); 1079 if (error) 1080 adapt->adapt_refcnt--; 1081 } 1082 splx(s); 1083 return (error); 1084 } 1085 1086 void 1087 ata_delref(struct ata_channel *chp) 1088 { 1089 struct atac_softc *atac = chp->ch_atac; 1090 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1091 int s; 1092 1093 s = splbio(); 1094 if (adapt->adapt_refcnt-- == 1 && 1095 adapt->adapt_enable != NULL) 1096 (void) (*adapt->adapt_enable)(atac->atac_dev, 0); 1097 splx(s); 1098 } 1099 1100 void 1101 ata_print_modes(struct ata_channel *chp) 1102 { 1103 struct atac_softc *atac = chp->ch_atac; 1104 int drive; 1105 struct ata_drive_datas *drvp; 1106 1107 for (drive = 0; drive < chp->ch_ndrive; drive++) { 1108 drvp = &chp->ch_drive[drive]; 1109 if ((drvp->drive_flags & DRIVE) == 0 || drvp->drv_softc == NULL) 1110 continue; 1111 aprint_verbose("%s(%s:%d:%d): using PIO mode %d", 1112 device_xname(drvp->drv_softc), 1113 device_xname(atac->atac_dev), 1114 chp->ch_channel, drvp->drive, drvp->PIO_mode); 1115 #if NATA_DMA 1116 if (drvp->drive_flags & DRIVE_DMA) 1117 aprint_verbose(", DMA mode %d", drvp->DMA_mode); 1118 #if NATA_UDMA 1119 if (drvp->drive_flags & DRIVE_UDMA) { 1120 aprint_verbose(", Ultra-DMA mode %d", drvp->UDMA_mode); 1121 if (drvp->UDMA_mode == 2) 1122 aprint_verbose(" (Ultra/33)"); 1123 else if (drvp->UDMA_mode == 4) 1124 aprint_verbose(" (Ultra/66)"); 1125 else if (drvp->UDMA_mode == 5) 1126 aprint_verbose(" (Ultra/100)"); 1127 else if (drvp->UDMA_mode == 6) 1128 aprint_verbose(" (Ultra/133)"); 1129 } 1130 #endif /* NATA_UDMA */ 1131 #endif /* NATA_DMA */ 1132 #if NATA_DMA || NATA_PIOBM 1133 if (0 1134 #if NATA_DMA 1135 || (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 1136 #endif 1137 #if NATA_PIOBM 1138 /* PIOBM capable controllers use DMA for PIO commands */ 1139 || (atac->atac_cap & ATAC_CAP_PIOBM) 1140 #endif 1141 ) 1142 aprint_verbose(" (using DMA)"); 1143 #endif /* NATA_DMA || NATA_PIOBM */ 1144 aprint_verbose("\n"); 1145 } 1146 } 1147 1148 #if NATA_DMA 1149 /* 1150 * downgrade the transfer mode of a drive after an error. return 1 if 1151 * downgrade was possible, 0 otherwise. 1152 * 1153 * MUST BE CALLED AT splbio()! 1154 */ 1155 int 1156 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 1157 { 1158 struct ata_channel *chp = drvp->chnl_softc; 1159 struct atac_softc *atac = chp->ch_atac; 1160 device_t drv_dev = drvp->drv_softc; 1161 int cf_flags = device_cfdata(drv_dev)->cf_flags; 1162 1163 /* if drive or controller don't know its mode, we can't do much */ 1164 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 1165 (atac->atac_set_modes == NULL)) 1166 return 0; 1167 /* current drive mode was set by a config flag, let it this way */ 1168 if ((cf_flags & ATA_CONFIG_PIO_SET) || 1169 (cf_flags & ATA_CONFIG_DMA_SET) || 1170 (cf_flags & ATA_CONFIG_UDMA_SET)) 1171 return 0; 1172 1173 #if NATA_UDMA 1174 /* 1175 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 1176 */ 1177 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 1178 drvp->UDMA_mode--; 1179 aprint_error_dev(drv_dev, 1180 "transfer error, downgrading to Ultra-DMA mode %d\n", 1181 drvp->UDMA_mode); 1182 } 1183 #endif 1184 1185 /* 1186 * If we were using ultra-DMA, don't downgrade to multiword DMA. 1187 */ 1188 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 1189 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 1190 drvp->PIO_mode = drvp->PIO_cap; 1191 aprint_error_dev(drv_dev, 1192 "transfer error, downgrading to PIO mode %d\n", 1193 drvp->PIO_mode); 1194 } else /* already using PIO, can't downgrade */ 1195 return 0; 1196 1197 (*atac->atac_set_modes)(chp); 1198 ata_print_modes(chp); 1199 /* reset the channel, which will schedule all drives for setup */ 1200 ata_reset_channel(chp, flags | AT_RST_NOCMD); 1201 return 1; 1202 } 1203 #endif /* NATA_DMA */ 1204 1205 /* 1206 * Probe drive's capabilities, for use by the controller later 1207 * Assumes drvp points to an existing drive. 1208 */ 1209 void 1210 ata_probe_caps(struct ata_drive_datas *drvp) 1211 { 1212 struct ataparams params, params2; 1213 struct ata_channel *chp = drvp->chnl_softc; 1214 struct atac_softc *atac = chp->ch_atac; 1215 device_t drv_dev = drvp->drv_softc; 1216 int i, printed, s; 1217 const char *sep = ""; 1218 int cf_flags; 1219 1220 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 1221 /* IDENTIFY failed. Can't tell more about the device */ 1222 return; 1223 } 1224 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) == 1225 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) { 1226 /* 1227 * Controller claims 16 and 32 bit transfers. 1228 * Re-do an IDENTIFY with 32-bit transfers, 1229 * and compare results. 1230 */ 1231 s = splbio(); 1232 drvp->drive_flags |= DRIVE_CAP32; 1233 splx(s); 1234 ata_get_params(drvp, AT_WAIT, ¶ms2); 1235 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 1236 /* Not good. fall back to 16bits */ 1237 s = splbio(); 1238 drvp->drive_flags &= ~DRIVE_CAP32; 1239 splx(s); 1240 } else { 1241 aprint_verbose_dev(drv_dev, "32-bit data port\n"); 1242 } 1243 } 1244 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 1245 if (params.atap_ata_major > 0x01 && 1246 params.atap_ata_major != 0xffff) { 1247 for (i = 14; i > 0; i--) { 1248 if (params.atap_ata_major & (1 << i)) { 1249 aprint_verbose_dev(drv_dev, 1250 "ATA version %d\n", i); 1251 drvp->ata_vers = i; 1252 break; 1253 } 1254 } 1255 } 1256 #endif 1257 1258 /* An ATAPI device is at last PIO mode 3 */ 1259 if (drvp->drive_flags & DRIVE_ATAPI) 1260 drvp->PIO_mode = 3; 1261 1262 /* 1263 * It's not in the specs, but it seems that some drive 1264 * returns 0xffff in atap_extensions when this field is invalid 1265 */ 1266 if (params.atap_extensions != 0xffff && 1267 (params.atap_extensions & WDC_EXT_MODES)) { 1268 printed = 0; 1269 /* 1270 * XXX some drives report something wrong here (they claim to 1271 * support PIO mode 8 !). As mode is coded on 3 bits in 1272 * SET FEATURE, limit it to 7 (so limit i to 4). 1273 * If higher mode than 7 is found, abort. 1274 */ 1275 for (i = 7; i >= 0; i--) { 1276 if ((params.atap_piomode_supp & (1 << i)) == 0) 1277 continue; 1278 if (i > 4) 1279 return; 1280 /* 1281 * See if mode is accepted. 1282 * If the controller can't set its PIO mode, 1283 * assume the defaults are good, so don't try 1284 * to set it 1285 */ 1286 if (atac->atac_set_modes) 1287 /* 1288 * It's OK to pool here, it's fast enouth 1289 * to not bother waiting for interrupt 1290 */ 1291 if (ata_set_mode(drvp, 0x08 | (i + 3), 1292 AT_WAIT) != CMD_OK) 1293 continue; 1294 if (!printed) { 1295 aprint_verbose_dev(drv_dev, 1296 "drive supports PIO mode %d", i + 3); 1297 sep = ","; 1298 printed = 1; 1299 } 1300 /* 1301 * If controller's driver can't set its PIO mode, 1302 * get the highter one for the drive. 1303 */ 1304 if (atac->atac_set_modes == NULL || 1305 atac->atac_pio_cap >= i + 3) { 1306 drvp->PIO_mode = i + 3; 1307 drvp->PIO_cap = i + 3; 1308 break; 1309 } 1310 } 1311 if (!printed) { 1312 /* 1313 * We didn't find a valid PIO mode. 1314 * Assume the values returned for DMA are buggy too 1315 */ 1316 return; 1317 } 1318 s = splbio(); 1319 drvp->drive_flags |= DRIVE_MODE; 1320 splx(s); 1321 printed = 0; 1322 for (i = 7; i >= 0; i--) { 1323 if ((params.atap_dmamode_supp & (1 << i)) == 0) 1324 continue; 1325 #if NATA_DMA 1326 if ((atac->atac_cap & ATAC_CAP_DMA) && 1327 atac->atac_set_modes != NULL) 1328 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 1329 != CMD_OK) 1330 continue; 1331 #endif 1332 if (!printed) { 1333 aprint_verbose("%s DMA mode %d", sep, i); 1334 sep = ","; 1335 printed = 1; 1336 } 1337 #if NATA_DMA 1338 if (atac->atac_cap & ATAC_CAP_DMA) { 1339 if (atac->atac_set_modes != NULL && 1340 atac->atac_dma_cap < i) 1341 continue; 1342 drvp->DMA_mode = i; 1343 drvp->DMA_cap = i; 1344 s = splbio(); 1345 drvp->drive_flags |= DRIVE_DMA; 1346 splx(s); 1347 } 1348 #endif 1349 break; 1350 } 1351 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 1352 printed = 0; 1353 for (i = 7; i >= 0; i--) { 1354 if ((params.atap_udmamode_supp & (1 << i)) 1355 == 0) 1356 continue; 1357 #if NATA_UDMA 1358 if (atac->atac_set_modes != NULL && 1359 (atac->atac_cap & ATAC_CAP_UDMA)) 1360 if (ata_set_mode(drvp, 0x40 | i, 1361 AT_WAIT) != CMD_OK) 1362 continue; 1363 #endif 1364 if (!printed) { 1365 aprint_verbose("%s Ultra-DMA mode %d", 1366 sep, i); 1367 if (i == 2) 1368 aprint_verbose(" (Ultra/33)"); 1369 else if (i == 4) 1370 aprint_verbose(" (Ultra/66)"); 1371 else if (i == 5) 1372 aprint_verbose(" (Ultra/100)"); 1373 else if (i == 6) 1374 aprint_verbose(" (Ultra/133)"); 1375 sep = ","; 1376 printed = 1; 1377 } 1378 #if NATA_UDMA 1379 if (atac->atac_cap & ATAC_CAP_UDMA) { 1380 if (atac->atac_set_modes != NULL && 1381 atac->atac_udma_cap < i) 1382 continue; 1383 drvp->UDMA_mode = i; 1384 drvp->UDMA_cap = i; 1385 s = splbio(); 1386 drvp->drive_flags |= DRIVE_UDMA; 1387 splx(s); 1388 } 1389 #endif 1390 break; 1391 } 1392 } 1393 aprint_verbose("\n"); 1394 } 1395 1396 s = splbio(); 1397 drvp->drive_flags &= ~DRIVE_NOSTREAM; 1398 if (drvp->drive_flags & DRIVE_ATAPI) { 1399 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM) 1400 drvp->drive_flags |= DRIVE_NOSTREAM; 1401 } else { 1402 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM) 1403 drvp->drive_flags |= DRIVE_NOSTREAM; 1404 } 1405 splx(s); 1406 1407 /* Try to guess ATA version here, if it didn't get reported */ 1408 if (drvp->ata_vers == 0) { 1409 #if NATA_UDMA 1410 if (drvp->drive_flags & DRIVE_UDMA) 1411 drvp->ata_vers = 4; /* should be at last ATA-4 */ 1412 else 1413 #endif 1414 if (drvp->PIO_cap > 2) 1415 drvp->ata_vers = 2; /* should be at last ATA-2 */ 1416 } 1417 cf_flags = device_cfdata(drv_dev)->cf_flags; 1418 if (cf_flags & ATA_CONFIG_PIO_SET) { 1419 s = splbio(); 1420 drvp->PIO_mode = 1421 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 1422 drvp->drive_flags |= DRIVE_MODE; 1423 splx(s); 1424 } 1425 #if NATA_DMA 1426 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) { 1427 /* don't care about DMA modes */ 1428 return; 1429 } 1430 if (cf_flags & ATA_CONFIG_DMA_SET) { 1431 s = splbio(); 1432 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 1433 ATA_CONFIG_DMA_DISABLE) { 1434 drvp->drive_flags &= ~DRIVE_DMA; 1435 } else { 1436 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 1437 ATA_CONFIG_DMA_OFF; 1438 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 1439 } 1440 splx(s); 1441 } 1442 #if NATA_UDMA 1443 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) { 1444 /* don't care about UDMA modes */ 1445 return; 1446 } 1447 if (cf_flags & ATA_CONFIG_UDMA_SET) { 1448 s = splbio(); 1449 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 1450 ATA_CONFIG_UDMA_DISABLE) { 1451 drvp->drive_flags &= ~DRIVE_UDMA; 1452 } else { 1453 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 1454 ATA_CONFIG_UDMA_OFF; 1455 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 1456 } 1457 splx(s); 1458 } 1459 #endif /* NATA_UDMA */ 1460 #endif /* NATA_DMA */ 1461 } 1462 1463 /* management of the /dev/atabus* devices */ 1464 int 1465 atabusopen(dev_t dev, int flag, int fmt, 1466 struct lwp *l) 1467 { 1468 struct atabus_softc *sc; 1469 int error; 1470 1471 sc = device_lookup_private(&atabus_cd, minor(dev)); 1472 if (sc == NULL) 1473 return (ENXIO); 1474 1475 if (sc->sc_flags & ATABUSCF_OPEN) 1476 return (EBUSY); 1477 1478 if ((error = ata_addref(sc->sc_chan)) != 0) 1479 return (error); 1480 1481 sc->sc_flags |= ATABUSCF_OPEN; 1482 1483 return (0); 1484 } 1485 1486 1487 int 1488 atabusclose(dev_t dev, int flag, int fmt, 1489 struct lwp *l) 1490 { 1491 struct atabus_softc *sc = 1492 device_lookup_private(&atabus_cd, minor(dev)); 1493 1494 ata_delref(sc->sc_chan); 1495 1496 sc->sc_flags &= ~ATABUSCF_OPEN; 1497 1498 return (0); 1499 } 1500 1501 int 1502 atabusioctl(dev_t dev, u_long cmd, void *addr, int flag, 1503 struct lwp *l) 1504 { 1505 struct atabus_softc *sc = 1506 device_lookup_private(&atabus_cd, minor(dev)); 1507 struct ata_channel *chp = sc->sc_chan; 1508 int min_drive, max_drive, drive; 1509 int error; 1510 int s; 1511 1512 /* 1513 * Enforce write permission for ioctls that change the 1514 * state of the bus. Host adapter specific ioctls must 1515 * be checked by the adapter driver. 1516 */ 1517 switch (cmd) { 1518 case ATABUSIOSCAN: 1519 case ATABUSIODETACH: 1520 case ATABUSIORESET: 1521 if ((flag & FWRITE) == 0) 1522 return (EBADF); 1523 } 1524 1525 switch (cmd) { 1526 case ATABUSIORESET: 1527 s = splbio(); 1528 ata_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 1529 splx(s); 1530 error = 0; 1531 break; 1532 case ATABUSIOSCAN: 1533 { 1534 #if 0 1535 struct atabusioscan_args *a= 1536 (struct atabusioscan_args *)addr; 1537 #endif 1538 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1539 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1540 return (EOPNOTSUPP); 1541 return (EOPNOTSUPP); 1542 } 1543 case ATABUSIODETACH: 1544 { 1545 struct atabusioscan_args *a= 1546 (struct atabusioscan_args *)addr; 1547 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1548 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1549 return (EOPNOTSUPP); 1550 switch (a->at_dev) { 1551 case -1: 1552 min_drive = 0; 1553 max_drive = 1; 1554 break; 1555 case 0: 1556 case 1: 1557 min_drive = max_drive = a->at_dev; 1558 break; 1559 default: 1560 return (EINVAL); 1561 } 1562 for (drive = min_drive; drive <= max_drive; drive++) { 1563 if (chp->ch_drive[drive].drv_softc != NULL) { 1564 error = config_detach( 1565 chp->ch_drive[drive].drv_softc, 0); 1566 if (error) 1567 return (error); 1568 KASSERT(chp->ch_drive[drive].drv_softc == NULL); 1569 } 1570 } 1571 error = 0; 1572 break; 1573 } 1574 default: 1575 error = ENOTTY; 1576 } 1577 return (error); 1578 }; 1579 1580 static bool 1581 atabus_suspend(device_t dv PMF_FN_ARGS) 1582 { 1583 struct atabus_softc *sc = device_private(dv); 1584 struct ata_channel *chp = sc->sc_chan; 1585 1586 ata_queue_idle(chp->ch_queue); 1587 1588 return true; 1589 } 1590 1591 static bool 1592 atabus_resume(device_t dv PMF_FN_ARGS) 1593 { 1594 struct atabus_softc *sc = device_private(dv); 1595 struct ata_channel *chp = sc->sc_chan; 1596 int s; 1597 1598 /* 1599 * XXX joerg: with wdc, the first channel unfreezes the controler. 1600 * Move this the reset and queue idling into wdc. 1601 */ 1602 s = splbio(); 1603 if (chp->ch_queue->queue_freeze == 0) { 1604 splx(s); 1605 return true; 1606 } 1607 KASSERT(chp->ch_queue->queue_freeze > 0); 1608 /* unfreeze the queue and reset drives */ 1609 chp->ch_queue->queue_freeze--; 1610 ata_reset_channel(chp, AT_WAIT); 1611 splx(s); 1612 1613 return true; 1614 } 1615
Indexes created Thu Sep 25 08:09:54 GMT 2025