ata.c revision 1.41
1 /* $NetBSD: ata.c,v 1.41 2004/08/12 21:34:52 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.41 2004/08/12 21:34:52 thorpej Exp $"); 34 35 #ifndef WDCDEBUG 36 #define WDCDEBUG 37 #endif /* WDCDEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 #include <dev/ic/wdcreg.h> 58 #include <dev/ic/wdcvar.h> 59 60 #include "locators.h" 61 62 #define DEBUG_FUNCS 0x08 63 #define DEBUG_PROBE 0x10 64 #define DEBUG_DETACH 0x20 65 #ifdef WDCDEBUG 66 extern int wdcdebug_mask; /* init'ed in wdc.c */ 67 #define WDCDEBUG_PRINT(args, level) \ 68 if (wdcdebug_mask & (level)) \ 69 printf args 70 #else 71 #define WDCDEBUG_PRINT(args, level) 72 #endif 73 74 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 75 76 /***************************************************************************** 77 * ATA bus layer. 78 * 79 * ATA controllers attach an atabus instance, which handles probing the bus 80 * for drives, etc. 81 *****************************************************************************/ 82 83 dev_type_open(atabusopen); 84 dev_type_close(atabusclose); 85 dev_type_ioctl(atabusioctl); 86 87 const struct cdevsw atabus_cdevsw = { 88 atabusopen, atabusclose, noread, nowrite, atabusioctl, 89 nostop, notty, nopoll, nommap, nokqfilter, 90 }; 91 92 extern struct cfdriver atabus_cd; 93 94 95 /* 96 * atabusprint: 97 * 98 * Autoconfiguration print routine used by ATA controllers when 99 * attaching an atabus instance. 100 */ 101 int 102 atabusprint(void *aux, const char *pnp) 103 { 104 struct wdc_channel *chan = aux; 105 106 if (pnp) 107 aprint_normal("atabus at %s", pnp); 108 aprint_normal(" channel %d", chan->ch_channel); 109 110 return (UNCONF); 111 } 112 113 /* 114 * ataprint: 115 * 116 * Autoconfiguration print routine. 117 */ 118 int 119 ataprint(void *aux, const char *pnp) 120 { 121 struct ata_device *adev = aux; 122 123 if (pnp) 124 aprint_normal("wd at %s", pnp); 125 aprint_normal(" drive %d", adev->adev_drv_data->drive); 126 127 return (UNCONF); 128 } 129 130 /* 131 * atabus_thread: 132 * 133 * Worker thread for the ATA bus. 134 */ 135 static void 136 atabus_thread(void *arg) 137 { 138 struct atabus_softc *sc = arg; 139 struct wdc_channel *chp = sc->sc_chan; 140 struct ata_xfer *xfer; 141 int s; 142 143 s = splbio(); 144 chp->ch_flags |= WDCF_TH_RUN; 145 splx(s); 146 147 /* Configure the devices on the bus. */ 148 atabusconfig(sc); 149 150 for (;;) { 151 s = splbio(); 152 if ((chp->ch_flags & (WDCF_TH_RESET | WDCF_SHUTDOWN)) == 0 && 153 (chp->ch_queue->active_xfer == NULL || 154 chp->ch_queue->queue_freeze == 0)) { 155 chp->ch_flags &= ~WDCF_TH_RUN; 156 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 157 chp->ch_flags |= WDCF_TH_RUN; 158 } 159 splx(s); 160 if (chp->ch_flags & WDCF_SHUTDOWN) 161 break; 162 s = splbio(); 163 if (chp->ch_flags & WDCF_TH_RESET) { 164 /* 165 * wdc_reset_channel() will freeze 2 times, so 166 * unfreeze one time. Not a problem as we're at splbio 167 */ 168 chp->ch_queue->queue_freeze--; 169 wdc_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 170 } else if (chp->ch_queue->active_xfer != NULL && 171 chp->ch_queue->queue_freeze == 1) { 172 /* 173 * Caller has bumped queue_freeze, decrease it. 174 */ 175 chp->ch_queue->queue_freeze--; 176 xfer = chp->ch_queue->active_xfer; 177 KASSERT(xfer != NULL); 178 (*xfer->c_start)(chp, xfer); 179 } else if (chp->ch_queue->queue_freeze > 1) 180 panic("ata_thread: queue_freeze"); 181 splx(s); 182 } 183 chp->ch_thread = NULL; 184 wakeup((void *)&chp->ch_flags); 185 kthread_exit(0); 186 } 187 188 /* 189 * atabus_create_thread: 190 * 191 * Helper routine to create the ATA bus worker thread. 192 */ 193 static void 194 atabus_create_thread(void *arg) 195 { 196 struct atabus_softc *sc = arg; 197 struct wdc_channel *chp = sc->sc_chan; 198 int error; 199 200 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 201 "%s", sc->sc_dev.dv_xname)) != 0) 202 aprint_error("%s: unable to create kernel thread: error %d\n", 203 sc->sc_dev.dv_xname, error); 204 } 205 206 /* 207 * atabus_match: 208 * 209 * Autoconfiguration match routine. 210 */ 211 static int 212 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 213 { 214 struct wdc_channel *chp = aux; 215 216 if (chp == NULL) 217 return (0); 218 219 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 220 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 221 return (0); 222 223 return (1); 224 } 225 226 /* 227 * atabus_attach: 228 * 229 * Autoconfiguration attach routine. 230 */ 231 static void 232 atabus_attach(struct device *parent, struct device *self, void *aux) 233 { 234 struct atabus_softc *sc = (void *) self; 235 struct wdc_channel *chp = aux; 236 struct atabus_initq *initq; 237 238 sc->sc_chan = chp; 239 240 aprint_normal("\n"); 241 aprint_naive("\n"); 242 243 if (wdc_addref(chp)) 244 return; 245 246 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 247 initq->atabus_sc = sc; 248 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 249 config_pending_incr(); 250 kthread_create(atabus_create_thread, sc); 251 } 252 253 /* 254 * atabus_activate: 255 * 256 * Autoconfiguration activation routine. 257 */ 258 static int 259 atabus_activate(struct device *self, enum devact act) 260 { 261 struct atabus_softc *sc = (void *) self; 262 struct wdc_channel *chp = sc->sc_chan; 263 struct device *dev = NULL; 264 int s, i, error = 0; 265 266 s = splbio(); 267 switch (act) { 268 case DVACT_ACTIVATE: 269 error = EOPNOTSUPP; 270 break; 271 272 case DVACT_DEACTIVATE: 273 /* 274 * We might deactivate the children of atapibus twice 275 * (once bia atapibus, once directly), but since the 276 * generic autoconfiguration code maintains the DVF_ACTIVE 277 * flag, it's safe. 278 */ 279 if ((dev = chp->atapibus) != NULL) { 280 error = config_deactivate(dev); 281 if (error) 282 goto out; 283 } 284 285 for (i = 0; i < 2; i++) { 286 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 287 WDCDEBUG_PRINT(("atabus_activate: %s: " 288 "deactivating %s\n", sc->sc_dev.dv_xname, 289 dev->dv_xname), 290 DEBUG_DETACH); 291 error = config_deactivate(dev); 292 if (error) 293 goto out; 294 } 295 } 296 break; 297 } 298 out: 299 splx(s); 300 301 #ifdef WDCDEBUG 302 if (dev != NULL && error != 0) 303 WDCDEBUG_PRINT(("atabus_activate: %s: " 304 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 305 error, dev->dv_xname), DEBUG_DETACH); 306 #endif /* WDCDEBUG */ 307 308 return (error); 309 } 310 311 /* 312 * atabus_detach: 313 * 314 * Autoconfiguration detach routine. 315 */ 316 static int 317 atabus_detach(struct device *self, int flags) 318 { 319 struct atabus_softc *sc = (void *) self; 320 struct wdc_channel *chp = sc->sc_chan; 321 struct device *dev = NULL; 322 int i, error = 0; 323 324 /* Shutdown the channel. */ 325 /* XXX NEED AN INTERLOCK HERE. */ 326 chp->ch_flags |= WDCF_SHUTDOWN; 327 wakeup(&chp->ch_thread); 328 while (chp->ch_thread != NULL) 329 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0); 330 331 /* 332 * Detach atapibus and its children. 333 */ 334 if ((dev = chp->atapibus) != NULL) { 335 WDCDEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 336 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 337 error = config_detach(dev, flags); 338 if (error) 339 goto out; 340 } 341 342 /* 343 * Detach our other children. 344 */ 345 for (i = 0; i < 2; i++) { 346 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 347 continue; 348 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 349 WDCDEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 350 sc->sc_dev.dv_xname, dev->dv_xname), 351 DEBUG_DETACH); 352 error = config_detach(dev, flags); 353 if (error) 354 goto out; 355 } 356 } 357 358 out: 359 #ifdef WDCDEBUG 360 if (dev != NULL && error != 0) 361 WDCDEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 362 sc->sc_dev.dv_xname, error, dev->dv_xname), 363 DEBUG_DETACH); 364 #endif /* WDCDEBUG */ 365 366 return (error); 367 } 368 369 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 370 atabus_match, atabus_attach, atabus_detach, atabus_activate); 371 372 /***************************************************************************** 373 * Common ATA bus operations. 374 *****************************************************************************/ 375 376 /* Get the disk's parameters */ 377 int 378 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 379 struct ataparams *prms) 380 { 381 char tb[DEV_BSIZE]; 382 struct ata_command ata_c; 383 384 #if BYTE_ORDER == LITTLE_ENDIAN 385 int i; 386 u_int16_t *p; 387 #endif 388 389 WDCDEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 390 391 memset(tb, 0, DEV_BSIZE); 392 memset(prms, 0, sizeof(struct ataparams)); 393 memset(&ata_c, 0, sizeof(struct ata_command)); 394 395 if (drvp->drive_flags & DRIVE_ATA) { 396 ata_c.r_command = WDCC_IDENTIFY; 397 ata_c.r_st_bmask = WDCS_DRDY; 398 ata_c.r_st_pmask = 0; 399 ata_c.timeout = 3000; /* 3s */ 400 } else if (drvp->drive_flags & DRIVE_ATAPI) { 401 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 402 ata_c.r_st_bmask = 0; 403 ata_c.r_st_pmask = 0; 404 ata_c.timeout = 10000; /* 10s */ 405 } else { 406 WDCDEBUG_PRINT(("ata_get_parms: no disks\n"), 407 DEBUG_FUNCS|DEBUG_PROBE); 408 return CMD_ERR; 409 } 410 ata_c.flags = AT_READ | flags; 411 ata_c.data = tb; 412 ata_c.bcount = DEV_BSIZE; 413 if (wdc_exec_command(drvp, &ata_c) != ATACMD_COMPLETE) { 414 WDCDEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 415 DEBUG_FUNCS|DEBUG_PROBE); 416 return CMD_AGAIN; 417 } 418 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 419 WDCDEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 420 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 421 return CMD_ERR; 422 } else { 423 /* if we didn't read any data something is wrong */ 424 if ((ata_c.flags & AT_XFDONE) == 0) 425 return CMD_ERR; 426 /* Read in parameter block. */ 427 memcpy(prms, tb, sizeof(struct ataparams)); 428 #if BYTE_ORDER == LITTLE_ENDIAN 429 /* 430 * Shuffle string byte order. 431 * ATAPI Mitsumi and NEC drives don't need this. 432 */ 433 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 434 WDC_CFG_ATAPI && 435 ((prms->atap_model[0] == 'N' && 436 prms->atap_model[1] == 'E') || 437 (prms->atap_model[0] == 'F' && 438 prms->atap_model[1] == 'X'))) 439 return 0; 440 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 441 p = (u_short *)(prms->atap_model + i); 442 *p = ntohs(*p); 443 } 444 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 445 p = (u_short *)(prms->atap_serial + i); 446 *p = ntohs(*p); 447 } 448 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 449 p = (u_short *)(prms->atap_revision + i); 450 *p = ntohs(*p); 451 } 452 #endif 453 return CMD_OK; 454 } 455 } 456 457 int 458 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 459 { 460 struct ata_command ata_c; 461 462 WDCDEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 463 memset(&ata_c, 0, sizeof(struct ata_command)); 464 465 ata_c.r_command = SET_FEATURES; 466 ata_c.r_st_bmask = 0; 467 ata_c.r_st_pmask = 0; 468 ata_c.r_features = WDSF_SET_MODE; 469 ata_c.r_count = mode; 470 ata_c.flags = flags; 471 ata_c.timeout = 1000; /* 1s */ 472 if (wdc_exec_command(drvp, &ata_c) != ATACMD_COMPLETE) 473 return CMD_AGAIN; 474 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 475 return CMD_ERR; 476 } 477 return CMD_OK; 478 } 479 480 void 481 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 482 { 483 /* 484 * Downgrade decision: if we get NERRS_MAX in NXFER. 485 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 486 * first error within the first NXFER ops will immediatly trigger 487 * a downgrade. 488 * If we got an error and n_xfers is bigger than NXFER reset counters. 489 */ 490 drvp->n_dmaerrs++; 491 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 492 ata_downgrade_mode(drvp, flags); 493 drvp->n_dmaerrs = NERRS_MAX-1; 494 drvp->n_xfers = 0; 495 return; 496 } 497 if (drvp->n_xfers > NXFER) { 498 drvp->n_dmaerrs = 1; /* just got an error */ 499 drvp->n_xfers = 1; /* restart counting from this error */ 500 } 501 } 502 503 struct ata_xfer * 504 ata_get_xfer(int flags) 505 { 506 struct ata_xfer *xfer; 507 int s; 508 509 s = splbio(); 510 xfer = pool_get(&ata_xfer_pool, 511 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 512 splx(s); 513 if (xfer != NULL) { 514 memset(xfer, 0, sizeof(struct ata_xfer)); 515 } 516 return xfer; 517 } 518 519 void 520 ata_free_xfer(struct wdc_channel *chp, struct ata_xfer *xfer) 521 { 522 struct wdc_softc *wdc = chp->ch_wdc; 523 int s; 524 525 if (wdc->cap & WDC_CAPABILITY_HWLOCK) 526 (*wdc->free_hw)(chp); 527 s = splbio(); 528 pool_put(&ata_xfer_pool, xfer); 529 splx(s); 530 } 531 532 void 533 ata_print_modes(struct wdc_channel *chp) 534 { 535 struct wdc_softc *wdc = chp->ch_wdc; 536 int drive; 537 struct ata_drive_datas *drvp; 538 539 for (drive = 0; drive < 2; drive++) { 540 drvp = &chp->ch_drive[drive]; 541 if ((drvp->drive_flags & DRIVE) == 0) 542 continue; 543 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 544 drvp->drv_softc->dv_xname, 545 wdc->sc_dev.dv_xname, 546 chp->ch_channel, drive, drvp->PIO_mode); 547 if (drvp->drive_flags & DRIVE_DMA) 548 aprint_normal(", DMA mode %d", drvp->DMA_mode); 549 if (drvp->drive_flags & DRIVE_UDMA) { 550 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 551 if (drvp->UDMA_mode == 2) 552 aprint_normal(" (Ultra/33)"); 553 else if (drvp->UDMA_mode == 4) 554 aprint_normal(" (Ultra/66)"); 555 else if (drvp->UDMA_mode == 5) 556 aprint_normal(" (Ultra/100)"); 557 else if (drvp->UDMA_mode == 6) 558 aprint_normal(" (Ultra/133)"); 559 } 560 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 561 aprint_normal(" (using DMA data transfers)"); 562 aprint_normal("\n"); 563 } 564 } 565 566 /* 567 * downgrade the transfer mode of a drive after an error. return 1 if 568 * downgrade was possible, 0 otherwise. 569 */ 570 int 571 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 572 { 573 struct wdc_channel *chp = drvp->chnl_softc; 574 struct wdc_softc *wdc = chp->ch_wdc; 575 struct device *drv_dev = drvp->drv_softc; 576 int cf_flags = drv_dev->dv_cfdata->cf_flags; 577 578 /* if drive or controller don't know its mode, we can't do much */ 579 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 580 (wdc->cap & WDC_CAPABILITY_MODE) == 0) 581 return 0; 582 /* current drive mode was set by a config flag, let it this way */ 583 if ((cf_flags & ATA_CONFIG_PIO_SET) || 584 (cf_flags & ATA_CONFIG_DMA_SET) || 585 (cf_flags & ATA_CONFIG_UDMA_SET)) 586 return 0; 587 588 /* 589 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 590 */ 591 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 592 drvp->UDMA_mode--; 593 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 594 drv_dev->dv_xname, drvp->UDMA_mode); 595 } 596 597 /* 598 * If we were using ultra-DMA, don't downgrade to multiword DMA. 599 */ 600 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 601 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 602 drvp->PIO_mode = drvp->PIO_cap; 603 printf("%s: transfer error, downgrading to PIO mode %d\n", 604 drv_dev->dv_xname, drvp->PIO_mode); 605 } else /* already using PIO, can't downgrade */ 606 return 0; 607 608 wdc->set_modes(chp); 609 ata_print_modes(chp); 610 /* reset the channel, which will shedule all drives for setup */ 611 wdc_reset_channel(chp, flags | AT_RST_NOCMD); 612 return 1; 613 } 614 615 /* 616 * Probe drive's capabilities, for use by the controller later 617 * Assumes drvp points to an existing drive. 618 */ 619 void 620 ata_probe_caps(struct ata_drive_datas *drvp) 621 { 622 struct ataparams params, params2; 623 struct wdc_channel *chp = drvp->chnl_softc; 624 struct wdc_softc *wdc = chp->ch_wdc; 625 struct device *drv_dev = drvp->drv_softc; 626 int i, printed; 627 char *sep = ""; 628 int cf_flags; 629 630 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 631 /* IDENTIFY failed. Can't tell more about the device */ 632 return; 633 } 634 if ((wdc->cap & (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) == 635 (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) { 636 /* 637 * Controller claims 16 and 32 bit transfers. 638 * Re-do an IDENTIFY with 32-bit transfers, 639 * and compare results. 640 */ 641 drvp->drive_flags |= DRIVE_CAP32; 642 ata_get_params(drvp, AT_WAIT, ¶ms2); 643 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 644 /* Not good. fall back to 16bits */ 645 drvp->drive_flags &= ~DRIVE_CAP32; 646 } else { 647 aprint_normal("%s: 32-bit data port\n", 648 drv_dev->dv_xname); 649 } 650 } 651 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 652 if (params.atap_ata_major > 0x01 && 653 params.atap_ata_major != 0xffff) { 654 for (i = 14; i > 0; i--) { 655 if (params.atap_ata_major & (1 << i)) { 656 aprint_normal("%s: ATA version %d\n", 657 drv_dev->dv_xname, i); 658 drvp->ata_vers = i; 659 break; 660 } 661 } 662 } 663 #endif 664 665 /* An ATAPI device is at last PIO mode 3 */ 666 if (drvp->drive_flags & DRIVE_ATAPI) 667 drvp->PIO_mode = 3; 668 669 /* 670 * It's not in the specs, but it seems that some drive 671 * returns 0xffff in atap_extensions when this field is invalid 672 */ 673 if (params.atap_extensions != 0xffff && 674 (params.atap_extensions & WDC_EXT_MODES)) { 675 printed = 0; 676 /* 677 * XXX some drives report something wrong here (they claim to 678 * support PIO mode 8 !). As mode is coded on 3 bits in 679 * SET FEATURE, limit it to 7 (so limit i to 4). 680 * If higher mode than 7 is found, abort. 681 */ 682 for (i = 7; i >= 0; i--) { 683 if ((params.atap_piomode_supp & (1 << i)) == 0) 684 continue; 685 if (i > 4) 686 return; 687 /* 688 * See if mode is accepted. 689 * If the controller can't set its PIO mode, 690 * assume the defaults are good, so don't try 691 * to set it 692 */ 693 if ((wdc->cap & WDC_CAPABILITY_MODE) != 0) 694 /* 695 * It's OK to pool here, it's fast enouth 696 * to not bother waiting for interrupt 697 */ 698 if (ata_set_mode(drvp, 0x08 | (i + 3), 699 AT_WAIT) != CMD_OK) 700 continue; 701 if (!printed) { 702 aprint_normal("%s: drive supports PIO mode %d", 703 drv_dev->dv_xname, i + 3); 704 sep = ","; 705 printed = 1; 706 } 707 /* 708 * If controller's driver can't set its PIO mode, 709 * get the highter one for the drive. 710 */ 711 if ((wdc->cap & WDC_CAPABILITY_MODE) == 0 || 712 wdc->PIO_cap >= i + 3) { 713 drvp->PIO_mode = i + 3; 714 drvp->PIO_cap = i + 3; 715 break; 716 } 717 } 718 if (!printed) { 719 /* 720 * We didn't find a valid PIO mode. 721 * Assume the values returned for DMA are buggy too 722 */ 723 return; 724 } 725 drvp->drive_flags |= DRIVE_MODE; 726 printed = 0; 727 for (i = 7; i >= 0; i--) { 728 if ((params.atap_dmamode_supp & (1 << i)) == 0) 729 continue; 730 if ((wdc->cap & WDC_CAPABILITY_DMA) && 731 (wdc->cap & WDC_CAPABILITY_MODE)) 732 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 733 != CMD_OK) 734 continue; 735 if (!printed) { 736 aprint_normal("%s DMA mode %d", sep, i); 737 sep = ","; 738 printed = 1; 739 } 740 if (wdc->cap & WDC_CAPABILITY_DMA) { 741 if ((wdc->cap & WDC_CAPABILITY_MODE) && 742 wdc->DMA_cap < i) 743 continue; 744 drvp->DMA_mode = i; 745 drvp->DMA_cap = i; 746 drvp->drive_flags |= DRIVE_DMA; 747 } 748 break; 749 } 750 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 751 printed = 0; 752 for (i = 7; i >= 0; i--) { 753 if ((params.atap_udmamode_supp & (1 << i)) 754 == 0) 755 continue; 756 if ((wdc->cap & WDC_CAPABILITY_MODE) && 757 (wdc->cap & WDC_CAPABILITY_UDMA)) 758 if (ata_set_mode(drvp, 0x40 | i, 759 AT_WAIT) != CMD_OK) 760 continue; 761 if (!printed) { 762 aprint_normal("%s Ultra-DMA mode %d", 763 sep, i); 764 if (i == 2) 765 aprint_normal(" (Ultra/33)"); 766 else if (i == 4) 767 aprint_normal(" (Ultra/66)"); 768 else if (i == 5) 769 aprint_normal(" (Ultra/100)"); 770 else if (i == 6) 771 aprint_normal(" (Ultra/133)"); 772 sep = ","; 773 printed = 1; 774 } 775 if (wdc->cap & WDC_CAPABILITY_UDMA) { 776 if ((wdc->cap & WDC_CAPABILITY_MODE) && 777 wdc->UDMA_cap < i) 778 continue; 779 drvp->UDMA_mode = i; 780 drvp->UDMA_cap = i; 781 drvp->drive_flags |= DRIVE_UDMA; 782 } 783 break; 784 } 785 } 786 aprint_normal("\n"); 787 } 788 789 drvp->drive_flags &= ~DRIVE_NOSTREAM; 790 if (drvp->drive_flags & DRIVE_ATAPI) { 791 if (wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM) 792 drvp->drive_flags |= DRIVE_NOSTREAM; 793 } else { 794 if (wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM) 795 drvp->drive_flags |= DRIVE_NOSTREAM; 796 } 797 798 /* Try to guess ATA version here, if it didn't get reported */ 799 if (drvp->ata_vers == 0) { 800 if (drvp->drive_flags & DRIVE_UDMA) 801 drvp->ata_vers = 4; /* should be at last ATA-4 */ 802 else if (drvp->PIO_cap > 2) 803 drvp->ata_vers = 2; /* should be at last ATA-2 */ 804 } 805 cf_flags = drv_dev->dv_cfdata->cf_flags; 806 if (cf_flags & ATA_CONFIG_PIO_SET) { 807 drvp->PIO_mode = 808 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 809 drvp->drive_flags |= DRIVE_MODE; 810 } 811 if ((wdc->cap & WDC_CAPABILITY_DMA) == 0) { 812 /* don't care about DMA modes */ 813 return; 814 } 815 if (cf_flags & ATA_CONFIG_DMA_SET) { 816 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 817 ATA_CONFIG_DMA_DISABLE) { 818 drvp->drive_flags &= ~DRIVE_DMA; 819 } else { 820 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 821 ATA_CONFIG_DMA_OFF; 822 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 823 } 824 } 825 if ((wdc->cap & WDC_CAPABILITY_UDMA) == 0) { 826 /* don't care about UDMA modes */ 827 return; 828 } 829 if (cf_flags & ATA_CONFIG_UDMA_SET) { 830 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 831 ATA_CONFIG_UDMA_DISABLE) { 832 drvp->drive_flags &= ~DRIVE_UDMA; 833 } else { 834 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 835 ATA_CONFIG_UDMA_OFF; 836 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 837 } 838 } 839 } 840 841 /* management of the /dev/atabus* devices */ 842 int atabusopen(dev, flag, fmt, p) 843 dev_t dev; 844 int flag, fmt; 845 struct proc *p; 846 { 847 struct atabus_softc *sc; 848 int error, unit = minor(dev); 849 850 if (unit >= atabus_cd.cd_ndevs || 851 (sc = atabus_cd.cd_devs[unit]) == NULL) 852 return (ENXIO); 853 854 if (sc->sc_flags & ATABUSCF_OPEN) 855 return (EBUSY); 856 857 if ((error = wdc_addref(sc->sc_chan)) != 0) 858 return (error); 859 860 sc->sc_flags |= ATABUSCF_OPEN; 861 862 return (0); 863 } 864 865 866 int 867 atabusclose(dev, flag, fmt, p) 868 dev_t dev; 869 int flag, fmt; 870 struct proc *p; 871 { 872 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 873 874 wdc_delref(sc->sc_chan); 875 876 sc->sc_flags &= ~ATABUSCF_OPEN; 877 878 return (0); 879 } 880 881 int 882 atabusioctl(dev, cmd, addr, flag, p) 883 dev_t dev; 884 u_long cmd; 885 caddr_t addr; 886 int flag; 887 struct proc *p; 888 { 889 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 890 struct wdc_channel *chp = sc->sc_chan; 891 int min_drive, max_drive, drive; 892 int error; 893 int s; 894 895 /* 896 * Enforce write permission for ioctls that change the 897 * state of the bus. Host adapter specific ioctls must 898 * be checked by the adapter driver. 899 */ 900 switch (cmd) { 901 case ATABUSIOSCAN: 902 case ATABUSIODETACH: 903 case ATABUSIORESET: 904 if ((flag & FWRITE) == 0) 905 return (EBADF); 906 } 907 908 switch (cmd) { 909 case ATABUSIORESET: 910 s = splbio(); 911 wdc_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 912 splx(s); 913 error = 0; 914 break; 915 case ATABUSIOSCAN: 916 { 917 #if 0 918 struct atabusioscan_args *a= 919 (struct atabusioscan_args *)addr; 920 #endif 921 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 922 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 923 return (EOPNOTSUPP); 924 return (EOPNOTSUPP); 925 } 926 case ATABUSIODETACH: 927 { 928 struct atabusioscan_args *a= 929 (struct atabusioscan_args *)addr; 930 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 931 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 932 return (EOPNOTSUPP); 933 switch (a->at_dev) { 934 case -1: 935 min_drive = 0; 936 max_drive = 1; 937 break; 938 case 0: 939 case 1: 940 min_drive = max_drive = a->at_dev; 941 break; 942 default: 943 return (EINVAL); 944 } 945 for (drive = min_drive; drive <= max_drive; drive++) { 946 if (chp->ch_drive[drive].drv_softc != NULL) { 947 error = config_detach( 948 chp->ch_drive[drive].drv_softc, 0); 949 if (error) 950 return (error); 951 chp->ch_drive[drive].drv_softc = NULL; 952 } 953 } 954 error = 0; 955 break; 956 } 957 default: 958 error = ENOTTY; 959 } 960 return (error); 961 }; 962
Indexes created Tue Sep 23 07:09:52 GMT 2025