ata.c revision 1.44
1 /* $NetBSD: ata.c,v 1.44 2004/08/13 02:10:43 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.44 2004/08/13 02:10:43 thorpej Exp $"); 34 35 #ifndef WDCDEBUG 36 #define WDCDEBUG 37 #endif /* WDCDEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/malloc.h> 43 #include <sys/device.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/proc.h> 47 #include <sys/pool.h> 48 #include <sys/kthread.h> 49 #include <sys/errno.h> 50 #include <sys/ataio.h> 51 52 #include <machine/intr.h> 53 #include <machine/bus.h> 54 55 #include <dev/ata/atareg.h> 56 #include <dev/ata/atavar.h> 57 #include <dev/ic/wdcreg.h> 58 #include <dev/ic/wdcvar.h> 59 60 #include "locators.h" 61 62 #define DEBUG_FUNCS 0x08 63 #define DEBUG_PROBE 0x10 64 #define DEBUG_DETACH 0x20 65 #define DEBUG_XFERS 0x40 66 #ifdef WDCDEBUG 67 extern int wdcdebug_mask; /* init'ed in wdc.c */ 68 #define WDCDEBUG_PRINT(args, level) \ 69 if (wdcdebug_mask & (level)) \ 70 printf args 71 #else 72 #define WDCDEBUG_PRINT(args, level) 73 #endif 74 75 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL); 76 77 /***************************************************************************** 78 * ATA bus layer. 79 * 80 * ATA controllers attach an atabus instance, which handles probing the bus 81 * for drives, etc. 82 *****************************************************************************/ 83 84 dev_type_open(atabusopen); 85 dev_type_close(atabusclose); 86 dev_type_ioctl(atabusioctl); 87 88 const struct cdevsw atabus_cdevsw = { 89 atabusopen, atabusclose, noread, nowrite, atabusioctl, 90 nostop, notty, nopoll, nommap, nokqfilter, 91 }; 92 93 extern struct cfdriver atabus_cd; 94 95 96 /* 97 * atabusprint: 98 * 99 * Autoconfiguration print routine used by ATA controllers when 100 * attaching an atabus instance. 101 */ 102 int 103 atabusprint(void *aux, const char *pnp) 104 { 105 struct wdc_channel *chan = aux; 106 107 if (pnp) 108 aprint_normal("atabus at %s", pnp); 109 aprint_normal(" channel %d", chan->ch_channel); 110 111 return (UNCONF); 112 } 113 114 /* 115 * ataprint: 116 * 117 * Autoconfiguration print routine. 118 */ 119 int 120 ataprint(void *aux, const char *pnp) 121 { 122 struct ata_device *adev = aux; 123 124 if (pnp) 125 aprint_normal("wd at %s", pnp); 126 aprint_normal(" drive %d", adev->adev_drv_data->drive); 127 128 return (UNCONF); 129 } 130 131 /* 132 * atabus_thread: 133 * 134 * Worker thread for the ATA bus. 135 */ 136 static void 137 atabus_thread(void *arg) 138 { 139 struct atabus_softc *sc = arg; 140 struct wdc_channel *chp = sc->sc_chan; 141 struct ata_xfer *xfer; 142 int s; 143 144 s = splbio(); 145 chp->ch_flags |= WDCF_TH_RUN; 146 splx(s); 147 148 /* Configure the devices on the bus. */ 149 atabusconfig(sc); 150 151 for (;;) { 152 s = splbio(); 153 if ((chp->ch_flags & (WDCF_TH_RESET | WDCF_SHUTDOWN)) == 0 && 154 (chp->ch_queue->active_xfer == NULL || 155 chp->ch_queue->queue_freeze == 0)) { 156 chp->ch_flags &= ~WDCF_TH_RUN; 157 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0); 158 chp->ch_flags |= WDCF_TH_RUN; 159 } 160 splx(s); 161 if (chp->ch_flags & WDCF_SHUTDOWN) 162 break; 163 s = splbio(); 164 if (chp->ch_flags & WDCF_TH_RESET) { 165 /* 166 * wdc_reset_channel() will freeze 2 times, so 167 * unfreeze one time. Not a problem as we're at splbio 168 */ 169 chp->ch_queue->queue_freeze--; 170 wdc_reset_channel(chp, AT_WAIT | chp->ch_reset_flags); 171 } else if (chp->ch_queue->active_xfer != NULL && 172 chp->ch_queue->queue_freeze == 1) { 173 /* 174 * Caller has bumped queue_freeze, decrease it. 175 */ 176 chp->ch_queue->queue_freeze--; 177 xfer = chp->ch_queue->active_xfer; 178 KASSERT(xfer != NULL); 179 (*xfer->c_start)(chp, xfer); 180 } else if (chp->ch_queue->queue_freeze > 1) 181 panic("ata_thread: queue_freeze"); 182 splx(s); 183 } 184 chp->ch_thread = NULL; 185 wakeup((void *)&chp->ch_flags); 186 kthread_exit(0); 187 } 188 189 /* 190 * atabus_create_thread: 191 * 192 * Helper routine to create the ATA bus worker thread. 193 */ 194 static void 195 atabus_create_thread(void *arg) 196 { 197 struct atabus_softc *sc = arg; 198 struct wdc_channel *chp = sc->sc_chan; 199 int error; 200 201 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread, 202 "%s", sc->sc_dev.dv_xname)) != 0) 203 aprint_error("%s: unable to create kernel thread: error %d\n", 204 sc->sc_dev.dv_xname, error); 205 } 206 207 /* 208 * atabus_match: 209 * 210 * Autoconfiguration match routine. 211 */ 212 static int 213 atabus_match(struct device *parent, struct cfdata *cf, void *aux) 214 { 215 struct wdc_channel *chp = aux; 216 217 if (chp == NULL) 218 return (0); 219 220 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel && 221 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT) 222 return (0); 223 224 return (1); 225 } 226 227 /* 228 * atabus_attach: 229 * 230 * Autoconfiguration attach routine. 231 */ 232 static void 233 atabus_attach(struct device *parent, struct device *self, void *aux) 234 { 235 struct atabus_softc *sc = (void *) self; 236 struct wdc_channel *chp = aux; 237 struct atabus_initq *initq; 238 239 sc->sc_chan = chp; 240 241 aprint_normal("\n"); 242 aprint_naive("\n"); 243 244 if (ata_addref(chp)) 245 return; 246 247 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK); 248 initq->atabus_sc = sc; 249 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq); 250 config_pending_incr(); 251 kthread_create(atabus_create_thread, sc); 252 } 253 254 /* 255 * atabus_activate: 256 * 257 * Autoconfiguration activation routine. 258 */ 259 static int 260 atabus_activate(struct device *self, enum devact act) 261 { 262 struct atabus_softc *sc = (void *) self; 263 struct wdc_channel *chp = sc->sc_chan; 264 struct device *dev = NULL; 265 int s, i, error = 0; 266 267 s = splbio(); 268 switch (act) { 269 case DVACT_ACTIVATE: 270 error = EOPNOTSUPP; 271 break; 272 273 case DVACT_DEACTIVATE: 274 /* 275 * We might deactivate the children of atapibus twice 276 * (once bia atapibus, once directly), but since the 277 * generic autoconfiguration code maintains the DVF_ACTIVE 278 * flag, it's safe. 279 */ 280 if ((dev = chp->atapibus) != NULL) { 281 error = config_deactivate(dev); 282 if (error) 283 goto out; 284 } 285 286 for (i = 0; i < 2; i++) { 287 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 288 WDCDEBUG_PRINT(("atabus_activate: %s: " 289 "deactivating %s\n", sc->sc_dev.dv_xname, 290 dev->dv_xname), 291 DEBUG_DETACH); 292 error = config_deactivate(dev); 293 if (error) 294 goto out; 295 } 296 } 297 break; 298 } 299 out: 300 splx(s); 301 302 #ifdef WDCDEBUG 303 if (dev != NULL && error != 0) 304 WDCDEBUG_PRINT(("atabus_activate: %s: " 305 "error %d deactivating %s\n", sc->sc_dev.dv_xname, 306 error, dev->dv_xname), DEBUG_DETACH); 307 #endif /* WDCDEBUG */ 308 309 return (error); 310 } 311 312 /* 313 * atabus_detach: 314 * 315 * Autoconfiguration detach routine. 316 */ 317 static int 318 atabus_detach(struct device *self, int flags) 319 { 320 struct atabus_softc *sc = (void *) self; 321 struct wdc_channel *chp = sc->sc_chan; 322 struct device *dev = NULL; 323 int i, error = 0; 324 325 /* Shutdown the channel. */ 326 /* XXX NEED AN INTERLOCK HERE. */ 327 chp->ch_flags |= WDCF_SHUTDOWN; 328 wakeup(&chp->ch_thread); 329 while (chp->ch_thread != NULL) 330 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0); 331 332 /* 333 * Detach atapibus and its children. 334 */ 335 if ((dev = chp->atapibus) != NULL) { 336 WDCDEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 337 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH); 338 error = config_detach(dev, flags); 339 if (error) 340 goto out; 341 } 342 343 /* 344 * Detach our other children. 345 */ 346 for (i = 0; i < 2; i++) { 347 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) 348 continue; 349 if ((dev = chp->ch_drive[i].drv_softc) != NULL) { 350 WDCDEBUG_PRINT(("atabus_detach: %s: detaching %s\n", 351 sc->sc_dev.dv_xname, dev->dv_xname), 352 DEBUG_DETACH); 353 error = config_detach(dev, flags); 354 if (error) 355 goto out; 356 } 357 } 358 359 out: 360 #ifdef WDCDEBUG 361 if (dev != NULL && error != 0) 362 WDCDEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n", 363 sc->sc_dev.dv_xname, error, dev->dv_xname), 364 DEBUG_DETACH); 365 #endif /* WDCDEBUG */ 366 367 return (error); 368 } 369 370 CFATTACH_DECL(atabus, sizeof(struct atabus_softc), 371 atabus_match, atabus_attach, atabus_detach, atabus_activate); 372 373 /***************************************************************************** 374 * Common ATA bus operations. 375 *****************************************************************************/ 376 377 /* Get the disk's parameters */ 378 int 379 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags, 380 struct ataparams *prms) 381 { 382 char tb[DEV_BSIZE]; 383 struct ata_command ata_c; 384 385 #if BYTE_ORDER == LITTLE_ENDIAN 386 int i; 387 u_int16_t *p; 388 #endif 389 390 WDCDEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS); 391 392 memset(tb, 0, DEV_BSIZE); 393 memset(prms, 0, sizeof(struct ataparams)); 394 memset(&ata_c, 0, sizeof(struct ata_command)); 395 396 if (drvp->drive_flags & DRIVE_ATA) { 397 ata_c.r_command = WDCC_IDENTIFY; 398 ata_c.r_st_bmask = WDCS_DRDY; 399 ata_c.r_st_pmask = 0; 400 ata_c.timeout = 3000; /* 3s */ 401 } else if (drvp->drive_flags & DRIVE_ATAPI) { 402 ata_c.r_command = ATAPI_IDENTIFY_DEVICE; 403 ata_c.r_st_bmask = 0; 404 ata_c.r_st_pmask = 0; 405 ata_c.timeout = 10000; /* 10s */ 406 } else { 407 WDCDEBUG_PRINT(("ata_get_parms: no disks\n"), 408 DEBUG_FUNCS|DEBUG_PROBE); 409 return CMD_ERR; 410 } 411 ata_c.flags = AT_READ | flags; 412 ata_c.data = tb; 413 ata_c.bcount = DEV_BSIZE; 414 if (wdc_exec_command(drvp, &ata_c) != ATACMD_COMPLETE) { 415 WDCDEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"), 416 DEBUG_FUNCS|DEBUG_PROBE); 417 return CMD_AGAIN; 418 } 419 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 420 WDCDEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n", 421 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE); 422 return CMD_ERR; 423 } else { 424 /* if we didn't read any data something is wrong */ 425 if ((ata_c.flags & AT_XFDONE) == 0) 426 return CMD_ERR; 427 /* Read in parameter block. */ 428 memcpy(prms, tb, sizeof(struct ataparams)); 429 #if BYTE_ORDER == LITTLE_ENDIAN 430 /* 431 * Shuffle string byte order. 432 * ATAPI Mitsumi and NEC drives don't need this. 433 */ 434 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) == 435 WDC_CFG_ATAPI && 436 ((prms->atap_model[0] == 'N' && 437 prms->atap_model[1] == 'E') || 438 (prms->atap_model[0] == 'F' && 439 prms->atap_model[1] == 'X'))) 440 return 0; 441 for (i = 0; i < sizeof(prms->atap_model); i += 2) { 442 p = (u_short *)(prms->atap_model + i); 443 *p = ntohs(*p); 444 } 445 for (i = 0; i < sizeof(prms->atap_serial); i += 2) { 446 p = (u_short *)(prms->atap_serial + i); 447 *p = ntohs(*p); 448 } 449 for (i = 0; i < sizeof(prms->atap_revision); i += 2) { 450 p = (u_short *)(prms->atap_revision + i); 451 *p = ntohs(*p); 452 } 453 #endif 454 return CMD_OK; 455 } 456 } 457 458 int 459 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags) 460 { 461 struct ata_command ata_c; 462 463 WDCDEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS); 464 memset(&ata_c, 0, sizeof(struct ata_command)); 465 466 ata_c.r_command = SET_FEATURES; 467 ata_c.r_st_bmask = 0; 468 ata_c.r_st_pmask = 0; 469 ata_c.r_features = WDSF_SET_MODE; 470 ata_c.r_count = mode; 471 ata_c.flags = flags; 472 ata_c.timeout = 1000; /* 1s */ 473 if (wdc_exec_command(drvp, &ata_c) != ATACMD_COMPLETE) 474 return CMD_AGAIN; 475 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 476 return CMD_ERR; 477 } 478 return CMD_OK; 479 } 480 481 void 482 ata_dmaerr(struct ata_drive_datas *drvp, int flags) 483 { 484 /* 485 * Downgrade decision: if we get NERRS_MAX in NXFER. 486 * We start with n_dmaerrs set to NERRS_MAX-1 so that the 487 * first error within the first NXFER ops will immediatly trigger 488 * a downgrade. 489 * If we got an error and n_xfers is bigger than NXFER reset counters. 490 */ 491 drvp->n_dmaerrs++; 492 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) { 493 ata_downgrade_mode(drvp, flags); 494 drvp->n_dmaerrs = NERRS_MAX-1; 495 drvp->n_xfers = 0; 496 return; 497 } 498 if (drvp->n_xfers > NXFER) { 499 drvp->n_dmaerrs = 1; /* just got an error */ 500 drvp->n_xfers = 1; /* restart counting from this error */ 501 } 502 } 503 504 /* 505 * Add a command to the queue and start controller. Must be called at splbio 506 */ 507 void 508 ata_exec_xfer(struct wdc_channel *chp, struct ata_xfer *xfer) 509 { 510 511 WDCDEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer, 512 chp->ch_channel, xfer->c_drive), DEBUG_XFERS); 513 514 /* complete xfer setup */ 515 xfer->c_chp = chp; 516 517 /* insert at the end of command list */ 518 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 519 WDCDEBUG_PRINT(("wdcstart from ata_exec_xfer, flags 0x%x\n", 520 chp->ch_flags), DEBUG_XFERS); 521 wdcstart(chp); 522 } 523 524 struct ata_xfer * 525 ata_get_xfer(int flags) 526 { 527 struct ata_xfer *xfer; 528 int s; 529 530 s = splbio(); 531 xfer = pool_get(&ata_xfer_pool, 532 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK)); 533 splx(s); 534 if (xfer != NULL) { 535 memset(xfer, 0, sizeof(struct ata_xfer)); 536 } 537 return xfer; 538 } 539 540 void 541 ata_free_xfer(struct wdc_channel *chp, struct ata_xfer *xfer) 542 { 543 struct wdc_softc *wdc = chp->ch_wdc; 544 int s; 545 546 if (wdc->cap & WDC_CAPABILITY_HWLOCK) 547 (*wdc->free_hw)(chp); 548 s = splbio(); 549 pool_put(&ata_xfer_pool, xfer); 550 splx(s); 551 } 552 553 /* 554 * Kill off all pending xfers for a wdc_channel. 555 * 556 * Must be called at splbio(). 557 */ 558 void 559 ata_kill_pending(struct ata_drive_datas *drvp) 560 { 561 struct wdc_channel *chp = drvp->chnl_softc; 562 struct ata_xfer *xfer, *next_xfer; 563 int s = splbio(); 564 565 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer); 566 xfer != NULL; xfer = next_xfer) { 567 next_xfer = TAILQ_NEXT(xfer, c_xferchain); 568 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive) 569 continue; 570 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain); 571 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE); 572 } 573 574 while ((xfer = chp->ch_queue->active_xfer) != NULL) { 575 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) { 576 drvp->drive_flags |= DRIVE_WAITDRAIN; 577 (void) tsleep(&chp->ch_queue->active_xfer, 578 PRIBIO, "atdrn", 0); 579 } else { 580 /* no more xfer for us */ 581 break; 582 } 583 } 584 splx(s); 585 } 586 587 int 588 ata_addref(struct wdc_channel *chp) 589 { 590 struct wdc_softc *wdc = chp->ch_wdc; 591 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic; 592 int s, error = 0; 593 594 s = splbio(); 595 if (adapt->adapt_refcnt++ == 0 && 596 adapt->adapt_enable != NULL) { 597 error = (*adapt->adapt_enable)(&wdc->sc_dev, 1); 598 if (error) 599 adapt->adapt_refcnt--; 600 } 601 splx(s); 602 return (error); 603 } 604 605 void 606 ata_delref(struct wdc_channel *chp) 607 { 608 struct wdc_softc *wdc = chp->ch_wdc; 609 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic; 610 int s; 611 612 s = splbio(); 613 if (adapt->adapt_refcnt-- == 1 && 614 adapt->adapt_enable != NULL) 615 (void) (*adapt->adapt_enable)(&wdc->sc_dev, 0); 616 splx(s); 617 } 618 619 void 620 ata_print_modes(struct wdc_channel *chp) 621 { 622 struct wdc_softc *wdc = chp->ch_wdc; 623 int drive; 624 struct ata_drive_datas *drvp; 625 626 for (drive = 0; drive < 2; drive++) { 627 drvp = &chp->ch_drive[drive]; 628 if ((drvp->drive_flags & DRIVE) == 0) 629 continue; 630 aprint_normal("%s(%s:%d:%d): using PIO mode %d", 631 drvp->drv_softc->dv_xname, 632 wdc->sc_dev.dv_xname, 633 chp->ch_channel, drive, drvp->PIO_mode); 634 if (drvp->drive_flags & DRIVE_DMA) 635 aprint_normal(", DMA mode %d", drvp->DMA_mode); 636 if (drvp->drive_flags & DRIVE_UDMA) { 637 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode); 638 if (drvp->UDMA_mode == 2) 639 aprint_normal(" (Ultra/33)"); 640 else if (drvp->UDMA_mode == 4) 641 aprint_normal(" (Ultra/66)"); 642 else if (drvp->UDMA_mode == 5) 643 aprint_normal(" (Ultra/100)"); 644 else if (drvp->UDMA_mode == 6) 645 aprint_normal(" (Ultra/133)"); 646 } 647 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) 648 aprint_normal(" (using DMA data transfers)"); 649 aprint_normal("\n"); 650 } 651 } 652 653 /* 654 * downgrade the transfer mode of a drive after an error. return 1 if 655 * downgrade was possible, 0 otherwise. 656 */ 657 int 658 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags) 659 { 660 struct wdc_channel *chp = drvp->chnl_softc; 661 struct wdc_softc *wdc = chp->ch_wdc; 662 struct device *drv_dev = drvp->drv_softc; 663 int cf_flags = drv_dev->dv_cfdata->cf_flags; 664 665 /* if drive or controller don't know its mode, we can't do much */ 666 if ((drvp->drive_flags & DRIVE_MODE) == 0 || 667 (wdc->cap & WDC_CAPABILITY_MODE) == 0) 668 return 0; 669 /* current drive mode was set by a config flag, let it this way */ 670 if ((cf_flags & ATA_CONFIG_PIO_SET) || 671 (cf_flags & ATA_CONFIG_DMA_SET) || 672 (cf_flags & ATA_CONFIG_UDMA_SET)) 673 return 0; 674 675 /* 676 * If we were using Ultra-DMA mode, downgrade to the next lower mode. 677 */ 678 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) { 679 drvp->UDMA_mode--; 680 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n", 681 drv_dev->dv_xname, drvp->UDMA_mode); 682 } 683 684 /* 685 * If we were using ultra-DMA, don't downgrade to multiword DMA. 686 */ 687 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { 688 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA); 689 drvp->PIO_mode = drvp->PIO_cap; 690 printf("%s: transfer error, downgrading to PIO mode %d\n", 691 drv_dev->dv_xname, drvp->PIO_mode); 692 } else /* already using PIO, can't downgrade */ 693 return 0; 694 695 wdc->set_modes(chp); 696 ata_print_modes(chp); 697 /* reset the channel, which will shedule all drives for setup */ 698 wdc_reset_channel(chp, flags | AT_RST_NOCMD); 699 return 1; 700 } 701 702 /* 703 * Probe drive's capabilities, for use by the controller later 704 * Assumes drvp points to an existing drive. 705 */ 706 void 707 ata_probe_caps(struct ata_drive_datas *drvp) 708 { 709 struct ataparams params, params2; 710 struct wdc_channel *chp = drvp->chnl_softc; 711 struct wdc_softc *wdc = chp->ch_wdc; 712 struct device *drv_dev = drvp->drv_softc; 713 int i, printed; 714 char *sep = ""; 715 int cf_flags; 716 717 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) { 718 /* IDENTIFY failed. Can't tell more about the device */ 719 return; 720 } 721 if ((wdc->cap & (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) == 722 (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) { 723 /* 724 * Controller claims 16 and 32 bit transfers. 725 * Re-do an IDENTIFY with 32-bit transfers, 726 * and compare results. 727 */ 728 drvp->drive_flags |= DRIVE_CAP32; 729 ata_get_params(drvp, AT_WAIT, ¶ms2); 730 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) { 731 /* Not good. fall back to 16bits */ 732 drvp->drive_flags &= ~DRIVE_CAP32; 733 } else { 734 aprint_normal("%s: 32-bit data port\n", 735 drv_dev->dv_xname); 736 } 737 } 738 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */ 739 if (params.atap_ata_major > 0x01 && 740 params.atap_ata_major != 0xffff) { 741 for (i = 14; i > 0; i--) { 742 if (params.atap_ata_major & (1 << i)) { 743 aprint_normal("%s: ATA version %d\n", 744 drv_dev->dv_xname, i); 745 drvp->ata_vers = i; 746 break; 747 } 748 } 749 } 750 #endif 751 752 /* An ATAPI device is at last PIO mode 3 */ 753 if (drvp->drive_flags & DRIVE_ATAPI) 754 drvp->PIO_mode = 3; 755 756 /* 757 * It's not in the specs, but it seems that some drive 758 * returns 0xffff in atap_extensions when this field is invalid 759 */ 760 if (params.atap_extensions != 0xffff && 761 (params.atap_extensions & WDC_EXT_MODES)) { 762 printed = 0; 763 /* 764 * XXX some drives report something wrong here (they claim to 765 * support PIO mode 8 !). As mode is coded on 3 bits in 766 * SET FEATURE, limit it to 7 (so limit i to 4). 767 * If higher mode than 7 is found, abort. 768 */ 769 for (i = 7; i >= 0; i--) { 770 if ((params.atap_piomode_supp & (1 << i)) == 0) 771 continue; 772 if (i > 4) 773 return; 774 /* 775 * See if mode is accepted. 776 * If the controller can't set its PIO mode, 777 * assume the defaults are good, so don't try 778 * to set it 779 */ 780 if ((wdc->cap & WDC_CAPABILITY_MODE) != 0) 781 /* 782 * It's OK to pool here, it's fast enouth 783 * to not bother waiting for interrupt 784 */ 785 if (ata_set_mode(drvp, 0x08 | (i + 3), 786 AT_WAIT) != CMD_OK) 787 continue; 788 if (!printed) { 789 aprint_normal("%s: drive supports PIO mode %d", 790 drv_dev->dv_xname, i + 3); 791 sep = ","; 792 printed = 1; 793 } 794 /* 795 * If controller's driver can't set its PIO mode, 796 * get the highter one for the drive. 797 */ 798 if ((wdc->cap & WDC_CAPABILITY_MODE) == 0 || 799 wdc->PIO_cap >= i + 3) { 800 drvp->PIO_mode = i + 3; 801 drvp->PIO_cap = i + 3; 802 break; 803 } 804 } 805 if (!printed) { 806 /* 807 * We didn't find a valid PIO mode. 808 * Assume the values returned for DMA are buggy too 809 */ 810 return; 811 } 812 drvp->drive_flags |= DRIVE_MODE; 813 printed = 0; 814 for (i = 7; i >= 0; i--) { 815 if ((params.atap_dmamode_supp & (1 << i)) == 0) 816 continue; 817 if ((wdc->cap & WDC_CAPABILITY_DMA) && 818 (wdc->cap & WDC_CAPABILITY_MODE)) 819 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT) 820 != CMD_OK) 821 continue; 822 if (!printed) { 823 aprint_normal("%s DMA mode %d", sep, i); 824 sep = ","; 825 printed = 1; 826 } 827 if (wdc->cap & WDC_CAPABILITY_DMA) { 828 if ((wdc->cap & WDC_CAPABILITY_MODE) && 829 wdc->DMA_cap < i) 830 continue; 831 drvp->DMA_mode = i; 832 drvp->DMA_cap = i; 833 drvp->drive_flags |= DRIVE_DMA; 834 } 835 break; 836 } 837 if (params.atap_extensions & WDC_EXT_UDMA_MODES) { 838 printed = 0; 839 for (i = 7; i >= 0; i--) { 840 if ((params.atap_udmamode_supp & (1 << i)) 841 == 0) 842 continue; 843 if ((wdc->cap & WDC_CAPABILITY_MODE) && 844 (wdc->cap & WDC_CAPABILITY_UDMA)) 845 if (ata_set_mode(drvp, 0x40 | i, 846 AT_WAIT) != CMD_OK) 847 continue; 848 if (!printed) { 849 aprint_normal("%s Ultra-DMA mode %d", 850 sep, i); 851 if (i == 2) 852 aprint_normal(" (Ultra/33)"); 853 else if (i == 4) 854 aprint_normal(" (Ultra/66)"); 855 else if (i == 5) 856 aprint_normal(" (Ultra/100)"); 857 else if (i == 6) 858 aprint_normal(" (Ultra/133)"); 859 sep = ","; 860 printed = 1; 861 } 862 if (wdc->cap & WDC_CAPABILITY_UDMA) { 863 if ((wdc->cap & WDC_CAPABILITY_MODE) && 864 wdc->UDMA_cap < i) 865 continue; 866 drvp->UDMA_mode = i; 867 drvp->UDMA_cap = i; 868 drvp->drive_flags |= DRIVE_UDMA; 869 } 870 break; 871 } 872 } 873 aprint_normal("\n"); 874 } 875 876 drvp->drive_flags &= ~DRIVE_NOSTREAM; 877 if (drvp->drive_flags & DRIVE_ATAPI) { 878 if (wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM) 879 drvp->drive_flags |= DRIVE_NOSTREAM; 880 } else { 881 if (wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM) 882 drvp->drive_flags |= DRIVE_NOSTREAM; 883 } 884 885 /* Try to guess ATA version here, if it didn't get reported */ 886 if (drvp->ata_vers == 0) { 887 if (drvp->drive_flags & DRIVE_UDMA) 888 drvp->ata_vers = 4; /* should be at last ATA-4 */ 889 else if (drvp->PIO_cap > 2) 890 drvp->ata_vers = 2; /* should be at last ATA-2 */ 891 } 892 cf_flags = drv_dev->dv_cfdata->cf_flags; 893 if (cf_flags & ATA_CONFIG_PIO_SET) { 894 drvp->PIO_mode = 895 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF; 896 drvp->drive_flags |= DRIVE_MODE; 897 } 898 if ((wdc->cap & WDC_CAPABILITY_DMA) == 0) { 899 /* don't care about DMA modes */ 900 return; 901 } 902 if (cf_flags & ATA_CONFIG_DMA_SET) { 903 if ((cf_flags & ATA_CONFIG_DMA_MODES) == 904 ATA_CONFIG_DMA_DISABLE) { 905 drvp->drive_flags &= ~DRIVE_DMA; 906 } else { 907 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >> 908 ATA_CONFIG_DMA_OFF; 909 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE; 910 } 911 } 912 if ((wdc->cap & WDC_CAPABILITY_UDMA) == 0) { 913 /* don't care about UDMA modes */ 914 return; 915 } 916 if (cf_flags & ATA_CONFIG_UDMA_SET) { 917 if ((cf_flags & ATA_CONFIG_UDMA_MODES) == 918 ATA_CONFIG_UDMA_DISABLE) { 919 drvp->drive_flags &= ~DRIVE_UDMA; 920 } else { 921 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >> 922 ATA_CONFIG_UDMA_OFF; 923 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE; 924 } 925 } 926 } 927 928 /* management of the /dev/atabus* devices */ 929 int atabusopen(dev, flag, fmt, p) 930 dev_t dev; 931 int flag, fmt; 932 struct proc *p; 933 { 934 struct atabus_softc *sc; 935 int error, unit = minor(dev); 936 937 if (unit >= atabus_cd.cd_ndevs || 938 (sc = atabus_cd.cd_devs[unit]) == NULL) 939 return (ENXIO); 940 941 if (sc->sc_flags & ATABUSCF_OPEN) 942 return (EBUSY); 943 944 if ((error = ata_addref(sc->sc_chan)) != 0) 945 return (error); 946 947 sc->sc_flags |= ATABUSCF_OPEN; 948 949 return (0); 950 } 951 952 953 int 954 atabusclose(dev, flag, fmt, p) 955 dev_t dev; 956 int flag, fmt; 957 struct proc *p; 958 { 959 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 960 961 ata_delref(sc->sc_chan); 962 963 sc->sc_flags &= ~ATABUSCF_OPEN; 964 965 return (0); 966 } 967 968 int 969 atabusioctl(dev, cmd, addr, flag, p) 970 dev_t dev; 971 u_long cmd; 972 caddr_t addr; 973 int flag; 974 struct proc *p; 975 { 976 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)]; 977 struct wdc_channel *chp = sc->sc_chan; 978 int min_drive, max_drive, drive; 979 int error; 980 int s; 981 982 /* 983 * Enforce write permission for ioctls that change the 984 * state of the bus. Host adapter specific ioctls must 985 * be checked by the adapter driver. 986 */ 987 switch (cmd) { 988 case ATABUSIOSCAN: 989 case ATABUSIODETACH: 990 case ATABUSIORESET: 991 if ((flag & FWRITE) == 0) 992 return (EBADF); 993 } 994 995 switch (cmd) { 996 case ATABUSIORESET: 997 s = splbio(); 998 wdc_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL); 999 splx(s); 1000 error = 0; 1001 break; 1002 case ATABUSIOSCAN: 1003 { 1004 #if 0 1005 struct atabusioscan_args *a= 1006 (struct atabusioscan_args *)addr; 1007 #endif 1008 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1009 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1010 return (EOPNOTSUPP); 1011 return (EOPNOTSUPP); 1012 } 1013 case ATABUSIODETACH: 1014 { 1015 struct atabusioscan_args *a= 1016 (struct atabusioscan_args *)addr; 1017 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) || 1018 (chp->ch_drive[1].drive_flags & DRIVE_OLD)) 1019 return (EOPNOTSUPP); 1020 switch (a->at_dev) { 1021 case -1: 1022 min_drive = 0; 1023 max_drive = 1; 1024 break; 1025 case 0: 1026 case 1: 1027 min_drive = max_drive = a->at_dev; 1028 break; 1029 default: 1030 return (EINVAL); 1031 } 1032 for (drive = min_drive; drive <= max_drive; drive++) { 1033 if (chp->ch_drive[drive].drv_softc != NULL) { 1034 error = config_detach( 1035 chp->ch_drive[drive].drv_softc, 0); 1036 if (error) 1037 return (error); 1038 chp->ch_drive[drive].drv_softc = NULL; 1039 } 1040 } 1041 error = 0; 1042 break; 1043 } 1044 default: 1045 error = ENOTTY; 1046 } 1047 return (error); 1048 }; 1049
Indexes created Thu Sep 25 08:09:54 GMT 2025