ata.c revision 1.46 1 /* $NetBSD: ata.c,v 1.46 2004/08/13 03:12:59 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.46 2004/08/13 03:12:59 thorpej Exp $");
34
35 #ifndef WDCDEBUG
36 #define WDCDEBUG
37 #endif /* WDCDEBUG */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/device.h>
44 #include <sys/conf.h>
45 #include <sys/fcntl.h>
46 #include <sys/proc.h>
47 #include <sys/pool.h>
48 #include <sys/kthread.h>
49 #include <sys/errno.h>
50 #include <sys/ataio.h>
51
52 #include <machine/intr.h>
53 #include <machine/bus.h>
54
55 #include <dev/ata/atareg.h>
56 #include <dev/ata/atavar.h>
57 #include <dev/ic/wdcreg.h>
58 #include <dev/ic/wdcvar.h>
59
60 #include "locators.h"
61
62 #define DEBUG_FUNCS 0x08
63 #define DEBUG_PROBE 0x10
64 #define DEBUG_DETACH 0x20
65 #define DEBUG_XFERS 0x40
66 #ifdef WDCDEBUG
67 extern int wdcdebug_mask; /* init'ed in wdc.c */
68 #define WDCDEBUG_PRINT(args, level) \
69 if (wdcdebug_mask & (level)) \
70 printf args
71 #else
72 #define WDCDEBUG_PRINT(args, level)
73 #endif
74
75 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL);
76
77 /*****************************************************************************
78 * ATA bus layer.
79 *
80 * ATA controllers attach an atabus instance, which handles probing the bus
81 * for drives, etc.
82 *****************************************************************************/
83
84 dev_type_open(atabusopen);
85 dev_type_close(atabusclose);
86 dev_type_ioctl(atabusioctl);
87
88 const struct cdevsw atabus_cdevsw = {
89 atabusopen, atabusclose, noread, nowrite, atabusioctl,
90 nostop, notty, nopoll, nommap, nokqfilter,
91 };
92
93 extern struct cfdriver atabus_cd;
94
95
96 /*
97 * atabusprint:
98 *
99 * Autoconfiguration print routine used by ATA controllers when
100 * attaching an atabus instance.
101 */
102 int
103 atabusprint(void *aux, const char *pnp)
104 {
105 struct wdc_channel *chan = aux;
106
107 if (pnp)
108 aprint_normal("atabus at %s", pnp);
109 aprint_normal(" channel %d", chan->ch_channel);
110
111 return (UNCONF);
112 }
113
114 /*
115 * ataprint:
116 *
117 * Autoconfiguration print routine.
118 */
119 int
120 ataprint(void *aux, const char *pnp)
121 {
122 struct ata_device *adev = aux;
123
124 if (pnp)
125 aprint_normal("wd at %s", pnp);
126 aprint_normal(" drive %d", adev->adev_drv_data->drive);
127
128 return (UNCONF);
129 }
130
131 /*
132 * atabus_thread:
133 *
134 * Worker thread for the ATA bus.
135 */
136 static void
137 atabus_thread(void *arg)
138 {
139 struct atabus_softc *sc = arg;
140 struct wdc_channel *chp = sc->sc_chan;
141 struct ata_xfer *xfer;
142 int s;
143
144 s = splbio();
145 chp->ch_flags |= WDCF_TH_RUN;
146 splx(s);
147
148 /* Configure the devices on the bus. */
149 atabusconfig(sc);
150
151 for (;;) {
152 s = splbio();
153 if ((chp->ch_flags & (WDCF_TH_RESET | WDCF_SHUTDOWN)) == 0 &&
154 (chp->ch_queue->active_xfer == NULL ||
155 chp->ch_queue->queue_freeze == 0)) {
156 chp->ch_flags &= ~WDCF_TH_RUN;
157 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0);
158 chp->ch_flags |= WDCF_TH_RUN;
159 }
160 splx(s);
161 if (chp->ch_flags & WDCF_SHUTDOWN)
162 break;
163 s = splbio();
164 if (chp->ch_flags & WDCF_TH_RESET) {
165 /*
166 * wdc_reset_channel() will freeze 2 times, so
167 * unfreeze one time. Not a problem as we're at splbio
168 */
169 chp->ch_queue->queue_freeze--;
170 wdc_reset_channel(chp, AT_WAIT | chp->ch_reset_flags);
171 } else if (chp->ch_queue->active_xfer != NULL &&
172 chp->ch_queue->queue_freeze == 1) {
173 /*
174 * Caller has bumped queue_freeze, decrease it.
175 */
176 chp->ch_queue->queue_freeze--;
177 xfer = chp->ch_queue->active_xfer;
178 KASSERT(xfer != NULL);
179 (*xfer->c_start)(chp, xfer);
180 } else if (chp->ch_queue->queue_freeze > 1)
181 panic("ata_thread: queue_freeze");
182 splx(s);
183 }
184 chp->ch_thread = NULL;
185 wakeup((void *)&chp->ch_flags);
186 kthread_exit(0);
187 }
188
189 /*
190 * atabus_create_thread:
191 *
192 * Helper routine to create the ATA bus worker thread.
193 */
194 static void
195 atabus_create_thread(void *arg)
196 {
197 struct atabus_softc *sc = arg;
198 struct wdc_channel *chp = sc->sc_chan;
199 int error;
200
201 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread,
202 "%s", sc->sc_dev.dv_xname)) != 0)
203 aprint_error("%s: unable to create kernel thread: error %d\n",
204 sc->sc_dev.dv_xname, error);
205 }
206
207 /*
208 * atabus_match:
209 *
210 * Autoconfiguration match routine.
211 */
212 static int
213 atabus_match(struct device *parent, struct cfdata *cf, void *aux)
214 {
215 struct wdc_channel *chp = aux;
216
217 if (chp == NULL)
218 return (0);
219
220 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel &&
221 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT)
222 return (0);
223
224 return (1);
225 }
226
227 /*
228 * atabus_attach:
229 *
230 * Autoconfiguration attach routine.
231 */
232 static void
233 atabus_attach(struct device *parent, struct device *self, void *aux)
234 {
235 struct atabus_softc *sc = (void *) self;
236 struct wdc_channel *chp = aux;
237 struct atabus_initq *initq;
238
239 sc->sc_chan = chp;
240
241 aprint_normal("\n");
242 aprint_naive("\n");
243
244 if (ata_addref(chp))
245 return;
246
247 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK);
248 initq->atabus_sc = sc;
249 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq);
250 config_pending_incr();
251 kthread_create(atabus_create_thread, sc);
252 }
253
254 /*
255 * atabus_activate:
256 *
257 * Autoconfiguration activation routine.
258 */
259 static int
260 atabus_activate(struct device *self, enum devact act)
261 {
262 struct atabus_softc *sc = (void *) self;
263 struct wdc_channel *chp = sc->sc_chan;
264 struct device *dev = NULL;
265 int s, i, error = 0;
266
267 s = splbio();
268 switch (act) {
269 case DVACT_ACTIVATE:
270 error = EOPNOTSUPP;
271 break;
272
273 case DVACT_DEACTIVATE:
274 /*
275 * We might deactivate the children of atapibus twice
276 * (once bia atapibus, once directly), but since the
277 * generic autoconfiguration code maintains the DVF_ACTIVE
278 * flag, it's safe.
279 */
280 if ((dev = chp->atapibus) != NULL) {
281 error = config_deactivate(dev);
282 if (error)
283 goto out;
284 }
285
286 for (i = 0; i < 2; i++) {
287 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
288 WDCDEBUG_PRINT(("atabus_activate: %s: "
289 "deactivating %s\n", sc->sc_dev.dv_xname,
290 dev->dv_xname),
291 DEBUG_DETACH);
292 error = config_deactivate(dev);
293 if (error)
294 goto out;
295 }
296 }
297 break;
298 }
299 out:
300 splx(s);
301
302 #ifdef WDCDEBUG
303 if (dev != NULL && error != 0)
304 WDCDEBUG_PRINT(("atabus_activate: %s: "
305 "error %d deactivating %s\n", sc->sc_dev.dv_xname,
306 error, dev->dv_xname), DEBUG_DETACH);
307 #endif /* WDCDEBUG */
308
309 return (error);
310 }
311
312 /*
313 * atabus_detach:
314 *
315 * Autoconfiguration detach routine.
316 */
317 static int
318 atabus_detach(struct device *self, int flags)
319 {
320 struct atabus_softc *sc = (void *) self;
321 struct wdc_channel *chp = sc->sc_chan;
322 struct device *dev = NULL;
323 int i, error = 0;
324
325 /* Shutdown the channel. */
326 /* XXX NEED AN INTERLOCK HERE. */
327 chp->ch_flags |= WDCF_SHUTDOWN;
328 wakeup(&chp->ch_thread);
329 while (chp->ch_thread != NULL)
330 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0);
331
332 /*
333 * Detach atapibus and its children.
334 */
335 if ((dev = chp->atapibus) != NULL) {
336 WDCDEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
337 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH);
338 error = config_detach(dev, flags);
339 if (error)
340 goto out;
341 }
342
343 /*
344 * Detach our other children.
345 */
346 for (i = 0; i < 2; i++) {
347 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI)
348 continue;
349 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
350 WDCDEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
351 sc->sc_dev.dv_xname, dev->dv_xname),
352 DEBUG_DETACH);
353 error = config_detach(dev, flags);
354 if (error)
355 goto out;
356 }
357 }
358
359 out:
360 #ifdef WDCDEBUG
361 if (dev != NULL && error != 0)
362 WDCDEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n",
363 sc->sc_dev.dv_xname, error, dev->dv_xname),
364 DEBUG_DETACH);
365 #endif /* WDCDEBUG */
366
367 return (error);
368 }
369
370 CFATTACH_DECL(atabus, sizeof(struct atabus_softc),
371 atabus_match, atabus_attach, atabus_detach, atabus_activate);
372
373 /*****************************************************************************
374 * Common ATA bus operations.
375 *****************************************************************************/
376
377 /* Get the disk's parameters */
378 int
379 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags,
380 struct ataparams *prms)
381 {
382 char tb[DEV_BSIZE];
383 struct ata_command ata_c;
384
385 #if BYTE_ORDER == LITTLE_ENDIAN
386 int i;
387 u_int16_t *p;
388 #endif
389
390 WDCDEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS);
391
392 memset(tb, 0, DEV_BSIZE);
393 memset(prms, 0, sizeof(struct ataparams));
394 memset(&ata_c, 0, sizeof(struct ata_command));
395
396 if (drvp->drive_flags & DRIVE_ATA) {
397 ata_c.r_command = WDCC_IDENTIFY;
398 ata_c.r_st_bmask = WDCS_DRDY;
399 ata_c.r_st_pmask = 0;
400 ata_c.timeout = 3000; /* 3s */
401 } else if (drvp->drive_flags & DRIVE_ATAPI) {
402 ata_c.r_command = ATAPI_IDENTIFY_DEVICE;
403 ata_c.r_st_bmask = 0;
404 ata_c.r_st_pmask = 0;
405 ata_c.timeout = 10000; /* 10s */
406 } else {
407 WDCDEBUG_PRINT(("ata_get_parms: no disks\n"),
408 DEBUG_FUNCS|DEBUG_PROBE);
409 return CMD_ERR;
410 }
411 ata_c.flags = AT_READ | flags;
412 ata_c.data = tb;
413 ata_c.bcount = DEV_BSIZE;
414 if (wdc_exec_command(drvp, &ata_c) != ATACMD_COMPLETE) {
415 WDCDEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"),
416 DEBUG_FUNCS|DEBUG_PROBE);
417 return CMD_AGAIN;
418 }
419 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
420 WDCDEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n",
421 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE);
422 return CMD_ERR;
423 } else {
424 /* if we didn't read any data something is wrong */
425 if ((ata_c.flags & AT_XFDONE) == 0)
426 return CMD_ERR;
427 /* Read in parameter block. */
428 memcpy(prms, tb, sizeof(struct ataparams));
429 #if BYTE_ORDER == LITTLE_ENDIAN
430 /*
431 * Shuffle string byte order.
432 * ATAPI Mitsumi and NEC drives don't need this.
433 */
434 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) ==
435 WDC_CFG_ATAPI &&
436 ((prms->atap_model[0] == 'N' &&
437 prms->atap_model[1] == 'E') ||
438 (prms->atap_model[0] == 'F' &&
439 prms->atap_model[1] == 'X')))
440 return 0;
441 for (i = 0; i < sizeof(prms->atap_model); i += 2) {
442 p = (u_short *)(prms->atap_model + i);
443 *p = ntohs(*p);
444 }
445 for (i = 0; i < sizeof(prms->atap_serial); i += 2) {
446 p = (u_short *)(prms->atap_serial + i);
447 *p = ntohs(*p);
448 }
449 for (i = 0; i < sizeof(prms->atap_revision); i += 2) {
450 p = (u_short *)(prms->atap_revision + i);
451 *p = ntohs(*p);
452 }
453 #endif
454 return CMD_OK;
455 }
456 }
457
458 int
459 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags)
460 {
461 struct ata_command ata_c;
462
463 WDCDEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS);
464 memset(&ata_c, 0, sizeof(struct ata_command));
465
466 ata_c.r_command = SET_FEATURES;
467 ata_c.r_st_bmask = 0;
468 ata_c.r_st_pmask = 0;
469 ata_c.r_features = WDSF_SET_MODE;
470 ata_c.r_count = mode;
471 ata_c.flags = flags;
472 ata_c.timeout = 1000; /* 1s */
473 if (wdc_exec_command(drvp, &ata_c) != ATACMD_COMPLETE)
474 return CMD_AGAIN;
475 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
476 return CMD_ERR;
477 }
478 return CMD_OK;
479 }
480
481 void
482 ata_dmaerr(struct ata_drive_datas *drvp, int flags)
483 {
484 /*
485 * Downgrade decision: if we get NERRS_MAX in NXFER.
486 * We start with n_dmaerrs set to NERRS_MAX-1 so that the
487 * first error within the first NXFER ops will immediatly trigger
488 * a downgrade.
489 * If we got an error and n_xfers is bigger than NXFER reset counters.
490 */
491 drvp->n_dmaerrs++;
492 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) {
493 ata_downgrade_mode(drvp, flags);
494 drvp->n_dmaerrs = NERRS_MAX-1;
495 drvp->n_xfers = 0;
496 return;
497 }
498 if (drvp->n_xfers > NXFER) {
499 drvp->n_dmaerrs = 1; /* just got an error */
500 drvp->n_xfers = 1; /* restart counting from this error */
501 }
502 }
503
504 /*
505 * Add a command to the queue and start controller. Must be called at splbio
506 */
507 void
508 ata_exec_xfer(struct wdc_channel *chp, struct ata_xfer *xfer)
509 {
510
511 WDCDEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer,
512 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
513
514 /* complete xfer setup */
515 xfer->c_chp = chp;
516
517 /* insert at the end of command list */
518 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
519 WDCDEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n",
520 chp->ch_flags), DEBUG_XFERS);
521 atastart(chp);
522 }
523
524 /*
525 * Start I/O on a controller, for the given channel.
526 * The first xfer may be not for our channel if the channel queues
527 * are shared.
528 */
529 void
530 atastart(struct wdc_channel *chp)
531 {
532 struct wdc_softc *wdc = chp->ch_wdc;
533 struct ata_xfer *xfer;
534
535 #ifdef WDC_DIAGNOSTIC
536 int spl1, spl2;
537
538 spl1 = splbio();
539 spl2 = splbio();
540 if (spl2 != spl1) {
541 printf("atastart: not at splbio()\n");
542 panic("atastart");
543 }
544 splx(spl2);
545 splx(spl1);
546 #endif /* WDC_DIAGNOSTIC */
547
548 /* is there a xfer ? */
549 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL)
550 return;
551
552 /* adjust chp, in case we have a shared queue */
553 chp = xfer->c_chp;
554
555 if (chp->ch_queue->active_xfer != NULL) {
556 return; /* channel aleady active */
557 }
558 if (__predict_false(chp->ch_queue->queue_freeze > 0)) {
559 return; /* queue froozen */
560 }
561 #ifdef DIAGNOSTIC
562 if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0)
563 panic("atastart: channel waiting for irq");
564 #endif
565 if (wdc->claim_hw)
566 if (!(*wdc->claim_hw)(chp, 0))
567 return;
568
569 WDCDEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer,
570 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
571 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) {
572 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET;
573 chp->ch_drive[xfer->c_drive].state = 0;
574 }
575 chp->ch_queue->active_xfer = xfer;
576 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
577
578 if (wdc->cap & WDC_CAPABILITY_NOIRQ)
579 KASSERT(xfer->c_flags & C_POLL);
580 xfer->c_start(chp, xfer);
581 }
582
583 struct ata_xfer *
584 ata_get_xfer(int flags)
585 {
586 struct ata_xfer *xfer;
587 int s;
588
589 s = splbio();
590 xfer = pool_get(&ata_xfer_pool,
591 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK));
592 splx(s);
593 if (xfer != NULL) {
594 memset(xfer, 0, sizeof(struct ata_xfer));
595 }
596 return xfer;
597 }
598
599 void
600 ata_free_xfer(struct wdc_channel *chp, struct ata_xfer *xfer)
601 {
602 struct wdc_softc *wdc = chp->ch_wdc;
603 int s;
604
605 if (wdc->free_hw)
606 (*wdc->free_hw)(chp);
607 s = splbio();
608 pool_put(&ata_xfer_pool, xfer);
609 splx(s);
610 }
611
612 /*
613 * Kill off all pending xfers for a wdc_channel.
614 *
615 * Must be called at splbio().
616 */
617 void
618 ata_kill_pending(struct ata_drive_datas *drvp)
619 {
620 struct wdc_channel *chp = drvp->chnl_softc;
621 struct ata_xfer *xfer, *next_xfer;
622 int s = splbio();
623
624 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
625 xfer != NULL; xfer = next_xfer) {
626 next_xfer = TAILQ_NEXT(xfer, c_xferchain);
627 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive)
628 continue;
629 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
630 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE);
631 }
632
633 while ((xfer = chp->ch_queue->active_xfer) != NULL) {
634 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) {
635 drvp->drive_flags |= DRIVE_WAITDRAIN;
636 (void) tsleep(&chp->ch_queue->active_xfer,
637 PRIBIO, "atdrn", 0);
638 } else {
639 /* no more xfer for us */
640 break;
641 }
642 }
643 splx(s);
644 }
645
646 int
647 ata_addref(struct wdc_channel *chp)
648 {
649 struct wdc_softc *wdc = chp->ch_wdc;
650 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
651 int s, error = 0;
652
653 s = splbio();
654 if (adapt->adapt_refcnt++ == 0 &&
655 adapt->adapt_enable != NULL) {
656 error = (*adapt->adapt_enable)(&wdc->sc_dev, 1);
657 if (error)
658 adapt->adapt_refcnt--;
659 }
660 splx(s);
661 return (error);
662 }
663
664 void
665 ata_delref(struct wdc_channel *chp)
666 {
667 struct wdc_softc *wdc = chp->ch_wdc;
668 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
669 int s;
670
671 s = splbio();
672 if (adapt->adapt_refcnt-- == 1 &&
673 adapt->adapt_enable != NULL)
674 (void) (*adapt->adapt_enable)(&wdc->sc_dev, 0);
675 splx(s);
676 }
677
678 void
679 ata_print_modes(struct wdc_channel *chp)
680 {
681 struct wdc_softc *wdc = chp->ch_wdc;
682 int drive;
683 struct ata_drive_datas *drvp;
684
685 for (drive = 0; drive < 2; drive++) {
686 drvp = &chp->ch_drive[drive];
687 if ((drvp->drive_flags & DRIVE) == 0)
688 continue;
689 aprint_normal("%s(%s:%d:%d): using PIO mode %d",
690 drvp->drv_softc->dv_xname,
691 wdc->sc_dev.dv_xname,
692 chp->ch_channel, drive, drvp->PIO_mode);
693 if (drvp->drive_flags & DRIVE_DMA)
694 aprint_normal(", DMA mode %d", drvp->DMA_mode);
695 if (drvp->drive_flags & DRIVE_UDMA) {
696 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode);
697 if (drvp->UDMA_mode == 2)
698 aprint_normal(" (Ultra/33)");
699 else if (drvp->UDMA_mode == 4)
700 aprint_normal(" (Ultra/66)");
701 else if (drvp->UDMA_mode == 5)
702 aprint_normal(" (Ultra/100)");
703 else if (drvp->UDMA_mode == 6)
704 aprint_normal(" (Ultra/133)");
705 }
706 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
707 aprint_normal(" (using DMA data transfers)");
708 aprint_normal("\n");
709 }
710 }
711
712 /*
713 * downgrade the transfer mode of a drive after an error. return 1 if
714 * downgrade was possible, 0 otherwise.
715 */
716 int
717 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags)
718 {
719 struct wdc_channel *chp = drvp->chnl_softc;
720 struct wdc_softc *wdc = chp->ch_wdc;
721 struct device *drv_dev = drvp->drv_softc;
722 int cf_flags = drv_dev->dv_cfdata->cf_flags;
723
724 /* if drive or controller don't know its mode, we can't do much */
725 if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
726 (wdc->set_modes == NULL))
727 return 0;
728 /* current drive mode was set by a config flag, let it this way */
729 if ((cf_flags & ATA_CONFIG_PIO_SET) ||
730 (cf_flags & ATA_CONFIG_DMA_SET) ||
731 (cf_flags & ATA_CONFIG_UDMA_SET))
732 return 0;
733
734 /*
735 * If we were using Ultra-DMA mode, downgrade to the next lower mode.
736 */
737 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) {
738 drvp->UDMA_mode--;
739 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n",
740 drv_dev->dv_xname, drvp->UDMA_mode);
741 }
742
743 /*
744 * If we were using ultra-DMA, don't downgrade to multiword DMA.
745 */
746 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
747 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
748 drvp->PIO_mode = drvp->PIO_cap;
749 printf("%s: transfer error, downgrading to PIO mode %d\n",
750 drv_dev->dv_xname, drvp->PIO_mode);
751 } else /* already using PIO, can't downgrade */
752 return 0;
753
754 wdc->set_modes(chp);
755 ata_print_modes(chp);
756 /* reset the channel, which will shedule all drives for setup */
757 wdc_reset_channel(chp, flags | AT_RST_NOCMD);
758 return 1;
759 }
760
761 /*
762 * Probe drive's capabilities, for use by the controller later
763 * Assumes drvp points to an existing drive.
764 */
765 void
766 ata_probe_caps(struct ata_drive_datas *drvp)
767 {
768 struct ataparams params, params2;
769 struct wdc_channel *chp = drvp->chnl_softc;
770 struct wdc_softc *wdc = chp->ch_wdc;
771 struct device *drv_dev = drvp->drv_softc;
772 int i, printed;
773 char *sep = "";
774 int cf_flags;
775
776 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) {
777 /* IDENTIFY failed. Can't tell more about the device */
778 return;
779 }
780 if ((wdc->cap & (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) ==
781 (WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32)) {
782 /*
783 * Controller claims 16 and 32 bit transfers.
784 * Re-do an IDENTIFY with 32-bit transfers,
785 * and compare results.
786 */
787 drvp->drive_flags |= DRIVE_CAP32;
788 ata_get_params(drvp, AT_WAIT, ¶ms2);
789 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) {
790 /* Not good. fall back to 16bits */
791 drvp->drive_flags &= ~DRIVE_CAP32;
792 } else {
793 aprint_normal("%s: 32-bit data port\n",
794 drv_dev->dv_xname);
795 }
796 }
797 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
798 if (params.atap_ata_major > 0x01 &&
799 params.atap_ata_major != 0xffff) {
800 for (i = 14; i > 0; i--) {
801 if (params.atap_ata_major & (1 << i)) {
802 aprint_normal("%s: ATA version %d\n",
803 drv_dev->dv_xname, i);
804 drvp->ata_vers = i;
805 break;
806 }
807 }
808 }
809 #endif
810
811 /* An ATAPI device is at last PIO mode 3 */
812 if (drvp->drive_flags & DRIVE_ATAPI)
813 drvp->PIO_mode = 3;
814
815 /*
816 * It's not in the specs, but it seems that some drive
817 * returns 0xffff in atap_extensions when this field is invalid
818 */
819 if (params.atap_extensions != 0xffff &&
820 (params.atap_extensions & WDC_EXT_MODES)) {
821 printed = 0;
822 /*
823 * XXX some drives report something wrong here (they claim to
824 * support PIO mode 8 !). As mode is coded on 3 bits in
825 * SET FEATURE, limit it to 7 (so limit i to 4).
826 * If higher mode than 7 is found, abort.
827 */
828 for (i = 7; i >= 0; i--) {
829 if ((params.atap_piomode_supp & (1 << i)) == 0)
830 continue;
831 if (i > 4)
832 return;
833 /*
834 * See if mode is accepted.
835 * If the controller can't set its PIO mode,
836 * assume the defaults are good, so don't try
837 * to set it
838 */
839 if (wdc->set_modes)
840 /*
841 * It's OK to pool here, it's fast enouth
842 * to not bother waiting for interrupt
843 */
844 if (ata_set_mode(drvp, 0x08 | (i + 3),
845 AT_WAIT) != CMD_OK)
846 continue;
847 if (!printed) {
848 aprint_normal("%s: drive supports PIO mode %d",
849 drv_dev->dv_xname, i + 3);
850 sep = ",";
851 printed = 1;
852 }
853 /*
854 * If controller's driver can't set its PIO mode,
855 * get the highter one for the drive.
856 */
857 if (wdc->set_modes == NULL || wdc->PIO_cap >= i + 3) {
858 drvp->PIO_mode = i + 3;
859 drvp->PIO_cap = i + 3;
860 break;
861 }
862 }
863 if (!printed) {
864 /*
865 * We didn't find a valid PIO mode.
866 * Assume the values returned for DMA are buggy too
867 */
868 return;
869 }
870 drvp->drive_flags |= DRIVE_MODE;
871 printed = 0;
872 for (i = 7; i >= 0; i--) {
873 if ((params.atap_dmamode_supp & (1 << i)) == 0)
874 continue;
875 if ((wdc->cap & WDC_CAPABILITY_DMA) &&
876 wdc->set_modes != NULL)
877 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT)
878 != CMD_OK)
879 continue;
880 if (!printed) {
881 aprint_normal("%s DMA mode %d", sep, i);
882 sep = ",";
883 printed = 1;
884 }
885 if (wdc->cap & WDC_CAPABILITY_DMA) {
886 if (wdc->set_modes != NULL &&
887 wdc->DMA_cap < i)
888 continue;
889 drvp->DMA_mode = i;
890 drvp->DMA_cap = i;
891 drvp->drive_flags |= DRIVE_DMA;
892 }
893 break;
894 }
895 if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
896 printed = 0;
897 for (i = 7; i >= 0; i--) {
898 if ((params.atap_udmamode_supp & (1 << i))
899 == 0)
900 continue;
901 if (wdc->set_modes != NULL &&
902 (wdc->cap & WDC_CAPABILITY_UDMA))
903 if (ata_set_mode(drvp, 0x40 | i,
904 AT_WAIT) != CMD_OK)
905 continue;
906 if (!printed) {
907 aprint_normal("%s Ultra-DMA mode %d",
908 sep, i);
909 if (i == 2)
910 aprint_normal(" (Ultra/33)");
911 else if (i == 4)
912 aprint_normal(" (Ultra/66)");
913 else if (i == 5)
914 aprint_normal(" (Ultra/100)");
915 else if (i == 6)
916 aprint_normal(" (Ultra/133)");
917 sep = ",";
918 printed = 1;
919 }
920 if (wdc->cap & WDC_CAPABILITY_UDMA) {
921 if (wdc->set_modes != NULL &&
922 wdc->UDMA_cap < i)
923 continue;
924 drvp->UDMA_mode = i;
925 drvp->UDMA_cap = i;
926 drvp->drive_flags |= DRIVE_UDMA;
927 }
928 break;
929 }
930 }
931 aprint_normal("\n");
932 }
933
934 drvp->drive_flags &= ~DRIVE_NOSTREAM;
935 if (drvp->drive_flags & DRIVE_ATAPI) {
936 if (wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)
937 drvp->drive_flags |= DRIVE_NOSTREAM;
938 } else {
939 if (wdc->cap & WDC_CAPABILITY_ATA_NOSTREAM)
940 drvp->drive_flags |= DRIVE_NOSTREAM;
941 }
942
943 /* Try to guess ATA version here, if it didn't get reported */
944 if (drvp->ata_vers == 0) {
945 if (drvp->drive_flags & DRIVE_UDMA)
946 drvp->ata_vers = 4; /* should be at last ATA-4 */
947 else if (drvp->PIO_cap > 2)
948 drvp->ata_vers = 2; /* should be at last ATA-2 */
949 }
950 cf_flags = drv_dev->dv_cfdata->cf_flags;
951 if (cf_flags & ATA_CONFIG_PIO_SET) {
952 drvp->PIO_mode =
953 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
954 drvp->drive_flags |= DRIVE_MODE;
955 }
956 if ((wdc->cap & WDC_CAPABILITY_DMA) == 0) {
957 /* don't care about DMA modes */
958 return;
959 }
960 if (cf_flags & ATA_CONFIG_DMA_SET) {
961 if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
962 ATA_CONFIG_DMA_DISABLE) {
963 drvp->drive_flags &= ~DRIVE_DMA;
964 } else {
965 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
966 ATA_CONFIG_DMA_OFF;
967 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
968 }
969 }
970 if ((wdc->cap & WDC_CAPABILITY_UDMA) == 0) {
971 /* don't care about UDMA modes */
972 return;
973 }
974 if (cf_flags & ATA_CONFIG_UDMA_SET) {
975 if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
976 ATA_CONFIG_UDMA_DISABLE) {
977 drvp->drive_flags &= ~DRIVE_UDMA;
978 } else {
979 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
980 ATA_CONFIG_UDMA_OFF;
981 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
982 }
983 }
984 }
985
986 /* management of the /dev/atabus* devices */
987 int atabusopen(dev, flag, fmt, p)
988 dev_t dev;
989 int flag, fmt;
990 struct proc *p;
991 {
992 struct atabus_softc *sc;
993 int error, unit = minor(dev);
994
995 if (unit >= atabus_cd.cd_ndevs ||
996 (sc = atabus_cd.cd_devs[unit]) == NULL)
997 return (ENXIO);
998
999 if (sc->sc_flags & ATABUSCF_OPEN)
1000 return (EBUSY);
1001
1002 if ((error = ata_addref(sc->sc_chan)) != 0)
1003 return (error);
1004
1005 sc->sc_flags |= ATABUSCF_OPEN;
1006
1007 return (0);
1008 }
1009
1010
1011 int
1012 atabusclose(dev, flag, fmt, p)
1013 dev_t dev;
1014 int flag, fmt;
1015 struct proc *p;
1016 {
1017 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1018
1019 ata_delref(sc->sc_chan);
1020
1021 sc->sc_flags &= ~ATABUSCF_OPEN;
1022
1023 return (0);
1024 }
1025
1026 int
1027 atabusioctl(dev, cmd, addr, flag, p)
1028 dev_t dev;
1029 u_long cmd;
1030 caddr_t addr;
1031 int flag;
1032 struct proc *p;
1033 {
1034 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1035 struct wdc_channel *chp = sc->sc_chan;
1036 int min_drive, max_drive, drive;
1037 int error;
1038 int s;
1039
1040 /*
1041 * Enforce write permission for ioctls that change the
1042 * state of the bus. Host adapter specific ioctls must
1043 * be checked by the adapter driver.
1044 */
1045 switch (cmd) {
1046 case ATABUSIOSCAN:
1047 case ATABUSIODETACH:
1048 case ATABUSIORESET:
1049 if ((flag & FWRITE) == 0)
1050 return (EBADF);
1051 }
1052
1053 switch (cmd) {
1054 case ATABUSIORESET:
1055 s = splbio();
1056 wdc_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL);
1057 splx(s);
1058 error = 0;
1059 break;
1060 case ATABUSIOSCAN:
1061 {
1062 #if 0
1063 struct atabusioscan_args *a=
1064 (struct atabusioscan_args *)addr;
1065 #endif
1066 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1067 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1068 return (EOPNOTSUPP);
1069 return (EOPNOTSUPP);
1070 }
1071 case ATABUSIODETACH:
1072 {
1073 struct atabusioscan_args *a=
1074 (struct atabusioscan_args *)addr;
1075 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1076 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1077 return (EOPNOTSUPP);
1078 switch (a->at_dev) {
1079 case -1:
1080 min_drive = 0;
1081 max_drive = 1;
1082 break;
1083 case 0:
1084 case 1:
1085 min_drive = max_drive = a->at_dev;
1086 break;
1087 default:
1088 return (EINVAL);
1089 }
1090 for (drive = min_drive; drive <= max_drive; drive++) {
1091 if (chp->ch_drive[drive].drv_softc != NULL) {
1092 error = config_detach(
1093 chp->ch_drive[drive].drv_softc, 0);
1094 if (error)
1095 return (error);
1096 chp->ch_drive[drive].drv_softc = NULL;
1097 }
1098 }
1099 error = 0;
1100 break;
1101 }
1102 default:
1103 error = ENOTTY;
1104 }
1105 return (error);
1106 };
1107