ata.c revision 1.49 1 /* $NetBSD: ata.c,v 1.49 2004/08/20 06:39:38 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.49 2004/08/20 06:39:38 thorpej Exp $");
34
35 #ifndef ATADEBUG
36 #define ATADEBUG
37 #endif /* ATADEBUG */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/device.h>
44 #include <sys/conf.h>
45 #include <sys/fcntl.h>
46 #include <sys/proc.h>
47 #include <sys/pool.h>
48 #include <sys/kthread.h>
49 #include <sys/errno.h>
50 #include <sys/ataio.h>
51
52 #include <machine/intr.h>
53 #include <machine/bus.h>
54
55 #include <dev/ata/atareg.h>
56 #include <dev/ata/atavar.h>
57 #include <dev/ic/wdcreg.h>
58 #include <dev/ic/wdcvar.h>
59
60 #include "locators.h"
61
62 #define DEBUG_FUNCS 0x08
63 #define DEBUG_PROBE 0x10
64 #define DEBUG_DETACH 0x20
65 #define DEBUG_XFERS 0x40
66 #ifdef ATADEBUG
67 int atadebug_mask = 0;
68 #define ATADEBUG_PRINT(args, level) \
69 if (atadebug_mask & (level)) \
70 printf args
71 #else
72 #define ATADEBUG_PRINT(args, level)
73 #endif
74
75 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL);
76
77 /*****************************************************************************
78 * ATA bus layer.
79 *
80 * ATA controllers attach an atabus instance, which handles probing the bus
81 * for drives, etc.
82 *****************************************************************************/
83
84 dev_type_open(atabusopen);
85 dev_type_close(atabusclose);
86 dev_type_ioctl(atabusioctl);
87
88 const struct cdevsw atabus_cdevsw = {
89 atabusopen, atabusclose, noread, nowrite, atabusioctl,
90 nostop, notty, nopoll, nommap, nokqfilter,
91 };
92
93 extern struct cfdriver atabus_cd;
94
95
96 /*
97 * atabusprint:
98 *
99 * Autoconfiguration print routine used by ATA controllers when
100 * attaching an atabus instance.
101 */
102 int
103 atabusprint(void *aux, const char *pnp)
104 {
105 struct ata_channel *chan = aux;
106
107 if (pnp)
108 aprint_normal("atabus at %s", pnp);
109 aprint_normal(" channel %d", chan->ch_channel);
110
111 return (UNCONF);
112 }
113
114 /*
115 * ataprint:
116 *
117 * Autoconfiguration print routine.
118 */
119 int
120 ataprint(void *aux, const char *pnp)
121 {
122 struct ata_device *adev = aux;
123
124 if (pnp)
125 aprint_normal("wd at %s", pnp);
126 aprint_normal(" drive %d", adev->adev_drv_data->drive);
127
128 return (UNCONF);
129 }
130
131 /*
132 * atabus_thread:
133 *
134 * Worker thread for the ATA bus.
135 */
136 static void
137 atabus_thread(void *arg)
138 {
139 struct atabus_softc *sc = arg;
140 struct ata_channel *chp = sc->sc_chan;
141 struct ata_xfer *xfer;
142 int i, s;
143
144 s = splbio();
145 chp->ch_flags |= ATACH_TH_RUN;
146
147 /*
148 * Probe the drives. Reset all flags to 0 to indicate to controllers
149 * that can re-probe that all drives must be probed..
150 *
151 * Note: ch_ndrive may be changed during the probe.
152 */
153 for (i = 0; i < ATA_MAXDRIVES; i++)
154 chp->ch_drive[i].drive_flags = 0;
155 splx(s);
156
157 /* Configure the devices on the bus. */
158 atabusconfig(sc);
159
160 for (;;) {
161 s = splbio();
162 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 &&
163 (chp->ch_queue->active_xfer == NULL ||
164 chp->ch_queue->queue_freeze == 0)) {
165 chp->ch_flags &= ~ATACH_TH_RUN;
166 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0);
167 chp->ch_flags |= ATACH_TH_RUN;
168 }
169 splx(s);
170 if (chp->ch_flags & ATACH_SHUTDOWN)
171 break;
172 s = splbio();
173 if (chp->ch_flags & ATACH_TH_RESET) {
174 /*
175 * wdc_reset_channel() will freeze 2 times, so
176 * unfreeze one time. Not a problem as we're at splbio
177 */
178 chp->ch_queue->queue_freeze--;
179 wdc_reset_channel(chp, AT_WAIT | chp->ch_reset_flags);
180 } else if (chp->ch_queue->active_xfer != NULL &&
181 chp->ch_queue->queue_freeze == 1) {
182 /*
183 * Caller has bumped queue_freeze, decrease it.
184 */
185 chp->ch_queue->queue_freeze--;
186 xfer = chp->ch_queue->active_xfer;
187 KASSERT(xfer != NULL);
188 (*xfer->c_start)(chp, xfer);
189 } else if (chp->ch_queue->queue_freeze > 1)
190 panic("ata_thread: queue_freeze");
191 splx(s);
192 }
193 chp->ch_thread = NULL;
194 wakeup((void *)&chp->ch_flags);
195 kthread_exit(0);
196 }
197
198 /*
199 * atabus_create_thread:
200 *
201 * Helper routine to create the ATA bus worker thread.
202 */
203 static void
204 atabus_create_thread(void *arg)
205 {
206 struct atabus_softc *sc = arg;
207 struct ata_channel *chp = sc->sc_chan;
208 int error;
209
210 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread,
211 "%s", sc->sc_dev.dv_xname)) != 0)
212 aprint_error("%s: unable to create kernel thread: error %d\n",
213 sc->sc_dev.dv_xname, error);
214 }
215
216 /*
217 * atabus_match:
218 *
219 * Autoconfiguration match routine.
220 */
221 static int
222 atabus_match(struct device *parent, struct cfdata *cf, void *aux)
223 {
224 struct ata_channel *chp = aux;
225
226 if (chp == NULL)
227 return (0);
228
229 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel &&
230 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT)
231 return (0);
232
233 return (1);
234 }
235
236 /*
237 * atabus_attach:
238 *
239 * Autoconfiguration attach routine.
240 */
241 static void
242 atabus_attach(struct device *parent, struct device *self, void *aux)
243 {
244 struct atabus_softc *sc = (void *) self;
245 struct ata_channel *chp = aux;
246 struct atabus_initq *initq;
247
248 sc->sc_chan = chp;
249
250 aprint_normal("\n");
251 aprint_naive("\n");
252
253 if (ata_addref(chp))
254 return;
255
256 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK);
257 initq->atabus_sc = sc;
258 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq);
259 config_pending_incr();
260 kthread_create(atabus_create_thread, sc);
261 }
262
263 /*
264 * atabus_activate:
265 *
266 * Autoconfiguration activation routine.
267 */
268 static int
269 atabus_activate(struct device *self, enum devact act)
270 {
271 struct atabus_softc *sc = (void *) self;
272 struct ata_channel *chp = sc->sc_chan;
273 struct device *dev = NULL;
274 int s, i, error = 0;
275
276 s = splbio();
277 switch (act) {
278 case DVACT_ACTIVATE:
279 error = EOPNOTSUPP;
280 break;
281
282 case DVACT_DEACTIVATE:
283 /*
284 * We might deactivate the children of atapibus twice
285 * (once bia atapibus, once directly), but since the
286 * generic autoconfiguration code maintains the DVF_ACTIVE
287 * flag, it's safe.
288 */
289 if ((dev = chp->atapibus) != NULL) {
290 error = config_deactivate(dev);
291 if (error)
292 goto out;
293 }
294
295 for (i = 0; i < chp->ch_ndrive; i++) {
296 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
297 ATADEBUG_PRINT(("atabus_activate: %s: "
298 "deactivating %s\n", sc->sc_dev.dv_xname,
299 dev->dv_xname),
300 DEBUG_DETACH);
301 error = config_deactivate(dev);
302 if (error)
303 goto out;
304 }
305 }
306 break;
307 }
308 out:
309 splx(s);
310
311 #ifdef ATADEBUG
312 if (dev != NULL && error != 0)
313 ATADEBUG_PRINT(("atabus_activate: %s: "
314 "error %d deactivating %s\n", sc->sc_dev.dv_xname,
315 error, dev->dv_xname), DEBUG_DETACH);
316 #endif /* ATADEBUG */
317
318 return (error);
319 }
320
321 /*
322 * atabus_detach:
323 *
324 * Autoconfiguration detach routine.
325 */
326 static int
327 atabus_detach(struct device *self, int flags)
328 {
329 struct atabus_softc *sc = (void *) self;
330 struct ata_channel *chp = sc->sc_chan;
331 struct device *dev = NULL;
332 int i, error = 0;
333
334 /* Shutdown the channel. */
335 /* XXX NEED AN INTERLOCK HERE. */
336 chp->ch_flags |= ATACH_SHUTDOWN;
337 wakeup(&chp->ch_thread);
338 while (chp->ch_thread != NULL)
339 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0);
340
341 /*
342 * Detach atapibus and its children.
343 */
344 if ((dev = chp->atapibus) != NULL) {
345 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
346 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH);
347 error = config_detach(dev, flags);
348 if (error)
349 goto out;
350 }
351
352 /*
353 * Detach our other children.
354 */
355 for (i = 0; i < chp->ch_ndrive; i++) {
356 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI)
357 continue;
358 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
359 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
360 sc->sc_dev.dv_xname, dev->dv_xname),
361 DEBUG_DETACH);
362 error = config_detach(dev, flags);
363 if (error)
364 goto out;
365 }
366 }
367
368 out:
369 #ifdef ATADEBUG
370 if (dev != NULL && error != 0)
371 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n",
372 sc->sc_dev.dv_xname, error, dev->dv_xname),
373 DEBUG_DETACH);
374 #endif /* ATADEBUG */
375
376 return (error);
377 }
378
379 CFATTACH_DECL(atabus, sizeof(struct atabus_softc),
380 atabus_match, atabus_attach, atabus_detach, atabus_activate);
381
382 /*****************************************************************************
383 * Common ATA bus operations.
384 *****************************************************************************/
385
386 /* Get the disk's parameters */
387 int
388 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags,
389 struct ataparams *prms)
390 {
391 char tb[DEV_BSIZE];
392 struct ata_command ata_c;
393
394 #if BYTE_ORDER == LITTLE_ENDIAN
395 int i;
396 u_int16_t *p;
397 #endif
398
399 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS);
400
401 memset(tb, 0, DEV_BSIZE);
402 memset(prms, 0, sizeof(struct ataparams));
403 memset(&ata_c, 0, sizeof(struct ata_command));
404
405 if (drvp->drive_flags & DRIVE_ATA) {
406 ata_c.r_command = WDCC_IDENTIFY;
407 ata_c.r_st_bmask = WDCS_DRDY;
408 ata_c.r_st_pmask = 0;
409 ata_c.timeout = 3000; /* 3s */
410 } else if (drvp->drive_flags & DRIVE_ATAPI) {
411 ata_c.r_command = ATAPI_IDENTIFY_DEVICE;
412 ata_c.r_st_bmask = 0;
413 ata_c.r_st_pmask = 0;
414 ata_c.timeout = 10000; /* 10s */
415 } else {
416 ATADEBUG_PRINT(("ata_get_parms: no disks\n"),
417 DEBUG_FUNCS|DEBUG_PROBE);
418 return CMD_ERR;
419 }
420 ata_c.flags = AT_READ | flags;
421 ata_c.data = tb;
422 ata_c.bcount = DEV_BSIZE;
423 if (wdc_exec_command(drvp, &ata_c) != ATACMD_COMPLETE) {
424 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"),
425 DEBUG_FUNCS|DEBUG_PROBE);
426 return CMD_AGAIN;
427 }
428 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
429 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n",
430 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE);
431 return CMD_ERR;
432 } else {
433 /* if we didn't read any data something is wrong */
434 if ((ata_c.flags & AT_XFDONE) == 0)
435 return CMD_ERR;
436 /* Read in parameter block. */
437 memcpy(prms, tb, sizeof(struct ataparams));
438 #if BYTE_ORDER == LITTLE_ENDIAN
439 /*
440 * Shuffle string byte order.
441 * ATAPI Mitsumi and NEC drives don't need this.
442 */
443 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) ==
444 WDC_CFG_ATAPI &&
445 ((prms->atap_model[0] == 'N' &&
446 prms->atap_model[1] == 'E') ||
447 (prms->atap_model[0] == 'F' &&
448 prms->atap_model[1] == 'X')))
449 return 0;
450 for (i = 0; i < sizeof(prms->atap_model); i += 2) {
451 p = (u_short *)(prms->atap_model + i);
452 *p = ntohs(*p);
453 }
454 for (i = 0; i < sizeof(prms->atap_serial); i += 2) {
455 p = (u_short *)(prms->atap_serial + i);
456 *p = ntohs(*p);
457 }
458 for (i = 0; i < sizeof(prms->atap_revision); i += 2) {
459 p = (u_short *)(prms->atap_revision + i);
460 *p = ntohs(*p);
461 }
462 #endif
463 return CMD_OK;
464 }
465 }
466
467 int
468 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags)
469 {
470 struct ata_command ata_c;
471
472 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS);
473 memset(&ata_c, 0, sizeof(struct ata_command));
474
475 ata_c.r_command = SET_FEATURES;
476 ata_c.r_st_bmask = 0;
477 ata_c.r_st_pmask = 0;
478 ata_c.r_features = WDSF_SET_MODE;
479 ata_c.r_count = mode;
480 ata_c.flags = flags;
481 ata_c.timeout = 1000; /* 1s */
482 if (wdc_exec_command(drvp, &ata_c) != ATACMD_COMPLETE)
483 return CMD_AGAIN;
484 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
485 return CMD_ERR;
486 }
487 return CMD_OK;
488 }
489
490 void
491 ata_dmaerr(struct ata_drive_datas *drvp, int flags)
492 {
493 /*
494 * Downgrade decision: if we get NERRS_MAX in NXFER.
495 * We start with n_dmaerrs set to NERRS_MAX-1 so that the
496 * first error within the first NXFER ops will immediatly trigger
497 * a downgrade.
498 * If we got an error and n_xfers is bigger than NXFER reset counters.
499 */
500 drvp->n_dmaerrs++;
501 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) {
502 ata_downgrade_mode(drvp, flags);
503 drvp->n_dmaerrs = NERRS_MAX-1;
504 drvp->n_xfers = 0;
505 return;
506 }
507 if (drvp->n_xfers > NXFER) {
508 drvp->n_dmaerrs = 1; /* just got an error */
509 drvp->n_xfers = 1; /* restart counting from this error */
510 }
511 }
512
513 /*
514 * Add a command to the queue and start controller. Must be called at splbio
515 */
516 void
517 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
518 {
519
520 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer,
521 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
522
523 /* complete xfer setup */
524 xfer->c_chp = chp;
525
526 /* insert at the end of command list */
527 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
528 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n",
529 chp->ch_flags), DEBUG_XFERS);
530 atastart(chp);
531 }
532
533 /*
534 * Start I/O on a controller, for the given channel.
535 * The first xfer may be not for our channel if the channel queues
536 * are shared.
537 */
538 void
539 atastart(struct ata_channel *chp)
540 {
541 struct atac_softc *atac = chp->ch_atac;
542 struct ata_xfer *xfer;
543
544 #ifdef WDC_DIAGNOSTIC
545 int spl1, spl2;
546
547 spl1 = splbio();
548 spl2 = splbio();
549 if (spl2 != spl1) {
550 printf("atastart: not at splbio()\n");
551 panic("atastart");
552 }
553 splx(spl2);
554 splx(spl1);
555 #endif /* WDC_DIAGNOSTIC */
556
557 /* is there a xfer ? */
558 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL)
559 return;
560
561 /* adjust chp, in case we have a shared queue */
562 chp = xfer->c_chp;
563
564 if (chp->ch_queue->active_xfer != NULL) {
565 return; /* channel aleady active */
566 }
567 if (__predict_false(chp->ch_queue->queue_freeze > 0)) {
568 return; /* queue froozen */
569 }
570 #ifdef DIAGNOSTIC
571 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0)
572 panic("atastart: channel waiting for irq");
573 #endif
574 if (atac->atac_claim_hw)
575 if (!(*atac->atac_claim_hw)(chp, 0))
576 return;
577
578 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer,
579 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
580 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) {
581 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET;
582 chp->ch_drive[xfer->c_drive].state = 0;
583 }
584 chp->ch_queue->active_xfer = xfer;
585 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
586
587 if (atac->atac_cap & ATAC_CAP_NOIRQ)
588 KASSERT(xfer->c_flags & C_POLL);
589 xfer->c_start(chp, xfer);
590 }
591
592 struct ata_xfer *
593 ata_get_xfer(int flags)
594 {
595 struct ata_xfer *xfer;
596 int s;
597
598 s = splbio();
599 xfer = pool_get(&ata_xfer_pool,
600 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK));
601 splx(s);
602 if (xfer != NULL) {
603 memset(xfer, 0, sizeof(struct ata_xfer));
604 }
605 return xfer;
606 }
607
608 void
609 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
610 {
611 struct atac_softc *atac = chp->ch_atac;
612 int s;
613
614 if (atac->atac_free_hw)
615 (*atac->atac_free_hw)(chp);
616 s = splbio();
617 pool_put(&ata_xfer_pool, xfer);
618 splx(s);
619 }
620
621 /*
622 * Kill off all pending xfers for a ata_channel.
623 *
624 * Must be called at splbio().
625 */
626 void
627 ata_kill_pending(struct ata_drive_datas *drvp)
628 {
629 struct ata_channel *chp = drvp->chnl_softc;
630 struct ata_xfer *xfer, *next_xfer;
631 int s = splbio();
632
633 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
634 xfer != NULL; xfer = next_xfer) {
635 next_xfer = TAILQ_NEXT(xfer, c_xferchain);
636 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive)
637 continue;
638 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
639 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE);
640 }
641
642 while ((xfer = chp->ch_queue->active_xfer) != NULL) {
643 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) {
644 drvp->drive_flags |= DRIVE_WAITDRAIN;
645 (void) tsleep(&chp->ch_queue->active_xfer,
646 PRIBIO, "atdrn", 0);
647 } else {
648 /* no more xfer for us */
649 break;
650 }
651 }
652 splx(s);
653 }
654
655 int
656 ata_addref(struct ata_channel *chp)
657 {
658 struct atac_softc *atac = chp->ch_atac;
659 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
660 int s, error = 0;
661
662 s = splbio();
663 if (adapt->adapt_refcnt++ == 0 &&
664 adapt->adapt_enable != NULL) {
665 error = (*adapt->adapt_enable)(&atac->atac_dev, 1);
666 if (error)
667 adapt->adapt_refcnt--;
668 }
669 splx(s);
670 return (error);
671 }
672
673 void
674 ata_delref(struct ata_channel *chp)
675 {
676 struct atac_softc *atac = chp->ch_atac;
677 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
678 int s;
679
680 s = splbio();
681 if (adapt->adapt_refcnt-- == 1 &&
682 adapt->adapt_enable != NULL)
683 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0);
684 splx(s);
685 }
686
687 void
688 ata_print_modes(struct ata_channel *chp)
689 {
690 struct atac_softc *atac = chp->ch_atac;
691 int drive;
692 struct ata_drive_datas *drvp;
693
694 for (drive = 0; drive < 2; drive++) {
695 drvp = &chp->ch_drive[drive];
696 if ((drvp->drive_flags & DRIVE) == 0)
697 continue;
698 aprint_normal("%s(%s:%d:%d): using PIO mode %d",
699 drvp->drv_softc->dv_xname,
700 atac->atac_dev.dv_xname,
701 chp->ch_channel, drive, drvp->PIO_mode);
702 if (drvp->drive_flags & DRIVE_DMA)
703 aprint_normal(", DMA mode %d", drvp->DMA_mode);
704 if (drvp->drive_flags & DRIVE_UDMA) {
705 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode);
706 if (drvp->UDMA_mode == 2)
707 aprint_normal(" (Ultra/33)");
708 else if (drvp->UDMA_mode == 4)
709 aprint_normal(" (Ultra/66)");
710 else if (drvp->UDMA_mode == 5)
711 aprint_normal(" (Ultra/100)");
712 else if (drvp->UDMA_mode == 6)
713 aprint_normal(" (Ultra/133)");
714 }
715 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
716 aprint_normal(" (using DMA data transfers)");
717 aprint_normal("\n");
718 }
719 }
720
721 /*
722 * downgrade the transfer mode of a drive after an error. return 1 if
723 * downgrade was possible, 0 otherwise.
724 */
725 int
726 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags)
727 {
728 struct ata_channel *chp = drvp->chnl_softc;
729 struct atac_softc *atac = chp->ch_atac;
730 struct device *drv_dev = drvp->drv_softc;
731 int cf_flags = drv_dev->dv_cfdata->cf_flags;
732
733 /* if drive or controller don't know its mode, we can't do much */
734 if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
735 (atac->atac_set_modes == NULL))
736 return 0;
737 /* current drive mode was set by a config flag, let it this way */
738 if ((cf_flags & ATA_CONFIG_PIO_SET) ||
739 (cf_flags & ATA_CONFIG_DMA_SET) ||
740 (cf_flags & ATA_CONFIG_UDMA_SET))
741 return 0;
742
743 /*
744 * If we were using Ultra-DMA mode, downgrade to the next lower mode.
745 */
746 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) {
747 drvp->UDMA_mode--;
748 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n",
749 drv_dev->dv_xname, drvp->UDMA_mode);
750 }
751
752 /*
753 * If we were using ultra-DMA, don't downgrade to multiword DMA.
754 */
755 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
756 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
757 drvp->PIO_mode = drvp->PIO_cap;
758 printf("%s: transfer error, downgrading to PIO mode %d\n",
759 drv_dev->dv_xname, drvp->PIO_mode);
760 } else /* already using PIO, can't downgrade */
761 return 0;
762
763 (*atac->atac_set_modes)(chp);
764 ata_print_modes(chp);
765 /* reset the channel, which will shedule all drives for setup */
766 wdc_reset_channel(chp, flags | AT_RST_NOCMD);
767 return 1;
768 }
769
770 /*
771 * Probe drive's capabilities, for use by the controller later
772 * Assumes drvp points to an existing drive.
773 */
774 void
775 ata_probe_caps(struct ata_drive_datas *drvp)
776 {
777 struct ataparams params, params2;
778 struct ata_channel *chp = drvp->chnl_softc;
779 struct atac_softc *atac = chp->ch_atac;
780 struct device *drv_dev = drvp->drv_softc;
781 int i, printed;
782 char *sep = "";
783 int cf_flags;
784
785 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) {
786 /* IDENTIFY failed. Can't tell more about the device */
787 return;
788 }
789 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) ==
790 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) {
791 /*
792 * Controller claims 16 and 32 bit transfers.
793 * Re-do an IDENTIFY with 32-bit transfers,
794 * and compare results.
795 */
796 drvp->drive_flags |= DRIVE_CAP32;
797 ata_get_params(drvp, AT_WAIT, ¶ms2);
798 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) {
799 /* Not good. fall back to 16bits */
800 drvp->drive_flags &= ~DRIVE_CAP32;
801 } else {
802 aprint_normal("%s: 32-bit data port\n",
803 drv_dev->dv_xname);
804 }
805 }
806 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
807 if (params.atap_ata_major > 0x01 &&
808 params.atap_ata_major != 0xffff) {
809 for (i = 14; i > 0; i--) {
810 if (params.atap_ata_major & (1 << i)) {
811 aprint_normal("%s: ATA version %d\n",
812 drv_dev->dv_xname, i);
813 drvp->ata_vers = i;
814 break;
815 }
816 }
817 }
818 #endif
819
820 /* An ATAPI device is at last PIO mode 3 */
821 if (drvp->drive_flags & DRIVE_ATAPI)
822 drvp->PIO_mode = 3;
823
824 /*
825 * It's not in the specs, but it seems that some drive
826 * returns 0xffff in atap_extensions when this field is invalid
827 */
828 if (params.atap_extensions != 0xffff &&
829 (params.atap_extensions & WDC_EXT_MODES)) {
830 printed = 0;
831 /*
832 * XXX some drives report something wrong here (they claim to
833 * support PIO mode 8 !). As mode is coded on 3 bits in
834 * SET FEATURE, limit it to 7 (so limit i to 4).
835 * If higher mode than 7 is found, abort.
836 */
837 for (i = 7; i >= 0; i--) {
838 if ((params.atap_piomode_supp & (1 << i)) == 0)
839 continue;
840 if (i > 4)
841 return;
842 /*
843 * See if mode is accepted.
844 * If the controller can't set its PIO mode,
845 * assume the defaults are good, so don't try
846 * to set it
847 */
848 if (atac->atac_set_modes)
849 /*
850 * It's OK to pool here, it's fast enouth
851 * to not bother waiting for interrupt
852 */
853 if (ata_set_mode(drvp, 0x08 | (i + 3),
854 AT_WAIT) != CMD_OK)
855 continue;
856 if (!printed) {
857 aprint_normal("%s: drive supports PIO mode %d",
858 drv_dev->dv_xname, i + 3);
859 sep = ",";
860 printed = 1;
861 }
862 /*
863 * If controller's driver can't set its PIO mode,
864 * get the highter one for the drive.
865 */
866 if (atac->atac_set_modes == NULL ||
867 atac->atac_pio_cap >= i + 3) {
868 drvp->PIO_mode = i + 3;
869 drvp->PIO_cap = i + 3;
870 break;
871 }
872 }
873 if (!printed) {
874 /*
875 * We didn't find a valid PIO mode.
876 * Assume the values returned for DMA are buggy too
877 */
878 return;
879 }
880 drvp->drive_flags |= DRIVE_MODE;
881 printed = 0;
882 for (i = 7; i >= 0; i--) {
883 if ((params.atap_dmamode_supp & (1 << i)) == 0)
884 continue;
885 if ((atac->atac_cap & ATAC_CAP_DMA) &&
886 atac->atac_set_modes != NULL)
887 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT)
888 != CMD_OK)
889 continue;
890 if (!printed) {
891 aprint_normal("%s DMA mode %d", sep, i);
892 sep = ",";
893 printed = 1;
894 }
895 if (atac->atac_cap & ATAC_CAP_DMA) {
896 if (atac->atac_set_modes != NULL &&
897 atac->atac_dma_cap < i)
898 continue;
899 drvp->DMA_mode = i;
900 drvp->DMA_cap = i;
901 drvp->drive_flags |= DRIVE_DMA;
902 }
903 break;
904 }
905 if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
906 printed = 0;
907 for (i = 7; i >= 0; i--) {
908 if ((params.atap_udmamode_supp & (1 << i))
909 == 0)
910 continue;
911 if (atac->atac_set_modes != NULL &&
912 (atac->atac_cap & ATAC_CAP_UDMA))
913 if (ata_set_mode(drvp, 0x40 | i,
914 AT_WAIT) != CMD_OK)
915 continue;
916 if (!printed) {
917 aprint_normal("%s Ultra-DMA mode %d",
918 sep, i);
919 if (i == 2)
920 aprint_normal(" (Ultra/33)");
921 else if (i == 4)
922 aprint_normal(" (Ultra/66)");
923 else if (i == 5)
924 aprint_normal(" (Ultra/100)");
925 else if (i == 6)
926 aprint_normal(" (Ultra/133)");
927 sep = ",";
928 printed = 1;
929 }
930 if (atac->atac_cap & ATAC_CAP_UDMA) {
931 if (atac->atac_set_modes != NULL &&
932 atac->atac_udma_cap < i)
933 continue;
934 drvp->UDMA_mode = i;
935 drvp->UDMA_cap = i;
936 drvp->drive_flags |= DRIVE_UDMA;
937 }
938 break;
939 }
940 }
941 aprint_normal("\n");
942 }
943
944 drvp->drive_flags &= ~DRIVE_NOSTREAM;
945 if (drvp->drive_flags & DRIVE_ATAPI) {
946 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM)
947 drvp->drive_flags |= DRIVE_NOSTREAM;
948 } else {
949 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM)
950 drvp->drive_flags |= DRIVE_NOSTREAM;
951 }
952
953 /* Try to guess ATA version here, if it didn't get reported */
954 if (drvp->ata_vers == 0) {
955 if (drvp->drive_flags & DRIVE_UDMA)
956 drvp->ata_vers = 4; /* should be at last ATA-4 */
957 else if (drvp->PIO_cap > 2)
958 drvp->ata_vers = 2; /* should be at last ATA-2 */
959 }
960 cf_flags = drv_dev->dv_cfdata->cf_flags;
961 if (cf_flags & ATA_CONFIG_PIO_SET) {
962 drvp->PIO_mode =
963 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
964 drvp->drive_flags |= DRIVE_MODE;
965 }
966 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) {
967 /* don't care about DMA modes */
968 return;
969 }
970 if (cf_flags & ATA_CONFIG_DMA_SET) {
971 if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
972 ATA_CONFIG_DMA_DISABLE) {
973 drvp->drive_flags &= ~DRIVE_DMA;
974 } else {
975 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
976 ATA_CONFIG_DMA_OFF;
977 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
978 }
979 }
980 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) {
981 /* don't care about UDMA modes */
982 return;
983 }
984 if (cf_flags & ATA_CONFIG_UDMA_SET) {
985 if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
986 ATA_CONFIG_UDMA_DISABLE) {
987 drvp->drive_flags &= ~DRIVE_UDMA;
988 } else {
989 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
990 ATA_CONFIG_UDMA_OFF;
991 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
992 }
993 }
994 }
995
996 /* management of the /dev/atabus* devices */
997 int atabusopen(dev, flag, fmt, p)
998 dev_t dev;
999 int flag, fmt;
1000 struct proc *p;
1001 {
1002 struct atabus_softc *sc;
1003 int error, unit = minor(dev);
1004
1005 if (unit >= atabus_cd.cd_ndevs ||
1006 (sc = atabus_cd.cd_devs[unit]) == NULL)
1007 return (ENXIO);
1008
1009 if (sc->sc_flags & ATABUSCF_OPEN)
1010 return (EBUSY);
1011
1012 if ((error = ata_addref(sc->sc_chan)) != 0)
1013 return (error);
1014
1015 sc->sc_flags |= ATABUSCF_OPEN;
1016
1017 return (0);
1018 }
1019
1020
1021 int
1022 atabusclose(dev, flag, fmt, p)
1023 dev_t dev;
1024 int flag, fmt;
1025 struct proc *p;
1026 {
1027 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1028
1029 ata_delref(sc->sc_chan);
1030
1031 sc->sc_flags &= ~ATABUSCF_OPEN;
1032
1033 return (0);
1034 }
1035
1036 int
1037 atabusioctl(dev, cmd, addr, flag, p)
1038 dev_t dev;
1039 u_long cmd;
1040 caddr_t addr;
1041 int flag;
1042 struct proc *p;
1043 {
1044 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1045 struct ata_channel *chp = sc->sc_chan;
1046 int min_drive, max_drive, drive;
1047 int error;
1048 int s;
1049
1050 /*
1051 * Enforce write permission for ioctls that change the
1052 * state of the bus. Host adapter specific ioctls must
1053 * be checked by the adapter driver.
1054 */
1055 switch (cmd) {
1056 case ATABUSIOSCAN:
1057 case ATABUSIODETACH:
1058 case ATABUSIORESET:
1059 if ((flag & FWRITE) == 0)
1060 return (EBADF);
1061 }
1062
1063 switch (cmd) {
1064 case ATABUSIORESET:
1065 s = splbio();
1066 wdc_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL);
1067 splx(s);
1068 error = 0;
1069 break;
1070 case ATABUSIOSCAN:
1071 {
1072 #if 0
1073 struct atabusioscan_args *a=
1074 (struct atabusioscan_args *)addr;
1075 #endif
1076 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1077 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1078 return (EOPNOTSUPP);
1079 return (EOPNOTSUPP);
1080 }
1081 case ATABUSIODETACH:
1082 {
1083 struct atabusioscan_args *a=
1084 (struct atabusioscan_args *)addr;
1085 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1086 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1087 return (EOPNOTSUPP);
1088 switch (a->at_dev) {
1089 case -1:
1090 min_drive = 0;
1091 max_drive = 1;
1092 break;
1093 case 0:
1094 case 1:
1095 min_drive = max_drive = a->at_dev;
1096 break;
1097 default:
1098 return (EINVAL);
1099 }
1100 for (drive = min_drive; drive <= max_drive; drive++) {
1101 if (chp->ch_drive[drive].drv_softc != NULL) {
1102 error = config_detach(
1103 chp->ch_drive[drive].drv_softc, 0);
1104 if (error)
1105 return (error);
1106 chp->ch_drive[drive].drv_softc = NULL;
1107 }
1108 }
1109 error = 0;
1110 break;
1111 }
1112 default:
1113 error = ENOTTY;
1114 }
1115 return (error);
1116 };
1117