ata.c revision 1.50 1 /* $NetBSD: ata.c,v 1.50 2004/08/20 20:53:20 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.50 2004/08/20 20:53:20 thorpej Exp $");
34
35 #ifndef ATADEBUG
36 #define ATADEBUG
37 #endif /* ATADEBUG */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/device.h>
44 #include <sys/conf.h>
45 #include <sys/fcntl.h>
46 #include <sys/proc.h>
47 #include <sys/pool.h>
48 #include <sys/kthread.h>
49 #include <sys/errno.h>
50 #include <sys/ataio.h>
51
52 #include <machine/intr.h>
53 #include <machine/bus.h>
54
55 #include <dev/ata/atareg.h>
56 #include <dev/ata/atavar.h>
57 #include <dev/ic/wdcreg.h>
58 #include <dev/ic/wdcvar.h>
59
60 #include "locators.h"
61
62 #define DEBUG_FUNCS 0x08
63 #define DEBUG_PROBE 0x10
64 #define DEBUG_DETACH 0x20
65 #define DEBUG_XFERS 0x40
66 #ifdef ATADEBUG
67 int atadebug_mask = 0;
68 #define ATADEBUG_PRINT(args, level) \
69 if (atadebug_mask & (level)) \
70 printf args
71 #else
72 #define ATADEBUG_PRINT(args, level)
73 #endif
74
75 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL);
76
77 /*****************************************************************************
78 * ATA bus layer.
79 *
80 * ATA controllers attach an atabus instance, which handles probing the bus
81 * for drives, etc.
82 *****************************************************************************/
83
84 dev_type_open(atabusopen);
85 dev_type_close(atabusclose);
86 dev_type_ioctl(atabusioctl);
87
88 const struct cdevsw atabus_cdevsw = {
89 atabusopen, atabusclose, noread, nowrite, atabusioctl,
90 nostop, notty, nopoll, nommap, nokqfilter,
91 };
92
93 extern struct cfdriver atabus_cd;
94
95
96 /*
97 * atabusprint:
98 *
99 * Autoconfiguration print routine used by ATA controllers when
100 * attaching an atabus instance.
101 */
102 int
103 atabusprint(void *aux, const char *pnp)
104 {
105 struct ata_channel *chan = aux;
106
107 if (pnp)
108 aprint_normal("atabus at %s", pnp);
109 aprint_normal(" channel %d", chan->ch_channel);
110
111 return (UNCONF);
112 }
113
114 /*
115 * ataprint:
116 *
117 * Autoconfiguration print routine.
118 */
119 int
120 ataprint(void *aux, const char *pnp)
121 {
122 struct ata_device *adev = aux;
123
124 if (pnp)
125 aprint_normal("wd at %s", pnp);
126 aprint_normal(" drive %d", adev->adev_drv_data->drive);
127
128 return (UNCONF);
129 }
130
131 /*
132 * atabus_thread:
133 *
134 * Worker thread for the ATA bus.
135 */
136 static void
137 atabus_thread(void *arg)
138 {
139 struct atabus_softc *sc = arg;
140 struct ata_channel *chp = sc->sc_chan;
141 struct ata_xfer *xfer;
142 int i, s;
143
144 s = splbio();
145 chp->ch_flags |= ATACH_TH_RUN;
146
147 /*
148 * Probe the drives. Reset all flags to 0 to indicate to controllers
149 * that can re-probe that all drives must be probed..
150 *
151 * Note: ch_ndrive may be changed during the probe.
152 */
153 for (i = 0; i < ATA_MAXDRIVES; i++)
154 chp->ch_drive[i].drive_flags = 0;
155 splx(s);
156
157 /* Configure the devices on the bus. */
158 atabusconfig(sc);
159
160 for (;;) {
161 s = splbio();
162 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 &&
163 (chp->ch_queue->active_xfer == NULL ||
164 chp->ch_queue->queue_freeze == 0)) {
165 chp->ch_flags &= ~ATACH_TH_RUN;
166 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0);
167 chp->ch_flags |= ATACH_TH_RUN;
168 }
169 splx(s);
170 if (chp->ch_flags & ATACH_SHUTDOWN)
171 break;
172 s = splbio();
173 if (chp->ch_flags & ATACH_TH_RESET) {
174 /*
175 * wdc_reset_channel() will freeze 2 times, so
176 * unfreeze one time. Not a problem as we're at splbio
177 */
178 chp->ch_queue->queue_freeze--;
179 wdc_reset_channel(chp, AT_WAIT | chp->ch_reset_flags);
180 } else if (chp->ch_queue->active_xfer != NULL &&
181 chp->ch_queue->queue_freeze == 1) {
182 /*
183 * Caller has bumped queue_freeze, decrease it.
184 */
185 chp->ch_queue->queue_freeze--;
186 xfer = chp->ch_queue->active_xfer;
187 KASSERT(xfer != NULL);
188 (*xfer->c_start)(chp, xfer);
189 } else if (chp->ch_queue->queue_freeze > 1)
190 panic("ata_thread: queue_freeze");
191 splx(s);
192 }
193 chp->ch_thread = NULL;
194 wakeup((void *)&chp->ch_flags);
195 kthread_exit(0);
196 }
197
198 /*
199 * atabus_create_thread:
200 *
201 * Helper routine to create the ATA bus worker thread.
202 */
203 static void
204 atabus_create_thread(void *arg)
205 {
206 struct atabus_softc *sc = arg;
207 struct ata_channel *chp = sc->sc_chan;
208 int error;
209
210 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread,
211 "%s", sc->sc_dev.dv_xname)) != 0)
212 aprint_error("%s: unable to create kernel thread: error %d\n",
213 sc->sc_dev.dv_xname, error);
214 }
215
216 /*
217 * atabus_match:
218 *
219 * Autoconfiguration match routine.
220 */
221 static int
222 atabus_match(struct device *parent, struct cfdata *cf, void *aux)
223 {
224 struct ata_channel *chp = aux;
225
226 if (chp == NULL)
227 return (0);
228
229 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel &&
230 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT)
231 return (0);
232
233 return (1);
234 }
235
236 /*
237 * atabus_attach:
238 *
239 * Autoconfiguration attach routine.
240 */
241 static void
242 atabus_attach(struct device *parent, struct device *self, void *aux)
243 {
244 struct atabus_softc *sc = (void *) self;
245 struct ata_channel *chp = aux;
246 struct atabus_initq *initq;
247
248 sc->sc_chan = chp;
249
250 aprint_normal("\n");
251 aprint_naive("\n");
252
253 if (ata_addref(chp))
254 return;
255
256 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK);
257 initq->atabus_sc = sc;
258 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq);
259 config_pending_incr();
260 kthread_create(atabus_create_thread, sc);
261 }
262
263 /*
264 * atabus_activate:
265 *
266 * Autoconfiguration activation routine.
267 */
268 static int
269 atabus_activate(struct device *self, enum devact act)
270 {
271 struct atabus_softc *sc = (void *) self;
272 struct ata_channel *chp = sc->sc_chan;
273 struct device *dev = NULL;
274 int s, i, error = 0;
275
276 s = splbio();
277 switch (act) {
278 case DVACT_ACTIVATE:
279 error = EOPNOTSUPP;
280 break;
281
282 case DVACT_DEACTIVATE:
283 /*
284 * We might deactivate the children of atapibus twice
285 * (once bia atapibus, once directly), but since the
286 * generic autoconfiguration code maintains the DVF_ACTIVE
287 * flag, it's safe.
288 */
289 if ((dev = chp->atapibus) != NULL) {
290 error = config_deactivate(dev);
291 if (error)
292 goto out;
293 }
294
295 for (i = 0; i < chp->ch_ndrive; i++) {
296 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
297 ATADEBUG_PRINT(("atabus_activate: %s: "
298 "deactivating %s\n", sc->sc_dev.dv_xname,
299 dev->dv_xname),
300 DEBUG_DETACH);
301 error = config_deactivate(dev);
302 if (error)
303 goto out;
304 }
305 }
306 break;
307 }
308 out:
309 splx(s);
310
311 #ifdef ATADEBUG
312 if (dev != NULL && error != 0)
313 ATADEBUG_PRINT(("atabus_activate: %s: "
314 "error %d deactivating %s\n", sc->sc_dev.dv_xname,
315 error, dev->dv_xname), DEBUG_DETACH);
316 #endif /* ATADEBUG */
317
318 return (error);
319 }
320
321 /*
322 * atabus_detach:
323 *
324 * Autoconfiguration detach routine.
325 */
326 static int
327 atabus_detach(struct device *self, int flags)
328 {
329 struct atabus_softc *sc = (void *) self;
330 struct ata_channel *chp = sc->sc_chan;
331 struct device *dev = NULL;
332 int i, error = 0;
333
334 /* Shutdown the channel. */
335 /* XXX NEED AN INTERLOCK HERE. */
336 chp->ch_flags |= ATACH_SHUTDOWN;
337 wakeup(&chp->ch_thread);
338 while (chp->ch_thread != NULL)
339 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0);
340
341 /*
342 * Detach atapibus and its children.
343 */
344 if ((dev = chp->atapibus) != NULL) {
345 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
346 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH);
347 error = config_detach(dev, flags);
348 if (error)
349 goto out;
350 }
351
352 /*
353 * Detach our other children.
354 */
355 for (i = 0; i < chp->ch_ndrive; i++) {
356 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI)
357 continue;
358 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
359 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
360 sc->sc_dev.dv_xname, dev->dv_xname),
361 DEBUG_DETACH);
362 error = config_detach(dev, flags);
363 if (error)
364 goto out;
365 }
366 }
367
368 out:
369 #ifdef ATADEBUG
370 if (dev != NULL && error != 0)
371 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n",
372 sc->sc_dev.dv_xname, error, dev->dv_xname),
373 DEBUG_DETACH);
374 #endif /* ATADEBUG */
375
376 return (error);
377 }
378
379 CFATTACH_DECL(atabus, sizeof(struct atabus_softc),
380 atabus_match, atabus_attach, atabus_detach, atabus_activate);
381
382 /*****************************************************************************
383 * Common ATA bus operations.
384 *****************************************************************************/
385
386 /* Get the disk's parameters */
387 int
388 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags,
389 struct ataparams *prms)
390 {
391 char tb[DEV_BSIZE];
392 struct ata_command ata_c;
393 struct ata_channel *chp = drvp->chnl_softc;
394 struct atac_softc *atac = chp->ch_atac;
395
396 #if BYTE_ORDER == LITTLE_ENDIAN
397 int i;
398 u_int16_t *p;
399 #endif
400
401 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS);
402
403 memset(tb, 0, DEV_BSIZE);
404 memset(prms, 0, sizeof(struct ataparams));
405 memset(&ata_c, 0, sizeof(struct ata_command));
406
407 if (drvp->drive_flags & DRIVE_ATA) {
408 ata_c.r_command = WDCC_IDENTIFY;
409 ata_c.r_st_bmask = WDCS_DRDY;
410 ata_c.r_st_pmask = 0;
411 ata_c.timeout = 3000; /* 3s */
412 } else if (drvp->drive_flags & DRIVE_ATAPI) {
413 ata_c.r_command = ATAPI_IDENTIFY_DEVICE;
414 ata_c.r_st_bmask = 0;
415 ata_c.r_st_pmask = 0;
416 ata_c.timeout = 10000; /* 10s */
417 } else {
418 ATADEBUG_PRINT(("ata_get_parms: no disks\n"),
419 DEBUG_FUNCS|DEBUG_PROBE);
420 return CMD_ERR;
421 }
422 ata_c.flags = AT_READ | flags;
423 ata_c.data = tb;
424 ata_c.bcount = DEV_BSIZE;
425 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp,
426 &ata_c) != ATACMD_COMPLETE) {
427 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"),
428 DEBUG_FUNCS|DEBUG_PROBE);
429 return CMD_AGAIN;
430 }
431 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
432 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n",
433 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE);
434 return CMD_ERR;
435 } else {
436 /* if we didn't read any data something is wrong */
437 if ((ata_c.flags & AT_XFDONE) == 0)
438 return CMD_ERR;
439 /* Read in parameter block. */
440 memcpy(prms, tb, sizeof(struct ataparams));
441 #if BYTE_ORDER == LITTLE_ENDIAN
442 /*
443 * Shuffle string byte order.
444 * ATAPI Mitsumi and NEC drives don't need this.
445 */
446 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) ==
447 WDC_CFG_ATAPI &&
448 ((prms->atap_model[0] == 'N' &&
449 prms->atap_model[1] == 'E') ||
450 (prms->atap_model[0] == 'F' &&
451 prms->atap_model[1] == 'X')))
452 return 0;
453 for (i = 0; i < sizeof(prms->atap_model); i += 2) {
454 p = (u_short *)(prms->atap_model + i);
455 *p = ntohs(*p);
456 }
457 for (i = 0; i < sizeof(prms->atap_serial); i += 2) {
458 p = (u_short *)(prms->atap_serial + i);
459 *p = ntohs(*p);
460 }
461 for (i = 0; i < sizeof(prms->atap_revision); i += 2) {
462 p = (u_short *)(prms->atap_revision + i);
463 *p = ntohs(*p);
464 }
465 #endif
466 return CMD_OK;
467 }
468 }
469
470 int
471 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags)
472 {
473 struct ata_command ata_c;
474 struct ata_channel *chp = drvp->chnl_softc;
475 struct atac_softc *atac = chp->ch_atac;
476
477 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS);
478 memset(&ata_c, 0, sizeof(struct ata_command));
479
480 ata_c.r_command = SET_FEATURES;
481 ata_c.r_st_bmask = 0;
482 ata_c.r_st_pmask = 0;
483 ata_c.r_features = WDSF_SET_MODE;
484 ata_c.r_count = mode;
485 ata_c.flags = flags;
486 ata_c.timeout = 1000; /* 1s */
487 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp,
488 &ata_c) != ATACMD_COMPLETE)
489 return CMD_AGAIN;
490 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
491 return CMD_ERR;
492 }
493 return CMD_OK;
494 }
495
496 void
497 ata_dmaerr(struct ata_drive_datas *drvp, int flags)
498 {
499 /*
500 * Downgrade decision: if we get NERRS_MAX in NXFER.
501 * We start with n_dmaerrs set to NERRS_MAX-1 so that the
502 * first error within the first NXFER ops will immediatly trigger
503 * a downgrade.
504 * If we got an error and n_xfers is bigger than NXFER reset counters.
505 */
506 drvp->n_dmaerrs++;
507 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) {
508 ata_downgrade_mode(drvp, flags);
509 drvp->n_dmaerrs = NERRS_MAX-1;
510 drvp->n_xfers = 0;
511 return;
512 }
513 if (drvp->n_xfers > NXFER) {
514 drvp->n_dmaerrs = 1; /* just got an error */
515 drvp->n_xfers = 1; /* restart counting from this error */
516 }
517 }
518
519 /*
520 * Add a command to the queue and start controller. Must be called at splbio
521 */
522 void
523 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
524 {
525
526 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer,
527 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
528
529 /* complete xfer setup */
530 xfer->c_chp = chp;
531
532 /* insert at the end of command list */
533 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
534 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n",
535 chp->ch_flags), DEBUG_XFERS);
536 atastart(chp);
537 }
538
539 /*
540 * Start I/O on a controller, for the given channel.
541 * The first xfer may be not for our channel if the channel queues
542 * are shared.
543 */
544 void
545 atastart(struct ata_channel *chp)
546 {
547 struct atac_softc *atac = chp->ch_atac;
548 struct ata_xfer *xfer;
549
550 #ifdef WDC_DIAGNOSTIC
551 int spl1, spl2;
552
553 spl1 = splbio();
554 spl2 = splbio();
555 if (spl2 != spl1) {
556 printf("atastart: not at splbio()\n");
557 panic("atastart");
558 }
559 splx(spl2);
560 splx(spl1);
561 #endif /* WDC_DIAGNOSTIC */
562
563 /* is there a xfer ? */
564 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL)
565 return;
566
567 /* adjust chp, in case we have a shared queue */
568 chp = xfer->c_chp;
569
570 if (chp->ch_queue->active_xfer != NULL) {
571 return; /* channel aleady active */
572 }
573 if (__predict_false(chp->ch_queue->queue_freeze > 0)) {
574 return; /* queue froozen */
575 }
576 #ifdef DIAGNOSTIC
577 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0)
578 panic("atastart: channel waiting for irq");
579 #endif
580 if (atac->atac_claim_hw)
581 if (!(*atac->atac_claim_hw)(chp, 0))
582 return;
583
584 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer,
585 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
586 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) {
587 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET;
588 chp->ch_drive[xfer->c_drive].state = 0;
589 }
590 chp->ch_queue->active_xfer = xfer;
591 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
592
593 if (atac->atac_cap & ATAC_CAP_NOIRQ)
594 KASSERT(xfer->c_flags & C_POLL);
595 xfer->c_start(chp, xfer);
596 }
597
598 struct ata_xfer *
599 ata_get_xfer(int flags)
600 {
601 struct ata_xfer *xfer;
602 int s;
603
604 s = splbio();
605 xfer = pool_get(&ata_xfer_pool,
606 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK));
607 splx(s);
608 if (xfer != NULL) {
609 memset(xfer, 0, sizeof(struct ata_xfer));
610 }
611 return xfer;
612 }
613
614 void
615 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
616 {
617 struct atac_softc *atac = chp->ch_atac;
618 int s;
619
620 if (atac->atac_free_hw)
621 (*atac->atac_free_hw)(chp);
622 s = splbio();
623 pool_put(&ata_xfer_pool, xfer);
624 splx(s);
625 }
626
627 /*
628 * Kill off all pending xfers for a ata_channel.
629 *
630 * Must be called at splbio().
631 */
632 void
633 ata_kill_pending(struct ata_drive_datas *drvp)
634 {
635 struct ata_channel *chp = drvp->chnl_softc;
636 struct ata_xfer *xfer, *next_xfer;
637 int s = splbio();
638
639 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
640 xfer != NULL; xfer = next_xfer) {
641 next_xfer = TAILQ_NEXT(xfer, c_xferchain);
642 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive)
643 continue;
644 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
645 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE);
646 }
647
648 while ((xfer = chp->ch_queue->active_xfer) != NULL) {
649 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) {
650 drvp->drive_flags |= DRIVE_WAITDRAIN;
651 (void) tsleep(&chp->ch_queue->active_xfer,
652 PRIBIO, "atdrn", 0);
653 } else {
654 /* no more xfer for us */
655 break;
656 }
657 }
658 splx(s);
659 }
660
661 int
662 ata_addref(struct ata_channel *chp)
663 {
664 struct atac_softc *atac = chp->ch_atac;
665 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
666 int s, error = 0;
667
668 s = splbio();
669 if (adapt->adapt_refcnt++ == 0 &&
670 adapt->adapt_enable != NULL) {
671 error = (*adapt->adapt_enable)(&atac->atac_dev, 1);
672 if (error)
673 adapt->adapt_refcnt--;
674 }
675 splx(s);
676 return (error);
677 }
678
679 void
680 ata_delref(struct ata_channel *chp)
681 {
682 struct atac_softc *atac = chp->ch_atac;
683 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
684 int s;
685
686 s = splbio();
687 if (adapt->adapt_refcnt-- == 1 &&
688 adapt->adapt_enable != NULL)
689 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0);
690 splx(s);
691 }
692
693 void
694 ata_print_modes(struct ata_channel *chp)
695 {
696 struct atac_softc *atac = chp->ch_atac;
697 int drive;
698 struct ata_drive_datas *drvp;
699
700 for (drive = 0; drive < 2; drive++) {
701 drvp = &chp->ch_drive[drive];
702 if ((drvp->drive_flags & DRIVE) == 0)
703 continue;
704 aprint_normal("%s(%s:%d:%d): using PIO mode %d",
705 drvp->drv_softc->dv_xname,
706 atac->atac_dev.dv_xname,
707 chp->ch_channel, drive, drvp->PIO_mode);
708 if (drvp->drive_flags & DRIVE_DMA)
709 aprint_normal(", DMA mode %d", drvp->DMA_mode);
710 if (drvp->drive_flags & DRIVE_UDMA) {
711 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode);
712 if (drvp->UDMA_mode == 2)
713 aprint_normal(" (Ultra/33)");
714 else if (drvp->UDMA_mode == 4)
715 aprint_normal(" (Ultra/66)");
716 else if (drvp->UDMA_mode == 5)
717 aprint_normal(" (Ultra/100)");
718 else if (drvp->UDMA_mode == 6)
719 aprint_normal(" (Ultra/133)");
720 }
721 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
722 aprint_normal(" (using DMA data transfers)");
723 aprint_normal("\n");
724 }
725 }
726
727 /*
728 * downgrade the transfer mode of a drive after an error. return 1 if
729 * downgrade was possible, 0 otherwise.
730 */
731 int
732 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags)
733 {
734 struct ata_channel *chp = drvp->chnl_softc;
735 struct atac_softc *atac = chp->ch_atac;
736 struct device *drv_dev = drvp->drv_softc;
737 int cf_flags = drv_dev->dv_cfdata->cf_flags;
738
739 /* if drive or controller don't know its mode, we can't do much */
740 if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
741 (atac->atac_set_modes == NULL))
742 return 0;
743 /* current drive mode was set by a config flag, let it this way */
744 if ((cf_flags & ATA_CONFIG_PIO_SET) ||
745 (cf_flags & ATA_CONFIG_DMA_SET) ||
746 (cf_flags & ATA_CONFIG_UDMA_SET))
747 return 0;
748
749 /*
750 * If we were using Ultra-DMA mode, downgrade to the next lower mode.
751 */
752 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) {
753 drvp->UDMA_mode--;
754 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n",
755 drv_dev->dv_xname, drvp->UDMA_mode);
756 }
757
758 /*
759 * If we were using ultra-DMA, don't downgrade to multiword DMA.
760 */
761 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
762 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
763 drvp->PIO_mode = drvp->PIO_cap;
764 printf("%s: transfer error, downgrading to PIO mode %d\n",
765 drv_dev->dv_xname, drvp->PIO_mode);
766 } else /* already using PIO, can't downgrade */
767 return 0;
768
769 (*atac->atac_set_modes)(chp);
770 ata_print_modes(chp);
771 /* reset the channel, which will shedule all drives for setup */
772 wdc_reset_channel(chp, flags | AT_RST_NOCMD);
773 return 1;
774 }
775
776 /*
777 * Probe drive's capabilities, for use by the controller later
778 * Assumes drvp points to an existing drive.
779 */
780 void
781 ata_probe_caps(struct ata_drive_datas *drvp)
782 {
783 struct ataparams params, params2;
784 struct ata_channel *chp = drvp->chnl_softc;
785 struct atac_softc *atac = chp->ch_atac;
786 struct device *drv_dev = drvp->drv_softc;
787 int i, printed;
788 char *sep = "";
789 int cf_flags;
790
791 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) {
792 /* IDENTIFY failed. Can't tell more about the device */
793 return;
794 }
795 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) ==
796 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) {
797 /*
798 * Controller claims 16 and 32 bit transfers.
799 * Re-do an IDENTIFY with 32-bit transfers,
800 * and compare results.
801 */
802 drvp->drive_flags |= DRIVE_CAP32;
803 ata_get_params(drvp, AT_WAIT, ¶ms2);
804 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) {
805 /* Not good. fall back to 16bits */
806 drvp->drive_flags &= ~DRIVE_CAP32;
807 } else {
808 aprint_normal("%s: 32-bit data port\n",
809 drv_dev->dv_xname);
810 }
811 }
812 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
813 if (params.atap_ata_major > 0x01 &&
814 params.atap_ata_major != 0xffff) {
815 for (i = 14; i > 0; i--) {
816 if (params.atap_ata_major & (1 << i)) {
817 aprint_normal("%s: ATA version %d\n",
818 drv_dev->dv_xname, i);
819 drvp->ata_vers = i;
820 break;
821 }
822 }
823 }
824 #endif
825
826 /* An ATAPI device is at last PIO mode 3 */
827 if (drvp->drive_flags & DRIVE_ATAPI)
828 drvp->PIO_mode = 3;
829
830 /*
831 * It's not in the specs, but it seems that some drive
832 * returns 0xffff in atap_extensions when this field is invalid
833 */
834 if (params.atap_extensions != 0xffff &&
835 (params.atap_extensions & WDC_EXT_MODES)) {
836 printed = 0;
837 /*
838 * XXX some drives report something wrong here (they claim to
839 * support PIO mode 8 !). As mode is coded on 3 bits in
840 * SET FEATURE, limit it to 7 (so limit i to 4).
841 * If higher mode than 7 is found, abort.
842 */
843 for (i = 7; i >= 0; i--) {
844 if ((params.atap_piomode_supp & (1 << i)) == 0)
845 continue;
846 if (i > 4)
847 return;
848 /*
849 * See if mode is accepted.
850 * If the controller can't set its PIO mode,
851 * assume the defaults are good, so don't try
852 * to set it
853 */
854 if (atac->atac_set_modes)
855 /*
856 * It's OK to pool here, it's fast enouth
857 * to not bother waiting for interrupt
858 */
859 if (ata_set_mode(drvp, 0x08 | (i + 3),
860 AT_WAIT) != CMD_OK)
861 continue;
862 if (!printed) {
863 aprint_normal("%s: drive supports PIO mode %d",
864 drv_dev->dv_xname, i + 3);
865 sep = ",";
866 printed = 1;
867 }
868 /*
869 * If controller's driver can't set its PIO mode,
870 * get the highter one for the drive.
871 */
872 if (atac->atac_set_modes == NULL ||
873 atac->atac_pio_cap >= i + 3) {
874 drvp->PIO_mode = i + 3;
875 drvp->PIO_cap = i + 3;
876 break;
877 }
878 }
879 if (!printed) {
880 /*
881 * We didn't find a valid PIO mode.
882 * Assume the values returned for DMA are buggy too
883 */
884 return;
885 }
886 drvp->drive_flags |= DRIVE_MODE;
887 printed = 0;
888 for (i = 7; i >= 0; i--) {
889 if ((params.atap_dmamode_supp & (1 << i)) == 0)
890 continue;
891 if ((atac->atac_cap & ATAC_CAP_DMA) &&
892 atac->atac_set_modes != NULL)
893 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT)
894 != CMD_OK)
895 continue;
896 if (!printed) {
897 aprint_normal("%s DMA mode %d", sep, i);
898 sep = ",";
899 printed = 1;
900 }
901 if (atac->atac_cap & ATAC_CAP_DMA) {
902 if (atac->atac_set_modes != NULL &&
903 atac->atac_dma_cap < i)
904 continue;
905 drvp->DMA_mode = i;
906 drvp->DMA_cap = i;
907 drvp->drive_flags |= DRIVE_DMA;
908 }
909 break;
910 }
911 if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
912 printed = 0;
913 for (i = 7; i >= 0; i--) {
914 if ((params.atap_udmamode_supp & (1 << i))
915 == 0)
916 continue;
917 if (atac->atac_set_modes != NULL &&
918 (atac->atac_cap & ATAC_CAP_UDMA))
919 if (ata_set_mode(drvp, 0x40 | i,
920 AT_WAIT) != CMD_OK)
921 continue;
922 if (!printed) {
923 aprint_normal("%s Ultra-DMA mode %d",
924 sep, i);
925 if (i == 2)
926 aprint_normal(" (Ultra/33)");
927 else if (i == 4)
928 aprint_normal(" (Ultra/66)");
929 else if (i == 5)
930 aprint_normal(" (Ultra/100)");
931 else if (i == 6)
932 aprint_normal(" (Ultra/133)");
933 sep = ",";
934 printed = 1;
935 }
936 if (atac->atac_cap & ATAC_CAP_UDMA) {
937 if (atac->atac_set_modes != NULL &&
938 atac->atac_udma_cap < i)
939 continue;
940 drvp->UDMA_mode = i;
941 drvp->UDMA_cap = i;
942 drvp->drive_flags |= DRIVE_UDMA;
943 }
944 break;
945 }
946 }
947 aprint_normal("\n");
948 }
949
950 drvp->drive_flags &= ~DRIVE_NOSTREAM;
951 if (drvp->drive_flags & DRIVE_ATAPI) {
952 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM)
953 drvp->drive_flags |= DRIVE_NOSTREAM;
954 } else {
955 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM)
956 drvp->drive_flags |= DRIVE_NOSTREAM;
957 }
958
959 /* Try to guess ATA version here, if it didn't get reported */
960 if (drvp->ata_vers == 0) {
961 if (drvp->drive_flags & DRIVE_UDMA)
962 drvp->ata_vers = 4; /* should be at last ATA-4 */
963 else if (drvp->PIO_cap > 2)
964 drvp->ata_vers = 2; /* should be at last ATA-2 */
965 }
966 cf_flags = drv_dev->dv_cfdata->cf_flags;
967 if (cf_flags & ATA_CONFIG_PIO_SET) {
968 drvp->PIO_mode =
969 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
970 drvp->drive_flags |= DRIVE_MODE;
971 }
972 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) {
973 /* don't care about DMA modes */
974 return;
975 }
976 if (cf_flags & ATA_CONFIG_DMA_SET) {
977 if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
978 ATA_CONFIG_DMA_DISABLE) {
979 drvp->drive_flags &= ~DRIVE_DMA;
980 } else {
981 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
982 ATA_CONFIG_DMA_OFF;
983 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
984 }
985 }
986 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) {
987 /* don't care about UDMA modes */
988 return;
989 }
990 if (cf_flags & ATA_CONFIG_UDMA_SET) {
991 if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
992 ATA_CONFIG_UDMA_DISABLE) {
993 drvp->drive_flags &= ~DRIVE_UDMA;
994 } else {
995 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
996 ATA_CONFIG_UDMA_OFF;
997 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
998 }
999 }
1000 }
1001
1002 /* management of the /dev/atabus* devices */
1003 int atabusopen(dev, flag, fmt, p)
1004 dev_t dev;
1005 int flag, fmt;
1006 struct proc *p;
1007 {
1008 struct atabus_softc *sc;
1009 int error, unit = minor(dev);
1010
1011 if (unit >= atabus_cd.cd_ndevs ||
1012 (sc = atabus_cd.cd_devs[unit]) == NULL)
1013 return (ENXIO);
1014
1015 if (sc->sc_flags & ATABUSCF_OPEN)
1016 return (EBUSY);
1017
1018 if ((error = ata_addref(sc->sc_chan)) != 0)
1019 return (error);
1020
1021 sc->sc_flags |= ATABUSCF_OPEN;
1022
1023 return (0);
1024 }
1025
1026
1027 int
1028 atabusclose(dev, flag, fmt, p)
1029 dev_t dev;
1030 int flag, fmt;
1031 struct proc *p;
1032 {
1033 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1034
1035 ata_delref(sc->sc_chan);
1036
1037 sc->sc_flags &= ~ATABUSCF_OPEN;
1038
1039 return (0);
1040 }
1041
1042 int
1043 atabusioctl(dev, cmd, addr, flag, p)
1044 dev_t dev;
1045 u_long cmd;
1046 caddr_t addr;
1047 int flag;
1048 struct proc *p;
1049 {
1050 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1051 struct ata_channel *chp = sc->sc_chan;
1052 int min_drive, max_drive, drive;
1053 int error;
1054 int s;
1055
1056 /*
1057 * Enforce write permission for ioctls that change the
1058 * state of the bus. Host adapter specific ioctls must
1059 * be checked by the adapter driver.
1060 */
1061 switch (cmd) {
1062 case ATABUSIOSCAN:
1063 case ATABUSIODETACH:
1064 case ATABUSIORESET:
1065 if ((flag & FWRITE) == 0)
1066 return (EBADF);
1067 }
1068
1069 switch (cmd) {
1070 case ATABUSIORESET:
1071 s = splbio();
1072 wdc_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL);
1073 splx(s);
1074 error = 0;
1075 break;
1076 case ATABUSIOSCAN:
1077 {
1078 #if 0
1079 struct atabusioscan_args *a=
1080 (struct atabusioscan_args *)addr;
1081 #endif
1082 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1083 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1084 return (EOPNOTSUPP);
1085 return (EOPNOTSUPP);
1086 }
1087 case ATABUSIODETACH:
1088 {
1089 struct atabusioscan_args *a=
1090 (struct atabusioscan_args *)addr;
1091 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1092 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1093 return (EOPNOTSUPP);
1094 switch (a->at_dev) {
1095 case -1:
1096 min_drive = 0;
1097 max_drive = 1;
1098 break;
1099 case 0:
1100 case 1:
1101 min_drive = max_drive = a->at_dev;
1102 break;
1103 default:
1104 return (EINVAL);
1105 }
1106 for (drive = min_drive; drive <= max_drive; drive++) {
1107 if (chp->ch_drive[drive].drv_softc != NULL) {
1108 error = config_detach(
1109 chp->ch_drive[drive].drv_softc, 0);
1110 if (error)
1111 return (error);
1112 chp->ch_drive[drive].drv_softc = NULL;
1113 }
1114 }
1115 error = 0;
1116 break;
1117 }
1118 default:
1119 error = ENOTTY;
1120 }
1121 return (error);
1122 };
1123