ata.c revision 1.51 1 /* $NetBSD: ata.c,v 1.51 2004/08/20 22:02:40 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998, 2001 Manuel Bouyer. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ata.c,v 1.51 2004/08/20 22:02:40 thorpej Exp $");
34
35 #ifndef ATADEBUG
36 #define ATADEBUG
37 #endif /* ATADEBUG */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/device.h>
44 #include <sys/conf.h>
45 #include <sys/fcntl.h>
46 #include <sys/proc.h>
47 #include <sys/pool.h>
48 #include <sys/kthread.h>
49 #include <sys/errno.h>
50 #include <sys/ataio.h>
51
52 #include <machine/intr.h>
53 #include <machine/bus.h>
54
55 #include <dev/ata/atareg.h>
56 #include <dev/ata/atavar.h>
57 #include <dev/ic/wdcreg.h>
58 #include <dev/ic/wdcvar.h>
59
60 #include "locators.h"
61
62 #include "atapibus.h"
63 #include "ataraid.h"
64
65 #if NATARAID > 0
66 #include <dev/ata/ata_raidvar.h>
67 #endif
68
69 #define DEBUG_FUNCS 0x08
70 #define DEBUG_PROBE 0x10
71 #define DEBUG_DETACH 0x20
72 #define DEBUG_XFERS 0x40
73 #ifdef ATADEBUG
74 int atadebug_mask = 0;
75 #define ATADEBUG_PRINT(args, level) \
76 if (atadebug_mask & (level)) \
77 printf args
78 #else
79 #define ATADEBUG_PRINT(args, level)
80 #endif
81
82 POOL_INIT(ata_xfer_pool, sizeof(struct ata_xfer), 0, 0, 0, "ataspl", NULL);
83
84 /*
85 * A queue of atabus instances, used to ensure the same bus probe order
86 * for a given hardware configuration at each boot.
87 */
88 struct atabus_initq_head atabus_initq_head =
89 TAILQ_HEAD_INITIALIZER(atabus_initq_head);
90 struct simplelock atabus_interlock = SIMPLELOCK_INITIALIZER;
91
92 /*****************************************************************************
93 * ATA bus layer.
94 *
95 * ATA controllers attach an atabus instance, which handles probing the bus
96 * for drives, etc.
97 *****************************************************************************/
98
99 dev_type_open(atabusopen);
100 dev_type_close(atabusclose);
101 dev_type_ioctl(atabusioctl);
102
103 const struct cdevsw atabus_cdevsw = {
104 atabusopen, atabusclose, noread, nowrite, atabusioctl,
105 nostop, notty, nopoll, nommap, nokqfilter,
106 };
107
108 extern struct cfdriver atabus_cd;
109
110
111 /*
112 * atabusprint:
113 *
114 * Autoconfiguration print routine used by ATA controllers when
115 * attaching an atabus instance.
116 */
117 int
118 atabusprint(void *aux, const char *pnp)
119 {
120 struct ata_channel *chan = aux;
121
122 if (pnp)
123 aprint_normal("atabus at %s", pnp);
124 aprint_normal(" channel %d", chan->ch_channel);
125
126 return (UNCONF);
127 }
128
129 /*
130 * ataprint:
131 *
132 * Autoconfiguration print routine.
133 */
134 int
135 ataprint(void *aux, const char *pnp)
136 {
137 struct ata_device *adev = aux;
138
139 if (pnp)
140 aprint_normal("wd at %s", pnp);
141 aprint_normal(" drive %d", adev->adev_drv_data->drive);
142
143 return (UNCONF);
144 }
145
146 static void
147 atabusconfig(struct atabus_softc *atabus_sc)
148 {
149 struct ata_channel *chp = atabus_sc->sc_chan;
150 struct atac_softc *atac = chp->ch_atac;
151 int i;
152 struct atabus_initq *atabus_initq = NULL;
153
154 /* Probe for the drives. */
155 (*atac->atac_probe)(chp);
156
157 ATADEBUG_PRINT(("atabusattach: ch_drive_flags 0x%x 0x%x\n",
158 chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags),
159 DEBUG_PROBE);
160
161 /* If no drives, abort here */
162 for (i = 0; i < chp->ch_ndrive; i++)
163 if ((chp->ch_drive[i].drive_flags & DRIVE) != 0)
164 break;
165 if (i == chp->ch_ndrive)
166 goto out;
167
168 /* Shortcut in case we've been shutdown */
169 if (chp->ch_flags & ATACH_SHUTDOWN)
170 goto out;
171
172 /* Make sure the devices probe in atabus order to avoid jitter. */
173 simple_lock(&atabus_interlock);
174 while(1) {
175 atabus_initq = TAILQ_FIRST(&atabus_initq_head);
176 if (atabus_initq->atabus_sc == atabus_sc)
177 break;
178 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
179 &atabus_interlock);
180 }
181 simple_unlock(&atabus_interlock);
182
183 /*
184 * Attach an ATAPI bus, if needed.
185 */
186 for (i = 0; i < chp->ch_ndrive; i++) {
187 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI) {
188 #if NATAPIBUS > 0
189 (*atac->atac_atapibus_attach)(atabus_sc);
190 #else
191 /*
192 * Fake the autoconfig "not configured" message
193 */
194 aprint_normal("atapibus at %s not configured\n",
195 atac->atac_dev.dv_xname);
196 chp->atapibus = NULL;
197 for (i = 0; i < chp->ch_ndrive; i++)
198 chp->ch_drive[i].drive_flags &= ~DRIVE_ATAPI;
199 #endif
200 break;
201 }
202 }
203
204 for (i = 0; i < chp->ch_ndrive; i++) {
205 struct ata_device adev;
206 if ((chp->ch_drive[i].drive_flags &
207 (DRIVE_ATA | DRIVE_OLD)) == 0) {
208 continue;
209 }
210 memset(&adev, 0, sizeof(struct ata_device));
211 adev.adev_bustype = atac->atac_bustype_ata;
212 adev.adev_channel = chp->ch_channel;
213 adev.adev_openings = 1;
214 adev.adev_drv_data = &chp->ch_drive[i];
215 chp->ata_drives[i] = config_found(&atabus_sc->sc_dev,
216 &adev, ataprint);
217 if (chp->ata_drives[i] != NULL)
218 ata_probe_caps(&chp->ch_drive[i]);
219 else
220 chp->ch_drive[i].drive_flags &=
221 ~(DRIVE_ATA | DRIVE_OLD);
222 }
223
224 /* now that we know the drives, the controller can set its modes */
225 if (atac->atac_set_modes) {
226 (*atac->atac_set_modes)(chp);
227 ata_print_modes(chp);
228 }
229 #if NATARAID > 0
230 if (atac->atac_cap & ATAC_CAP_RAID)
231 for (i = 0; i < chp->ch_ndrive; i++)
232 if (chp->ata_drives[i] != NULL)
233 ata_raid_check_component(chp->ata_drives[i]);
234 #endif /* NATARAID > 0 */
235
236 /*
237 * reset drive_flags for unattached devices, reset state for attached
238 * ones
239 */
240 for (i = 0; i < chp->ch_ndrive; i++) {
241 if (chp->ch_drive[i].drv_softc == NULL)
242 chp->ch_drive[i].drive_flags = 0;
243 else
244 chp->ch_drive[i].state = 0;
245 }
246
247 out:
248 if (atabus_initq == NULL) {
249 simple_lock(&atabus_interlock);
250 while(1) {
251 atabus_initq = TAILQ_FIRST(&atabus_initq_head);
252 if (atabus_initq->atabus_sc == atabus_sc)
253 break;
254 ltsleep(&atabus_initq_head, PRIBIO, "ata_initq", 0,
255 &atabus_interlock);
256 }
257 simple_unlock(&atabus_interlock);
258 }
259 simple_lock(&atabus_interlock);
260 TAILQ_REMOVE(&atabus_initq_head, atabus_initq, atabus_initq);
261 simple_unlock(&atabus_interlock);
262
263 free(atabus_initq, M_DEVBUF);
264 wakeup(&atabus_initq_head);
265
266 ata_delref(chp);
267
268 config_pending_decr();
269 }
270
271 /*
272 * atabus_thread:
273 *
274 * Worker thread for the ATA bus.
275 */
276 static void
277 atabus_thread(void *arg)
278 {
279 struct atabus_softc *sc = arg;
280 struct ata_channel *chp = sc->sc_chan;
281 struct ata_xfer *xfer;
282 int i, s;
283
284 s = splbio();
285 chp->ch_flags |= ATACH_TH_RUN;
286
287 /*
288 * Probe the drives. Reset all flags to 0 to indicate to controllers
289 * that can re-probe that all drives must be probed..
290 *
291 * Note: ch_ndrive may be changed during the probe.
292 */
293 for (i = 0; i < ATA_MAXDRIVES; i++)
294 chp->ch_drive[i].drive_flags = 0;
295 splx(s);
296
297 /* Configure the devices on the bus. */
298 atabusconfig(sc);
299
300 for (;;) {
301 s = splbio();
302 if ((chp->ch_flags & (ATACH_TH_RESET | ATACH_SHUTDOWN)) == 0 &&
303 (chp->ch_queue->active_xfer == NULL ||
304 chp->ch_queue->queue_freeze == 0)) {
305 chp->ch_flags &= ~ATACH_TH_RUN;
306 (void) tsleep(&chp->ch_thread, PRIBIO, "atath", 0);
307 chp->ch_flags |= ATACH_TH_RUN;
308 }
309 splx(s);
310 if (chp->ch_flags & ATACH_SHUTDOWN)
311 break;
312 s = splbio();
313 if (chp->ch_flags & ATACH_TH_RESET) {
314 /*
315 * wdc_reset_channel() will freeze 2 times, so
316 * unfreeze one time. Not a problem as we're at splbio
317 */
318 chp->ch_queue->queue_freeze--;
319 wdc_reset_channel(chp, AT_WAIT | chp->ch_reset_flags);
320 } else if (chp->ch_queue->active_xfer != NULL &&
321 chp->ch_queue->queue_freeze == 1) {
322 /*
323 * Caller has bumped queue_freeze, decrease it.
324 */
325 chp->ch_queue->queue_freeze--;
326 xfer = chp->ch_queue->active_xfer;
327 KASSERT(xfer != NULL);
328 (*xfer->c_start)(chp, xfer);
329 } else if (chp->ch_queue->queue_freeze > 1)
330 panic("ata_thread: queue_freeze");
331 splx(s);
332 }
333 chp->ch_thread = NULL;
334 wakeup((void *)&chp->ch_flags);
335 kthread_exit(0);
336 }
337
338 /*
339 * atabus_create_thread:
340 *
341 * Helper routine to create the ATA bus worker thread.
342 */
343 static void
344 atabus_create_thread(void *arg)
345 {
346 struct atabus_softc *sc = arg;
347 struct ata_channel *chp = sc->sc_chan;
348 int error;
349
350 if ((error = kthread_create1(atabus_thread, sc, &chp->ch_thread,
351 "%s", sc->sc_dev.dv_xname)) != 0)
352 aprint_error("%s: unable to create kernel thread: error %d\n",
353 sc->sc_dev.dv_xname, error);
354 }
355
356 /*
357 * atabus_match:
358 *
359 * Autoconfiguration match routine.
360 */
361 static int
362 atabus_match(struct device *parent, struct cfdata *cf, void *aux)
363 {
364 struct ata_channel *chp = aux;
365
366 if (chp == NULL)
367 return (0);
368
369 if (cf->cf_loc[ATACF_CHANNEL] != chp->ch_channel &&
370 cf->cf_loc[ATACF_CHANNEL] != ATACF_CHANNEL_DEFAULT)
371 return (0);
372
373 return (1);
374 }
375
376 /*
377 * atabus_attach:
378 *
379 * Autoconfiguration attach routine.
380 */
381 static void
382 atabus_attach(struct device *parent, struct device *self, void *aux)
383 {
384 struct atabus_softc *sc = (void *) self;
385 struct ata_channel *chp = aux;
386 struct atabus_initq *initq;
387
388 sc->sc_chan = chp;
389
390 aprint_normal("\n");
391 aprint_naive("\n");
392
393 if (ata_addref(chp))
394 return;
395
396 initq = malloc(sizeof(*initq), M_DEVBUF, M_WAITOK);
397 initq->atabus_sc = sc;
398 TAILQ_INSERT_TAIL(&atabus_initq_head, initq, atabus_initq);
399 config_pending_incr();
400 kthread_create(atabus_create_thread, sc);
401 }
402
403 /*
404 * atabus_activate:
405 *
406 * Autoconfiguration activation routine.
407 */
408 static int
409 atabus_activate(struct device *self, enum devact act)
410 {
411 struct atabus_softc *sc = (void *) self;
412 struct ata_channel *chp = sc->sc_chan;
413 struct device *dev = NULL;
414 int s, i, error = 0;
415
416 s = splbio();
417 switch (act) {
418 case DVACT_ACTIVATE:
419 error = EOPNOTSUPP;
420 break;
421
422 case DVACT_DEACTIVATE:
423 /*
424 * We might deactivate the children of atapibus twice
425 * (once bia atapibus, once directly), but since the
426 * generic autoconfiguration code maintains the DVF_ACTIVE
427 * flag, it's safe.
428 */
429 if ((dev = chp->atapibus) != NULL) {
430 error = config_deactivate(dev);
431 if (error)
432 goto out;
433 }
434
435 for (i = 0; i < chp->ch_ndrive; i++) {
436 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
437 ATADEBUG_PRINT(("atabus_activate: %s: "
438 "deactivating %s\n", sc->sc_dev.dv_xname,
439 dev->dv_xname),
440 DEBUG_DETACH);
441 error = config_deactivate(dev);
442 if (error)
443 goto out;
444 }
445 }
446 break;
447 }
448 out:
449 splx(s);
450
451 #ifdef ATADEBUG
452 if (dev != NULL && error != 0)
453 ATADEBUG_PRINT(("atabus_activate: %s: "
454 "error %d deactivating %s\n", sc->sc_dev.dv_xname,
455 error, dev->dv_xname), DEBUG_DETACH);
456 #endif /* ATADEBUG */
457
458 return (error);
459 }
460
461 /*
462 * atabus_detach:
463 *
464 * Autoconfiguration detach routine.
465 */
466 static int
467 atabus_detach(struct device *self, int flags)
468 {
469 struct atabus_softc *sc = (void *) self;
470 struct ata_channel *chp = sc->sc_chan;
471 struct device *dev = NULL;
472 int i, error = 0;
473
474 /* Shutdown the channel. */
475 /* XXX NEED AN INTERLOCK HERE. */
476 chp->ch_flags |= ATACH_SHUTDOWN;
477 wakeup(&chp->ch_thread);
478 while (chp->ch_thread != NULL)
479 (void) tsleep((void *)&chp->ch_flags, PRIBIO, "atadown", 0);
480
481 /*
482 * Detach atapibus and its children.
483 */
484 if ((dev = chp->atapibus) != NULL) {
485 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
486 sc->sc_dev.dv_xname, dev->dv_xname), DEBUG_DETACH);
487 error = config_detach(dev, flags);
488 if (error)
489 goto out;
490 }
491
492 /*
493 * Detach our other children.
494 */
495 for (i = 0; i < chp->ch_ndrive; i++) {
496 if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI)
497 continue;
498 if ((dev = chp->ch_drive[i].drv_softc) != NULL) {
499 ATADEBUG_PRINT(("atabus_detach: %s: detaching %s\n",
500 sc->sc_dev.dv_xname, dev->dv_xname),
501 DEBUG_DETACH);
502 error = config_detach(dev, flags);
503 if (error)
504 goto out;
505 }
506 }
507
508 out:
509 #ifdef ATADEBUG
510 if (dev != NULL && error != 0)
511 ATADEBUG_PRINT(("atabus_detach: %s: error %d detaching %s\n",
512 sc->sc_dev.dv_xname, error, dev->dv_xname),
513 DEBUG_DETACH);
514 #endif /* ATADEBUG */
515
516 return (error);
517 }
518
519 CFATTACH_DECL(atabus, sizeof(struct atabus_softc),
520 atabus_match, atabus_attach, atabus_detach, atabus_activate);
521
522 /*****************************************************************************
523 * Common ATA bus operations.
524 *****************************************************************************/
525
526 /* Get the disk's parameters */
527 int
528 ata_get_params(struct ata_drive_datas *drvp, u_int8_t flags,
529 struct ataparams *prms)
530 {
531 char tb[DEV_BSIZE];
532 struct ata_command ata_c;
533 struct ata_channel *chp = drvp->chnl_softc;
534 struct atac_softc *atac = chp->ch_atac;
535
536 #if BYTE_ORDER == LITTLE_ENDIAN
537 int i;
538 u_int16_t *p;
539 #endif
540
541 ATADEBUG_PRINT(("ata_get_parms\n"), DEBUG_FUNCS);
542
543 memset(tb, 0, DEV_BSIZE);
544 memset(prms, 0, sizeof(struct ataparams));
545 memset(&ata_c, 0, sizeof(struct ata_command));
546
547 if (drvp->drive_flags & DRIVE_ATA) {
548 ata_c.r_command = WDCC_IDENTIFY;
549 ata_c.r_st_bmask = WDCS_DRDY;
550 ata_c.r_st_pmask = 0;
551 ata_c.timeout = 3000; /* 3s */
552 } else if (drvp->drive_flags & DRIVE_ATAPI) {
553 ata_c.r_command = ATAPI_IDENTIFY_DEVICE;
554 ata_c.r_st_bmask = 0;
555 ata_c.r_st_pmask = 0;
556 ata_c.timeout = 10000; /* 10s */
557 } else {
558 ATADEBUG_PRINT(("ata_get_parms: no disks\n"),
559 DEBUG_FUNCS|DEBUG_PROBE);
560 return CMD_ERR;
561 }
562 ata_c.flags = AT_READ | flags;
563 ata_c.data = tb;
564 ata_c.bcount = DEV_BSIZE;
565 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp,
566 &ata_c) != ATACMD_COMPLETE) {
567 ATADEBUG_PRINT(("ata_get_parms: wdc_exec_command failed\n"),
568 DEBUG_FUNCS|DEBUG_PROBE);
569 return CMD_AGAIN;
570 }
571 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
572 ATADEBUG_PRINT(("ata_get_parms: ata_c.flags=0x%x\n",
573 ata_c.flags), DEBUG_FUNCS|DEBUG_PROBE);
574 return CMD_ERR;
575 } else {
576 /* if we didn't read any data something is wrong */
577 if ((ata_c.flags & AT_XFDONE) == 0)
578 return CMD_ERR;
579 /* Read in parameter block. */
580 memcpy(prms, tb, sizeof(struct ataparams));
581 #if BYTE_ORDER == LITTLE_ENDIAN
582 /*
583 * Shuffle string byte order.
584 * ATAPI Mitsumi and NEC drives don't need this.
585 */
586 if ((prms->atap_config & WDC_CFG_ATAPI_MASK) ==
587 WDC_CFG_ATAPI &&
588 ((prms->atap_model[0] == 'N' &&
589 prms->atap_model[1] == 'E') ||
590 (prms->atap_model[0] == 'F' &&
591 prms->atap_model[1] == 'X')))
592 return 0;
593 for (i = 0; i < sizeof(prms->atap_model); i += 2) {
594 p = (u_short *)(prms->atap_model + i);
595 *p = ntohs(*p);
596 }
597 for (i = 0; i < sizeof(prms->atap_serial); i += 2) {
598 p = (u_short *)(prms->atap_serial + i);
599 *p = ntohs(*p);
600 }
601 for (i = 0; i < sizeof(prms->atap_revision); i += 2) {
602 p = (u_short *)(prms->atap_revision + i);
603 *p = ntohs(*p);
604 }
605 #endif
606 return CMD_OK;
607 }
608 }
609
610 int
611 ata_set_mode(struct ata_drive_datas *drvp, u_int8_t mode, u_int8_t flags)
612 {
613 struct ata_command ata_c;
614 struct ata_channel *chp = drvp->chnl_softc;
615 struct atac_softc *atac = chp->ch_atac;
616
617 ATADEBUG_PRINT(("ata_set_mode=0x%x\n", mode), DEBUG_FUNCS);
618 memset(&ata_c, 0, sizeof(struct ata_command));
619
620 ata_c.r_command = SET_FEATURES;
621 ata_c.r_st_bmask = 0;
622 ata_c.r_st_pmask = 0;
623 ata_c.r_features = WDSF_SET_MODE;
624 ata_c.r_count = mode;
625 ata_c.flags = flags;
626 ata_c.timeout = 1000; /* 1s */
627 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp,
628 &ata_c) != ATACMD_COMPLETE)
629 return CMD_AGAIN;
630 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
631 return CMD_ERR;
632 }
633 return CMD_OK;
634 }
635
636 void
637 ata_dmaerr(struct ata_drive_datas *drvp, int flags)
638 {
639 /*
640 * Downgrade decision: if we get NERRS_MAX in NXFER.
641 * We start with n_dmaerrs set to NERRS_MAX-1 so that the
642 * first error within the first NXFER ops will immediatly trigger
643 * a downgrade.
644 * If we got an error and n_xfers is bigger than NXFER reset counters.
645 */
646 drvp->n_dmaerrs++;
647 if (drvp->n_dmaerrs >= NERRS_MAX && drvp->n_xfers <= NXFER) {
648 ata_downgrade_mode(drvp, flags);
649 drvp->n_dmaerrs = NERRS_MAX-1;
650 drvp->n_xfers = 0;
651 return;
652 }
653 if (drvp->n_xfers > NXFER) {
654 drvp->n_dmaerrs = 1; /* just got an error */
655 drvp->n_xfers = 1; /* restart counting from this error */
656 }
657 }
658
659 /*
660 * Add a command to the queue and start controller. Must be called at splbio
661 */
662 void
663 ata_exec_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
664 {
665
666 ATADEBUG_PRINT(("ata_exec_xfer %p channel %d drive %d\n", xfer,
667 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
668
669 /* complete xfer setup */
670 xfer->c_chp = chp;
671
672 /* insert at the end of command list */
673 TAILQ_INSERT_TAIL(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
674 ATADEBUG_PRINT(("atastart from ata_exec_xfer, flags 0x%x\n",
675 chp->ch_flags), DEBUG_XFERS);
676 atastart(chp);
677 }
678
679 /*
680 * Start I/O on a controller, for the given channel.
681 * The first xfer may be not for our channel if the channel queues
682 * are shared.
683 */
684 void
685 atastart(struct ata_channel *chp)
686 {
687 struct atac_softc *atac = chp->ch_atac;
688 struct ata_xfer *xfer;
689
690 #ifdef WDC_DIAGNOSTIC
691 int spl1, spl2;
692
693 spl1 = splbio();
694 spl2 = splbio();
695 if (spl2 != spl1) {
696 printf("atastart: not at splbio()\n");
697 panic("atastart");
698 }
699 splx(spl2);
700 splx(spl1);
701 #endif /* WDC_DIAGNOSTIC */
702
703 /* is there a xfer ? */
704 if ((xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer)) == NULL)
705 return;
706
707 /* adjust chp, in case we have a shared queue */
708 chp = xfer->c_chp;
709
710 if (chp->ch_queue->active_xfer != NULL) {
711 return; /* channel aleady active */
712 }
713 if (__predict_false(chp->ch_queue->queue_freeze > 0)) {
714 return; /* queue froozen */
715 }
716 #ifdef DIAGNOSTIC
717 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0)
718 panic("atastart: channel waiting for irq");
719 #endif
720 if (atac->atac_claim_hw)
721 if (!(*atac->atac_claim_hw)(chp, 0))
722 return;
723
724 ATADEBUG_PRINT(("atastart: xfer %p channel %d drive %d\n", xfer,
725 chp->ch_channel, xfer->c_drive), DEBUG_XFERS);
726 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_RESET) {
727 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_RESET;
728 chp->ch_drive[xfer->c_drive].state = 0;
729 }
730 chp->ch_queue->active_xfer = xfer;
731 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
732
733 if (atac->atac_cap & ATAC_CAP_NOIRQ)
734 KASSERT(xfer->c_flags & C_POLL);
735 xfer->c_start(chp, xfer);
736 }
737
738 struct ata_xfer *
739 ata_get_xfer(int flags)
740 {
741 struct ata_xfer *xfer;
742 int s;
743
744 s = splbio();
745 xfer = pool_get(&ata_xfer_pool,
746 ((flags & ATAXF_NOSLEEP) != 0 ? PR_NOWAIT : PR_WAITOK));
747 splx(s);
748 if (xfer != NULL) {
749 memset(xfer, 0, sizeof(struct ata_xfer));
750 }
751 return xfer;
752 }
753
754 void
755 ata_free_xfer(struct ata_channel *chp, struct ata_xfer *xfer)
756 {
757 struct atac_softc *atac = chp->ch_atac;
758 int s;
759
760 if (atac->atac_free_hw)
761 (*atac->atac_free_hw)(chp);
762 s = splbio();
763 pool_put(&ata_xfer_pool, xfer);
764 splx(s);
765 }
766
767 /*
768 * Kill off all pending xfers for a ata_channel.
769 *
770 * Must be called at splbio().
771 */
772 void
773 ata_kill_pending(struct ata_drive_datas *drvp)
774 {
775 struct ata_channel *chp = drvp->chnl_softc;
776 struct ata_xfer *xfer, *next_xfer;
777 int s = splbio();
778
779 for (xfer = TAILQ_FIRST(&chp->ch_queue->queue_xfer);
780 xfer != NULL; xfer = next_xfer) {
781 next_xfer = TAILQ_NEXT(xfer, c_xferchain);
782 if (xfer->c_chp != chp || xfer->c_drive != drvp->drive)
783 continue;
784 TAILQ_REMOVE(&chp->ch_queue->queue_xfer, xfer, c_xferchain);
785 (*xfer->c_kill_xfer)(chp, xfer, KILL_GONE);
786 }
787
788 while ((xfer = chp->ch_queue->active_xfer) != NULL) {
789 if (xfer->c_chp == chp && xfer->c_drive == drvp->drive) {
790 drvp->drive_flags |= DRIVE_WAITDRAIN;
791 (void) tsleep(&chp->ch_queue->active_xfer,
792 PRIBIO, "atdrn", 0);
793 } else {
794 /* no more xfer for us */
795 break;
796 }
797 }
798 splx(s);
799 }
800
801 int
802 ata_addref(struct ata_channel *chp)
803 {
804 struct atac_softc *atac = chp->ch_atac;
805 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
806 int s, error = 0;
807
808 s = splbio();
809 if (adapt->adapt_refcnt++ == 0 &&
810 adapt->adapt_enable != NULL) {
811 error = (*adapt->adapt_enable)(&atac->atac_dev, 1);
812 if (error)
813 adapt->adapt_refcnt--;
814 }
815 splx(s);
816 return (error);
817 }
818
819 void
820 ata_delref(struct ata_channel *chp)
821 {
822 struct atac_softc *atac = chp->ch_atac;
823 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
824 int s;
825
826 s = splbio();
827 if (adapt->adapt_refcnt-- == 1 &&
828 adapt->adapt_enable != NULL)
829 (void) (*adapt->adapt_enable)(&atac->atac_dev, 0);
830 splx(s);
831 }
832
833 void
834 ata_print_modes(struct ata_channel *chp)
835 {
836 struct atac_softc *atac = chp->ch_atac;
837 int drive;
838 struct ata_drive_datas *drvp;
839
840 for (drive = 0; drive < 2; drive++) {
841 drvp = &chp->ch_drive[drive];
842 if ((drvp->drive_flags & DRIVE) == 0)
843 continue;
844 aprint_normal("%s(%s:%d:%d): using PIO mode %d",
845 drvp->drv_softc->dv_xname,
846 atac->atac_dev.dv_xname,
847 chp->ch_channel, drive, drvp->PIO_mode);
848 if (drvp->drive_flags & DRIVE_DMA)
849 aprint_normal(", DMA mode %d", drvp->DMA_mode);
850 if (drvp->drive_flags & DRIVE_UDMA) {
851 aprint_normal(", Ultra-DMA mode %d", drvp->UDMA_mode);
852 if (drvp->UDMA_mode == 2)
853 aprint_normal(" (Ultra/33)");
854 else if (drvp->UDMA_mode == 4)
855 aprint_normal(" (Ultra/66)");
856 else if (drvp->UDMA_mode == 5)
857 aprint_normal(" (Ultra/100)");
858 else if (drvp->UDMA_mode == 6)
859 aprint_normal(" (Ultra/133)");
860 }
861 if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA))
862 aprint_normal(" (using DMA data transfers)");
863 aprint_normal("\n");
864 }
865 }
866
867 /*
868 * downgrade the transfer mode of a drive after an error. return 1 if
869 * downgrade was possible, 0 otherwise.
870 */
871 int
872 ata_downgrade_mode(struct ata_drive_datas *drvp, int flags)
873 {
874 struct ata_channel *chp = drvp->chnl_softc;
875 struct atac_softc *atac = chp->ch_atac;
876 struct device *drv_dev = drvp->drv_softc;
877 int cf_flags = drv_dev->dv_cfdata->cf_flags;
878
879 /* if drive or controller don't know its mode, we can't do much */
880 if ((drvp->drive_flags & DRIVE_MODE) == 0 ||
881 (atac->atac_set_modes == NULL))
882 return 0;
883 /* current drive mode was set by a config flag, let it this way */
884 if ((cf_flags & ATA_CONFIG_PIO_SET) ||
885 (cf_flags & ATA_CONFIG_DMA_SET) ||
886 (cf_flags & ATA_CONFIG_UDMA_SET))
887 return 0;
888
889 /*
890 * If we were using Ultra-DMA mode, downgrade to the next lower mode.
891 */
892 if ((drvp->drive_flags & DRIVE_UDMA) && drvp->UDMA_mode >= 2) {
893 drvp->UDMA_mode--;
894 printf("%s: transfer error, downgrading to Ultra-DMA mode %d\n",
895 drv_dev->dv_xname, drvp->UDMA_mode);
896 }
897
898 /*
899 * If we were using ultra-DMA, don't downgrade to multiword DMA.
900 */
901 else if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) {
902 drvp->drive_flags &= ~(DRIVE_DMA | DRIVE_UDMA);
903 drvp->PIO_mode = drvp->PIO_cap;
904 printf("%s: transfer error, downgrading to PIO mode %d\n",
905 drv_dev->dv_xname, drvp->PIO_mode);
906 } else /* already using PIO, can't downgrade */
907 return 0;
908
909 (*atac->atac_set_modes)(chp);
910 ata_print_modes(chp);
911 /* reset the channel, which will shedule all drives for setup */
912 wdc_reset_channel(chp, flags | AT_RST_NOCMD);
913 return 1;
914 }
915
916 /*
917 * Probe drive's capabilities, for use by the controller later
918 * Assumes drvp points to an existing drive.
919 */
920 void
921 ata_probe_caps(struct ata_drive_datas *drvp)
922 {
923 struct ataparams params, params2;
924 struct ata_channel *chp = drvp->chnl_softc;
925 struct atac_softc *atac = chp->ch_atac;
926 struct device *drv_dev = drvp->drv_softc;
927 int i, printed;
928 char *sep = "";
929 int cf_flags;
930
931 if (ata_get_params(drvp, AT_WAIT, ¶ms) != CMD_OK) {
932 /* IDENTIFY failed. Can't tell more about the device */
933 return;
934 }
935 if ((atac->atac_cap & (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) ==
936 (ATAC_CAP_DATA16 | ATAC_CAP_DATA32)) {
937 /*
938 * Controller claims 16 and 32 bit transfers.
939 * Re-do an IDENTIFY with 32-bit transfers,
940 * and compare results.
941 */
942 drvp->drive_flags |= DRIVE_CAP32;
943 ata_get_params(drvp, AT_WAIT, ¶ms2);
944 if (memcmp(¶ms, ¶ms2, sizeof(struct ataparams)) != 0) {
945 /* Not good. fall back to 16bits */
946 drvp->drive_flags &= ~DRIVE_CAP32;
947 } else {
948 aprint_normal("%s: 32-bit data port\n",
949 drv_dev->dv_xname);
950 }
951 }
952 #if 0 /* Some ultra-DMA drives claims to only support ATA-3. sigh */
953 if (params.atap_ata_major > 0x01 &&
954 params.atap_ata_major != 0xffff) {
955 for (i = 14; i > 0; i--) {
956 if (params.atap_ata_major & (1 << i)) {
957 aprint_normal("%s: ATA version %d\n",
958 drv_dev->dv_xname, i);
959 drvp->ata_vers = i;
960 break;
961 }
962 }
963 }
964 #endif
965
966 /* An ATAPI device is at last PIO mode 3 */
967 if (drvp->drive_flags & DRIVE_ATAPI)
968 drvp->PIO_mode = 3;
969
970 /*
971 * It's not in the specs, but it seems that some drive
972 * returns 0xffff in atap_extensions when this field is invalid
973 */
974 if (params.atap_extensions != 0xffff &&
975 (params.atap_extensions & WDC_EXT_MODES)) {
976 printed = 0;
977 /*
978 * XXX some drives report something wrong here (they claim to
979 * support PIO mode 8 !). As mode is coded on 3 bits in
980 * SET FEATURE, limit it to 7 (so limit i to 4).
981 * If higher mode than 7 is found, abort.
982 */
983 for (i = 7; i >= 0; i--) {
984 if ((params.atap_piomode_supp & (1 << i)) == 0)
985 continue;
986 if (i > 4)
987 return;
988 /*
989 * See if mode is accepted.
990 * If the controller can't set its PIO mode,
991 * assume the defaults are good, so don't try
992 * to set it
993 */
994 if (atac->atac_set_modes)
995 /*
996 * It's OK to pool here, it's fast enouth
997 * to not bother waiting for interrupt
998 */
999 if (ata_set_mode(drvp, 0x08 | (i + 3),
1000 AT_WAIT) != CMD_OK)
1001 continue;
1002 if (!printed) {
1003 aprint_normal("%s: drive supports PIO mode %d",
1004 drv_dev->dv_xname, i + 3);
1005 sep = ",";
1006 printed = 1;
1007 }
1008 /*
1009 * If controller's driver can't set its PIO mode,
1010 * get the highter one for the drive.
1011 */
1012 if (atac->atac_set_modes == NULL ||
1013 atac->atac_pio_cap >= i + 3) {
1014 drvp->PIO_mode = i + 3;
1015 drvp->PIO_cap = i + 3;
1016 break;
1017 }
1018 }
1019 if (!printed) {
1020 /*
1021 * We didn't find a valid PIO mode.
1022 * Assume the values returned for DMA are buggy too
1023 */
1024 return;
1025 }
1026 drvp->drive_flags |= DRIVE_MODE;
1027 printed = 0;
1028 for (i = 7; i >= 0; i--) {
1029 if ((params.atap_dmamode_supp & (1 << i)) == 0)
1030 continue;
1031 if ((atac->atac_cap & ATAC_CAP_DMA) &&
1032 atac->atac_set_modes != NULL)
1033 if (ata_set_mode(drvp, 0x20 | i, AT_WAIT)
1034 != CMD_OK)
1035 continue;
1036 if (!printed) {
1037 aprint_normal("%s DMA mode %d", sep, i);
1038 sep = ",";
1039 printed = 1;
1040 }
1041 if (atac->atac_cap & ATAC_CAP_DMA) {
1042 if (atac->atac_set_modes != NULL &&
1043 atac->atac_dma_cap < i)
1044 continue;
1045 drvp->DMA_mode = i;
1046 drvp->DMA_cap = i;
1047 drvp->drive_flags |= DRIVE_DMA;
1048 }
1049 break;
1050 }
1051 if (params.atap_extensions & WDC_EXT_UDMA_MODES) {
1052 printed = 0;
1053 for (i = 7; i >= 0; i--) {
1054 if ((params.atap_udmamode_supp & (1 << i))
1055 == 0)
1056 continue;
1057 if (atac->atac_set_modes != NULL &&
1058 (atac->atac_cap & ATAC_CAP_UDMA))
1059 if (ata_set_mode(drvp, 0x40 | i,
1060 AT_WAIT) != CMD_OK)
1061 continue;
1062 if (!printed) {
1063 aprint_normal("%s Ultra-DMA mode %d",
1064 sep, i);
1065 if (i == 2)
1066 aprint_normal(" (Ultra/33)");
1067 else if (i == 4)
1068 aprint_normal(" (Ultra/66)");
1069 else if (i == 5)
1070 aprint_normal(" (Ultra/100)");
1071 else if (i == 6)
1072 aprint_normal(" (Ultra/133)");
1073 sep = ",";
1074 printed = 1;
1075 }
1076 if (atac->atac_cap & ATAC_CAP_UDMA) {
1077 if (atac->atac_set_modes != NULL &&
1078 atac->atac_udma_cap < i)
1079 continue;
1080 drvp->UDMA_mode = i;
1081 drvp->UDMA_cap = i;
1082 drvp->drive_flags |= DRIVE_UDMA;
1083 }
1084 break;
1085 }
1086 }
1087 aprint_normal("\n");
1088 }
1089
1090 drvp->drive_flags &= ~DRIVE_NOSTREAM;
1091 if (drvp->drive_flags & DRIVE_ATAPI) {
1092 if (atac->atac_cap & ATAC_CAP_ATAPI_NOSTREAM)
1093 drvp->drive_flags |= DRIVE_NOSTREAM;
1094 } else {
1095 if (atac->atac_cap & ATAC_CAP_ATA_NOSTREAM)
1096 drvp->drive_flags |= DRIVE_NOSTREAM;
1097 }
1098
1099 /* Try to guess ATA version here, if it didn't get reported */
1100 if (drvp->ata_vers == 0) {
1101 if (drvp->drive_flags & DRIVE_UDMA)
1102 drvp->ata_vers = 4; /* should be at last ATA-4 */
1103 else if (drvp->PIO_cap > 2)
1104 drvp->ata_vers = 2; /* should be at last ATA-2 */
1105 }
1106 cf_flags = drv_dev->dv_cfdata->cf_flags;
1107 if (cf_flags & ATA_CONFIG_PIO_SET) {
1108 drvp->PIO_mode =
1109 (cf_flags & ATA_CONFIG_PIO_MODES) >> ATA_CONFIG_PIO_OFF;
1110 drvp->drive_flags |= DRIVE_MODE;
1111 }
1112 if ((atac->atac_cap & ATAC_CAP_DMA) == 0) {
1113 /* don't care about DMA modes */
1114 return;
1115 }
1116 if (cf_flags & ATA_CONFIG_DMA_SET) {
1117 if ((cf_flags & ATA_CONFIG_DMA_MODES) ==
1118 ATA_CONFIG_DMA_DISABLE) {
1119 drvp->drive_flags &= ~DRIVE_DMA;
1120 } else {
1121 drvp->DMA_mode = (cf_flags & ATA_CONFIG_DMA_MODES) >>
1122 ATA_CONFIG_DMA_OFF;
1123 drvp->drive_flags |= DRIVE_DMA | DRIVE_MODE;
1124 }
1125 }
1126 if ((atac->atac_cap & ATAC_CAP_UDMA) == 0) {
1127 /* don't care about UDMA modes */
1128 return;
1129 }
1130 if (cf_flags & ATA_CONFIG_UDMA_SET) {
1131 if ((cf_flags & ATA_CONFIG_UDMA_MODES) ==
1132 ATA_CONFIG_UDMA_DISABLE) {
1133 drvp->drive_flags &= ~DRIVE_UDMA;
1134 } else {
1135 drvp->UDMA_mode = (cf_flags & ATA_CONFIG_UDMA_MODES) >>
1136 ATA_CONFIG_UDMA_OFF;
1137 drvp->drive_flags |= DRIVE_UDMA | DRIVE_MODE;
1138 }
1139 }
1140 }
1141
1142 /* management of the /dev/atabus* devices */
1143 int atabusopen(dev, flag, fmt, p)
1144 dev_t dev;
1145 int flag, fmt;
1146 struct proc *p;
1147 {
1148 struct atabus_softc *sc;
1149 int error, unit = minor(dev);
1150
1151 if (unit >= atabus_cd.cd_ndevs ||
1152 (sc = atabus_cd.cd_devs[unit]) == NULL)
1153 return (ENXIO);
1154
1155 if (sc->sc_flags & ATABUSCF_OPEN)
1156 return (EBUSY);
1157
1158 if ((error = ata_addref(sc->sc_chan)) != 0)
1159 return (error);
1160
1161 sc->sc_flags |= ATABUSCF_OPEN;
1162
1163 return (0);
1164 }
1165
1166
1167 int
1168 atabusclose(dev, flag, fmt, p)
1169 dev_t dev;
1170 int flag, fmt;
1171 struct proc *p;
1172 {
1173 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1174
1175 ata_delref(sc->sc_chan);
1176
1177 sc->sc_flags &= ~ATABUSCF_OPEN;
1178
1179 return (0);
1180 }
1181
1182 int
1183 atabusioctl(dev, cmd, addr, flag, p)
1184 dev_t dev;
1185 u_long cmd;
1186 caddr_t addr;
1187 int flag;
1188 struct proc *p;
1189 {
1190 struct atabus_softc *sc = atabus_cd.cd_devs[minor(dev)];
1191 struct ata_channel *chp = sc->sc_chan;
1192 int min_drive, max_drive, drive;
1193 int error;
1194 int s;
1195
1196 /*
1197 * Enforce write permission for ioctls that change the
1198 * state of the bus. Host adapter specific ioctls must
1199 * be checked by the adapter driver.
1200 */
1201 switch (cmd) {
1202 case ATABUSIOSCAN:
1203 case ATABUSIODETACH:
1204 case ATABUSIORESET:
1205 if ((flag & FWRITE) == 0)
1206 return (EBADF);
1207 }
1208
1209 switch (cmd) {
1210 case ATABUSIORESET:
1211 s = splbio();
1212 wdc_reset_channel(sc->sc_chan, AT_WAIT | AT_POLL);
1213 splx(s);
1214 error = 0;
1215 break;
1216 case ATABUSIOSCAN:
1217 {
1218 #if 0
1219 struct atabusioscan_args *a=
1220 (struct atabusioscan_args *)addr;
1221 #endif
1222 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1223 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1224 return (EOPNOTSUPP);
1225 return (EOPNOTSUPP);
1226 }
1227 case ATABUSIODETACH:
1228 {
1229 struct atabusioscan_args *a=
1230 (struct atabusioscan_args *)addr;
1231 if ((chp->ch_drive[0].drive_flags & DRIVE_OLD) ||
1232 (chp->ch_drive[1].drive_flags & DRIVE_OLD))
1233 return (EOPNOTSUPP);
1234 switch (a->at_dev) {
1235 case -1:
1236 min_drive = 0;
1237 max_drive = 1;
1238 break;
1239 case 0:
1240 case 1:
1241 min_drive = max_drive = a->at_dev;
1242 break;
1243 default:
1244 return (EINVAL);
1245 }
1246 for (drive = min_drive; drive <= max_drive; drive++) {
1247 if (chp->ch_drive[drive].drv_softc != NULL) {
1248 error = config_detach(
1249 chp->ch_drive[drive].drv_softc, 0);
1250 if (error)
1251 return (error);
1252 chp->ch_drive[drive].drv_softc = NULL;
1253 }
1254 }
1255 error = 0;
1256 break;
1257 }
1258 default:
1259 error = ENOTTY;
1260 }
1261 return (error);
1262 };
1263